1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "dt-bindings/usb/pd.h" 15#include "rk3562.dtsi" 16#include "rk3562-android.dtsi" 17#include "rk3562-rk817-tablet-camera.dtsi" 18 19/ { 20 model = "Rockchip RK3562 RK817 TABLET LP4 Board"; 21 compatible = "rockchip,rk3562-rk817-tablet", "rockchip,rk3562"; 22 23 adc_keys: adc-keys { 24 compatible = "adc-keys"; 25 io-channels = <&saradc0 1>; 26 io-channel-names = "buttons"; 27 keyup-threshold-microvolt = <1800000>; 28 poll-interval = <100>; 29 30 vol-up-key { 31 label = "volume up"; 32 linux,code = <KEY_VOLUMEUP>; 33 press-threshold-microvolt = <1750>; 34 }; 35 36 vol-down-key { 37 label = "volume down"; 38 linux,code = <KEY_VOLUMEDOWN>; 39 press-threshold-microvolt = <297500>; 40 }; 41 }; 42 43 backlight: backlight { 44 compatible = "pwm-backlight"; 45 pwms = <&pwm5 0 25000 0>; 46 brightness-levels = < 47 0 20 20 21 21 22 22 23 48 23 24 24 25 25 26 26 27 49 27 28 28 29 29 30 30 31 50 31 32 32 33 33 34 34 35 51 35 36 36 37 37 38 38 39 52 40 41 42 43 44 45 46 47 53 48 49 50 50 51 52 53 54 54 55 55 56 57 58 59 60 61 55 62 63 64 64 65 65 66 67 56 68 69 70 71 71 72 73 74 57 75 76 77 78 79 79 80 81 58 82 83 84 85 86 86 87 88 59 89 90 91 92 93 94 94 95 60 96 97 98 99 100 101 101 102 61 103 104 105 106 107 107 108 109 62 110 111 112 113 114 115 115 116 63 117 118 119 120 121 122 123 123 64 124 125 126 127 128 129 130 130 65 131 132 133 134 135 136 136 137 66 138 139 140 141 142 143 143 144 67 145 146 147 147 148 149 150 151 68 152 153 154 155 156 156 157 158 69 159 157 158 159 160 161 162 162 70 163 164 165 166 167 168 169 169 71 170 171 172 173 174 175 175 176 72 177 178 179 180 181 182 182 183 73 184 185 186 187 188 189 190 190 74 191 192 193 194 195 196 197 197 75 198 199 200 201 202 203 204 204 76 205 206 207 208 209 209 210 211 77 212 213 213 214 214 215 215 216 78 216 217 217 218 218 219 219 220 79 >; 80 default-brightness-level = <200>; 81 }; 82 83 charge-animation { 84 compatible = "rockchip,uboot-charge"; 85 rockchip,uboot-charge-on = <1>; 86 rockchip,android-charge-on = <0>; 87 rockchip,uboot-low-power-voltage = <3350>; 88 rockchip,screen-on-voltage = <3400>; 89 status = "okay"; 90 }; 91 92 rk817-sound { 93 compatible = "rockchip,multicodecs-card"; 94 rockchip,card-name = "rockchip-rk817"; 95 hp-det-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 96 io-channels = <&saradc0 4>; 97 io-channel-names = "adc-detect"; 98 keyup-threshold-microvolt = <1800000>; 99 poll-interval = <100>; 100 rockchip,format = "i2s"; 101 rockchip,mclk-fs = <256>; 102 rockchip,cpu = <&sai0>; 103 rockchip,codec = <&rk817_codec>; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&hp_det>; 106 play-pause-key { 107 label = "playpause"; 108 linux,code = <KEY_PLAYPAUSE>; 109 press-threshold-microvolt = <2000>; 110 }; 111 }; 112 113 sdio_pwrseq: sdio-pwrseq { 114 compatible = "mmc-pwrseq-simple"; 115 clocks = <&rk817 1>; 116 clock-names = "ext_clock"; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&wifi_enable_h>; 119 120 /* 121 * On the module itself this is one of these (depending 122 * on the actual card populated): 123 * - SDIO_RESET_L_WL_REG_ON 124 * - PDN (power down when low) 125 */ 126 post-power-on-delay-ms = <200>; 127 reset-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; 128 }; 129 130 vcc_sd: vcc-sd { 131 compatible = "regulator-gpio"; 132 enable-active-low; 133 enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 134 regulator-min-microvolt = <3300000>; 135 regulator-max-microvolt = <3300000>; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&vcc_sd_h>; 138 regulator-name = "vcc_sd"; 139 states = <3300000 0x0 140 3300000 0x1>; 141 }; 142 143 vcc_sys: vcc-sys { 144 compatible = "regulator-fixed"; 145 regulator-name = "vcc_sys"; 146 regulator-always-on; 147 regulator-boot-on; 148 regulator-min-microvolt = <3800000>; 149 regulator-max-microvolt = <3800000>; 150 }; 151 152 vdd_gpu: vdd-gpu { 153 compatible = "pwm-regulator"; 154 pwms = <&pwm7 0 5000 1>; 155 regulator-name = "vdd_gpu"; 156 regulator-min-microvolt = <800000>; 157 regulator-max-microvolt = <1100000>; 158 regulator-init-microvolt = <900000>; 159 regulator-always-on; 160 regulator-boot-on; 161 regulator-settling-time-up-us = <250>; 162 pwm-supply = <&vcc_sys>; 163 status = "okay"; 164 }; 165 166 vdd_npu: vdd-npu { 167 compatible = "pwm-regulator"; 168 pwms = <&pwm6 0 5000 1>; 169 regulator-name = "vdd_npu"; 170 regulator-min-microvolt = <800000>; 171 regulator-max-microvolt = <1100000>; 172 regulator-init-microvolt = <900000>; 173 regulator-always-on; 174 regulator-boot-on; 175 regulator-settling-time-up-us = <250>; 176 pwm-supply = <&vcc_sys>; 177 status = "okay"; 178 }; 179 180 wireless-wlan { 181 compatible = "wlan-platdata"; 182 rockchip,grf = <&sys_grf>; 183 wifi_chip_type = "ap6255"; 184 pinctrl-names = "default"; 185 pinctrl-0 = <&wifi_host_wake_irq>; 186 WIFI,host_wake_irq = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 187 WIFI,poweren_gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 188 WIFI,vbat_gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 189 status = "okay"; 190 }; 191 192 wireless-bluetooth { 193 compatible = "bluetooth-platdata"; 194 clocks = <&rk817 1>; 195 clock-names = "ext_clock"; 196 //wifi-bt-power-toggle; 197 uart_rts_gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; 198 pinctrl-names = "default", "rts_gpio"; 199 pinctrl-0 = <&uart1m0_rtsn>; 200 pinctrl-1 = <&uart1_gpios>; 201 BT,reset_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 202 BT,wake_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 203 BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 204 status = "okay"; 205 }; 206}; 207 208&cpu0 { 209 cpu-supply = <&vdd_cpu>; 210}; 211 212&dfi { 213 status = "okay"; 214}; 215 216&display_subsystem { 217 status = "okay"; 218}; 219 220&dmc { 221 center-supply = <&vdd_logic>; 222 status = "okay"; 223}; 224 225&dsi { 226 status = "okay"; 227 228 panel@0 { 229 compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi"; 230 reg = <0>; 231 232 backlight = <&backlight>; 233 //power-supply=<&vcc_3v3>; 234 enable-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 235 reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 236 237 pinctrl-names = "default"; 238 pinctrl-0 = <&lcd_enable_gpio>, <&lcd_rst_gpio>; 239 240 prepare-delay-ms = <20>; 241 reset-delay-ms = <20>; 242 init-delay-ms = <20>; 243 enable-delay-ms = <120>; 244 disable-delay-ms = <20>; 245 unprepare-delay-ms = <20>; 246 247 width-mm = <135>; 248 height-mm = <216>; 249 250 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 251 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 252 dsi,format = <MIPI_DSI_FMT_RGB888>; 253 dsi,lanes = <4>; 254 255 panel-init-sequence = [ 256 15 00 02 E0 00 257 //--- PASSWORD ----// 258 15 00 02 E1 93 259 15 00 02 E2 65 260 15 00 02 E3 F8 261 15 00 02 80 03 262 //--- Page1 ----// 263 15 00 02 E0 01 264 //Set VCOM 265 15 00 02 00 00 266 15 00 02 01 3B 267 //Set VCOM_Reverse 268 //15 00 02 03 00 269 //15 00 02 04 A0 270 15 00 02 0C 74 271 //Set Gamma Power, VGMP,VGMN,VGSP,VGSN 272 15 00 02 17 00 273 15 00 02 18 AF //VGMP=4.8V 274 15 00 02 19 00 //VGSP=0.3V 275 15 00 02 1A 00 276 15 00 02 1B AF 277 15 00 02 1C 00 278 //SETPANEL 279 15 00 02 35 26 //ASP=0110 280 //SETPANEL 281 15 00 02 37 09 //SS=1,BGR=1 282 //SET RGBCYC 283 15 00 02 38 04 //JDT=100 column inversion 284 15 00 02 39 00 //RGB_N_EQ1, 0x12 285 15 00 02 3A 01 //RGB_N_EQ2, 0x18 286 15 00 02 3C 78 //SET EQ3 for TE_H 287 15 00 02 3D FF //SET CHGEN_ON, 288 15 00 02 3E FF //SET CHGEN_OFF, 289 15 00 02 3F 7F //SET CHGEN_OFF2, 290 //Set TCON 291 15 00 02 40 06 //RSO=800 RGB 292 15 00 02 41 A0 //LN=640->1280 line 293 15 00 02 42 81 //SLT 294 15 00 02 43 14 //VFP=20 295 15 00 02 44 23 //VBP=24 296 15 00 02 45 28 //HBP=40 297 //--- power voltage ----// 298 15 00 02 55 02 //DCDCM=0001, JD PWR_IC 299 15 00 02 57 69 300 15 00 02 59 0A //VCL = -2.9V 301 15 00 02 5A 2A //VGH = 15V 302 15 00 02 5B 17 //VGL = -11V 303 //--- Gamma ----// 304 15 00 02 5D 7F 305 15 00 02 5E 6B 306 15 00 02 5F 5C 307 15 00 02 60 4F 308 15 00 02 61 4D 309 15 00 02 62 3F 310 15 00 02 63 42 311 15 00 02 64 2B 312 15 00 02 65 44 313 15 00 02 66 43 314 15 00 02 67 43 315 15 00 02 68 63 316 15 00 02 69 52 317 15 00 02 6A 5A 318 15 00 02 6B 4F 319 15 00 02 6C 4E 320 15 00 02 6D 20 321 15 00 02 6E 0F 322 15 00 02 6F 00 323 15 00 02 70 7F 324 15 00 02 71 6B 325 15 00 02 72 5C 326 15 00 02 73 4F 327 15 00 02 74 4D 328 15 00 02 75 3F 329 15 00 02 76 42 330 15 00 02 77 2B 331 15 00 02 78 44 332 15 00 02 79 43 333 15 00 02 7A 43 334 15 00 02 7B 63 335 15 00 02 7C 52 336 15 00 02 7D 5A 337 15 00 02 7E 4F 338 15 00 02 7F 4E 339 15 00 02 80 20 340 15 00 02 81 0F 341 15 00 02 82 00 342 //Page2, for GIP 343 15 00 02 E0 02 344 //GIP_L Pin mapping 345 15 00 02 00 02 //STV3 -> STV2 346 15 00 02 01 02 //Stv3 -> STV2 347 15 00 02 02 00 //STV4 -> STV0 348 15 00 02 03 00 //STV4 -> STV0 349 15 00 02 04 1E //VDS -> VGH 350 15 00 02 05 1E //VDS -> VGH 351 15 00 02 06 1F //VSD -> VGL 352 15 00 02 07 1F //VSD -> VGL 353 15 00 02 08 1F 354 15 00 02 09 17 //VDD2 -> FLM 355 15 00 02 0A 17 //VDD2 -> FLM 356 15 00 02 0B 37 //VDD1 -> INV_FLM 357 15 00 02 0C 37 //VDD1 -> INV_FLM 358 15 00 02 0D 47 //CLK8 -> CLK3 359 15 00 02 0E 47 //CLK8 -> CLK3 360 15 00 02 0F 45 //CLK6 -> CLK1 361 15 00 02 10 45 //CLK6 -> CLK1 362 15 00 02 11 4B //CLK4 -> CLK7 363 15 00 02 12 4B //CLK4 -> CLK7 364 15 00 02 13 49 //CLK2 -> CLK5 365 15 00 02 14 49 //CLK2 -> CLK5 366 15 00 02 15 1F //VGL 367 //GIP_R Pin mapping 368 15 00 02 16 01 //STV1 -> STV1 369 15 00 02 17 01 //STV1 -> STV1 370 15 00 02 18 00 //STV2 -> STV0 371 15 00 02 19 00 //STV2 -> STV0 372 15 00 02 1A 1E //VDS -> VGH 373 15 00 02 1B 1E //VDS -> VGH 374 15 00 02 1C 1F //VSD -> VGL 375 15 00 02 1D 1F //VSD -> VGL 376 15 00 02 1E 1F 377 15 00 02 1F 17 //VDD2 -> FLM 378 15 00 02 20 17 //VDD2 -> FLM 379 15 00 02 21 37 //VDD1 -> INV_FLM 380 15 00 02 22 37 //VDD1 -> INV_FLM 381 15 00 02 23 46 //CLK7 -> CLK2 382 15 00 02 24 46 //CLK7 -> CLK2 383 15 00 02 25 44 //CLK5 -> CLK0 384 15 00 02 26 44 //CLK5 -> CLK0 385 15 00 02 27 4A //CLK3 -> CLK6 386 15 00 02 28 4A //CLK3 -> CLK6 387 15 00 02 29 48 //CLK1 -> CLK4 388 15 00 02 2A 48 //CLK1 -> CLK4 389 15 00 02 2B 1F //VGL 390 //GIP_L_GS Pin mapping 391 15 00 02 2C 01 //STV3 -> STV1 392 15 00 02 2D 01 393 15 00 02 2E 00 //STV4 -> STV0 394 15 00 02 2F 00 395 15 00 02 30 1F //VDS -> VGL 396 15 00 02 31 1F 397 15 00 02 32 1E //VSD -> VGH 398 15 00 02 33 1E 399 15 00 02 34 1F // 400 15 00 02 35 17 //VDD2 -> FLM 401 15 00 02 36 17 402 15 00 02 37 37 //VDD1 -> INV_FLM 403 15 00 02 38 37 404 15 00 02 39 08 //CLK8 -> CLK4 405 15 00 02 3A 08 406 15 00 02 3B 0A //CLK6 -> CLK6 407 15 00 02 3C 0A 408 15 00 02 3D 04 //CLK4 -> CLK0 409 15 00 02 3E 04 410 15 00 02 3F 06 //CLK2 -> CLK2 411 15 00 02 40 06 412 15 00 02 41 1F //VGL 413 //GIP_R_GS Pin mapping 414 15 00 02 42 02 //STV1 -> STV2 415 15 00 02 43 02 416 15 00 02 44 00 //STV2 -> STV0 417 15 00 02 45 00 418 15 00 02 46 1F //VDS -> VGL 419 15 00 02 47 1F 420 15 00 02 48 1E //VSD -> VGH 421 15 00 02 49 1E 422 15 00 02 4A 1F // 423 15 00 02 4B 17 //VDD2 -> FLM 424 15 00 02 4C 17 425 15 00 02 4D 37 //VDD1 -> INV_FLM 426 15 00 02 4E 37 427 15 00 02 4F 09 //CLK7 -> CLK5 428 15 00 02 50 09 429 15 00 02 51 0B //CLK5 -> CLK7 430 15 00 02 52 0B 431 15 00 02 53 05 //CLK3 -> CLK1 432 15 00 02 54 05 433 15 00 02 55 07 //CLK1 -> CLK3 434 15 00 02 56 07 435 15 00 02 57 1F //VGL 436 //GIP Timing 437 15 00 02 58 40 438 15 00 02 5B 30 //STV_NUM,STV_S0 439 15 00 02 5C 16 //STV_S0 440 15 00 02 5D 34 //STV_W / S1 441 15 00 02 5E 05 //STV_S2 442 15 00 02 5F 02 //STV_S3 443 15 00 02 63 00 //SETV_ON 444 15 00 02 64 6A //SETV_OFF 445 15 00 02 67 73 446 15 00 02 68 1D //CKV_S0 447 15 00 02 69 08 448 15 00 02 6A 6A 449 15 00 02 6B 08 //Dummy clk 450 15 00 02 6C 00 451 15 00 02 6D 00 452 15 00 02 6E 00 453 15 00 02 6F 88 454 15 00 02 75 FF 455 15 00 02 77 DD //VEN_EN=1 456 15 00 02 78 3F 457 15 00 02 79 15 //0x0C 458 15 00 02 7A 17 //VEN_S0 459 15 00 02 7D 14 //VEN_ON 460 15 00 02 7E 82 //VEN_OFF 461 //Page4 462 15 00 02 E0 04 463 15 00 02 00 0E 464 15 00 02 02 B3 465 15 00 02 09 61 466 15 00 02 0E 48 467 //Page0 468 15 00 02 E0 00 469 15 00 02 E6 02 470 15 00 02 E7 0C 471 05 78 01 11 472 05 64 01 29 473 ]; 474 475 panel-exit-sequence = [ 476 05 01 01 28 477 05 03 01 10 478 ]; 479 480 display-timings { 481 native-mode = <&timing0>; 482 483 timing0: timing0 { 484 clock-frequency = <70000000>; 485 hactive = <800>; 486 vactive = <1280>; 487 488 hfront-porch = <40>; 489 hsync-len = <20>; 490 hback-porch = <20>; 491 492 vfront-porch = <20>; 493 vsync-len = <4>; 494 vback-porch = <20>; 495 496 hsync-active = <0>; 497 vsync-active = <0>; 498 de-active = <0>; 499 pixelclk-active = <1>; 500 }; 501 }; 502 503 ports { 504 #address-cells = <1>; 505 #size-cells = <0>; 506 507 port@0 { 508 reg = <0>; 509 panel_in_dsi: endpoint { 510 remote-endpoint = <&dsi_out_panel>; 511 }; 512 }; 513 }; 514 }; 515 516 ports { 517 #address-cells = <1>; 518 #size-cells = <0>; 519 520 port@1 { 521 reg = <1>; 522 dsi_out_panel: endpoint { 523 remote-endpoint = <&panel_in_dsi>; 524 }; 525 }; 526 }; 527 528}; 529 530&dsi_in_vp0 { 531 status = "okay"; 532}; 533 534&gpu { 535 mali-supply = <&vdd_gpu>; 536 status = "okay"; 537}; 538 539&i2c0 { 540 status = "okay"; 541 542 rk817: pmic@20 { 543 compatible = "rockchip,rk817"; 544 reg = <0x20>; 545 interrupt-parent = <&gpio0>; 546 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 547 548 pinctrl-names = "default", "pmic-sleep", 549 "pmic-power-off", "pmic-reset"; 550 pinctrl-0 = <&pmic_int>; 551 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 552 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 553 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 554 rockchip,system-power-controller; 555 wakeup-source; 556 #clock-cells = <1>; 557 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 558 /* 1: rst regs (default in codes), 0: rst the pmic */ 559 pmic-reset-func = <0>; 560 vcc1-supply = <&vcc_sys>; 561 vcc2-supply = <&vcc_sys>; 562 vcc3-supply = <&vcc_sys>; 563 vcc4-supply = <&vcc_sys>; 564 vcc5-supply = <&vcc_sys>; 565 vcc6-supply = <&vcc_sys>; 566 vcc7-supply = <&vcc_sys>; 567 vcc8-supply = <&vcc_sys>; 568 vcc9-supply = <&dcdc_boost>; 569 pwrkey { 570 status = "okay"; 571 }; 572 573 pinctrl_rk8xx: pinctrl_rk8xx { 574 gpio-controller; 575 #gpio-cells = <2>; 576 577 rk817_slppin_null: rk817_slppin_null { 578 pins = "gpio_slp"; 579 function = "pin_fun0"; 580 }; 581 582 rk817_slppin_slp: rk817_slppin_slp { 583 pins = "gpio_slp"; 584 function = "pin_fun1"; 585 }; 586 587 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 588 pins = "gpio_slp"; 589 function = "pin_fun2"; 590 }; 591 592 rk817_slppin_rst: rk817_slppin_rst { 593 pins = "gpio_slp"; 594 function = "pin_fun3"; 595 }; 596 }; 597 598 regulators { 599 vdd_logic: DCDC_REG1 { 600 regulator-always-on; 601 regulator-boot-on; 602 regulator-min-microvolt = <500000>; 603 regulator-max-microvolt = <1350000>; 604 regulator-init-microvolt = <900000>; 605 regulator-ramp-delay = <6001>; 606 regulator-initial-mode = <0x2>; 607 regulator-name = "vdd_logic"; 608 regulator-state-mem { 609 regulator-off-in-suspend; 610 regulator-suspend-microvolt = <900000>; 611 }; 612 }; 613 614 vdd_cpu: DCDC_REG2 { 615 regulator-always-on; 616 regulator-boot-on; 617 regulator-min-microvolt = <500000>; 618 regulator-max-microvolt = <1350000>; 619 regulator-init-microvolt = <900000>; 620 regulator-ramp-delay = <6001>; 621 regulator-initial-mode = <0x2>; 622 regulator-name = "vdd_cpu"; 623 regulator-state-mem { 624 regulator-off-in-suspend; 625 }; 626 }; 627 628 vcc_ddr: DCDC_REG3 { 629 regulator-always-on; 630 regulator-boot-on; 631 regulator-initial-mode = <0x2>; 632 regulator-name = "vcc_ddr"; 633 regulator-state-mem { 634 regulator-on-in-suspend; 635 }; 636 }; 637 638 vcc_3v3: DCDC_REG4 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <3300000>; 642 regulator-max-microvolt = <3300000>; 643 regulator-initial-mode = <0x2>; 644 regulator-name = "vcc_3v3"; 645 regulator-state-mem { 646 regulator-on-in-suspend; 647 regulator-suspend-microvolt = <3300000>; 648 }; 649 }; 650 651 vcca1v8_pmu: LDO_REG1 { 652 regulator-always-on; 653 regulator-boot-on; 654 regulator-min-microvolt = <1800000>; 655 regulator-max-microvolt = <1800000>; 656 regulator-name = "vcca1v8_pmu"; 657 regulator-state-mem { 658 regulator-on-in-suspend; 659 regulator-suspend-microvolt = <1800000>; 660 }; 661 }; 662 663 vdda_0v9: LDO_REG2 { 664 regulator-always-on; 665 regulator-boot-on; 666 regulator-min-microvolt = <900000>; 667 regulator-max-microvolt = <900000>; 668 regulator-name = "vdda_0v9"; 669 regulator-state-mem { 670 regulator-off-in-suspend; 671 }; 672 }; 673 674 vdda0v9_pmu: LDO_REG3 { 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <900000>; 678 regulator-max-microvolt = <900000>; 679 regulator-name = "vdda0v9_pmu"; 680 regulator-state-mem { 681 regulator-on-in-suspend; 682 regulator-suspend-microvolt = <900000>; 683 }; 684 }; 685 686 vccio_acodec: LDO_REG4 { 687 regulator-always-on; 688 regulator-boot-on; 689 regulator-min-microvolt = <3000000>; 690 regulator-max-microvolt = <3000000>; 691 regulator-name = "vccio_acodec"; 692 regulator-state-mem { 693 regulator-off-in-suspend; 694 }; 695 }; 696 697 vccio_sd: LDO_REG5 { 698 regulator-always-on; 699 regulator-boot-on; 700 regulator-min-microvolt = <1800000>; 701 regulator-max-microvolt = <3300000>; 702 regulator-name = "vccio_sd"; 703 regulator-state-mem { 704 regulator-off-in-suspend; 705 }; 706 }; 707 708 vcc3v3_pmu: LDO_REG6 { 709 regulator-always-on; 710 regulator-boot-on; 711 regulator-min-microvolt = <3300000>; 712 regulator-max-microvolt = <3300000>; 713 regulator-name = "vcc3v3_pmu"; 714 regulator-state-mem { 715 regulator-on-in-suspend; 716 regulator-suspend-microvolt = <3000000>; 717 }; 718 }; 719 720 vcc_1v8: LDO_REG7 { 721 regulator-always-on; 722 regulator-boot-on; 723 regulator-min-microvolt = <1800000>; 724 regulator-max-microvolt = <1800000>; 725 regulator-name = "vcc_1v8"; 726 regulator-state-mem { 727 regulator-off-in-suspend; 728 }; 729 }; 730 731 vcc1v2_dvp: LDO_REG8 { 732 regulator-min-microvolt = <1200000>; 733 regulator-max-microvolt = <1200000>; 734 regulator-name = "vcc1v2_dvp"; 735 regulator-state-mem { 736 regulator-off-in-suspend; 737 }; 738 }; 739 740 vcc2v8_dvp: LDO_REG9 { 741 regulator-min-microvolt = <2800000>; 742 regulator-max-microvolt = <2800000>; 743 regulator-name = "vcc2v8_dvp"; 744 regulator-state-mem { 745 regulator-off-in-suspend; 746 }; 747 }; 748 749 dcdc_boost: BOOST { 750 regulator-always-on; 751 regulator-boot-on; 752 regulator-min-microvolt = <5000000>; 753 regulator-max-microvolt = <5400000>; 754 regulator-name = "boost"; 755 regulator-state-mem { 756 regulator-off-in-suspend; 757 }; 758 }; 759 760 otg_switch: OTG_SWITCH { 761 regulator-name = "otg_switch"; 762 regulator-state-mem { 763 regulator-off-in-suspend; 764 }; 765 }; 766 }; 767 768 battery { 769 compatible = "rk817,battery"; 770 ocv_table = <3400 3671 3686 3712 3738 3756 3773 771 3787 3802 3819 3840 3868 3916 3959 772 3998 4041 4087 4138 4191 4247 4313>; 773 design_capacity = <5780>; 774 design_qmax = <6358>; 775 bat_res = <100>; 776 sleep_enter_current = <150>; 777 sleep_exit_current = <180>; 778 sleep_filter_current = <100>; 779 power_off_thresd = <3400>; 780 zero_algorithm_vol = <3950>; 781 max_soc_offset = <60>; 782 monitor_sec = <5>; 783 sample_res = <10>; 784 virtual_power = <0>; 785 }; 786 787 charger { 788 compatible = "rk817,charger"; 789 min_input_voltage = <4500>; 790 max_input_current = <1500>; 791 max_chrg_current = <2000>; 792 max_chrg_voltage = <4350>; 793 chrg_term_mode = <0>; 794 chrg_finish_cur = <300>; 795 virtual_power = <0>; 796 dc_det_adc = <0>; 797 extcon = <&u2phy>; 798 gate_function_disable = <1>; 799 }; 800 801 rk817_codec: codec { 802 #sound-dai-cells = <0>; 803 compatible = "rockchip,rk817-codec"; 804 clocks = <&mclkout_sai0>; 805 clock-names = "mclk"; 806 assigned-clocks = <&mclkout_sai0>; 807 assigned-clock-rates = <12288000>; 808 pinctrl-names = "default"; 809 pinctrl-0 = <&i2s0m0_mclk>; 810 hp-volume = <20>; 811 spk-volume = <25>; 812 use-ext-amplifier; 813 spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 814 status = "okay"; 815 }; 816 }; 817}; 818 819&i2c2 { 820 status = "okay"; 821 822 ts@40 { 823 compatible = "GSL,GSL3673_800X1280"; 824 reg = <0x40>; 825 irq_gpio_number = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; 826 rst_gpio_number = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 827 pinctrl-names = "default"; 828 pinctrl-0 = <&tp_gpio>; 829 }; 830}; 831 832&i2c3 { 833 status = "okay"; 834 pinctrl-names = "default"; 835 pinctrl-0 = <&i2c3m1_xfer>; 836 837 mpu6500_acc: mpu_acc@68 { 838 compatible = "mpu6500_acc"; 839 reg = <0x68>; 840 irq-gpio = <&gpio0 RK_PA7 IRQ_TYPE_EDGE_RISING>; 841 irq_enable = <0>; 842 poll_delay_ms = <30>; 843 type = <SENSOR_TYPE_ACCEL>; 844 layout = <5>; 845 }; 846 847 mpu6500_gyro: mpu_gyro@68 { 848 compatible = "mpu6500_gyro"; 849 reg = <0x68>; 850 poll_delay_ms = <30>; 851 type = <SENSOR_TYPE_GYROSCOPE>; 852 layout = <5>; 853 }; 854}; 855 856&jpegd { 857 status = "okay"; 858}; 859 860&jpegd_mmu { 861 status = "okay"; 862}; 863 864&mpp_srv { 865 status = "okay"; 866}; 867 868&pinctrl { 869 tp { 870 tp_gpio: tp-gpio { 871 rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_down>, 872 <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 873 }; 874 }; 875 876 headphone { 877 hp_det: hp-det { 878 rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 879 }; 880 }; 881 882 lcd { 883 lcd_rst_gpio: lcd-rst-gpio { 884 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 885 }; 886 887 lcd_enable_gpio: lcd-enable-gpio { 888 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 889 }; 890 }; 891 892 sdio-pwrseq { 893 wifi_enable_h: wifi-enable-h { 894 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 895 }; 896 }; 897 898 vcc_sd { 899 vcc_sd_h: vcc-sd-h { 900 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 901 }; 902 }; 903 904 wireless-wlan { 905 wifi_host_wake_irq: wifi-host-wake-irq { 906 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 907 }; 908 }; 909 910 wireless-bluetooth { 911 uart1_gpios: uart1-gpios { 912 rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 913 }; 914 }; 915}; 916 917&pwm5 { 918 status = "okay"; 919}; 920 921&pwm6 { 922 status = "okay"; 923}; 924 925&pwm7 { 926 status = "okay"; 927}; 928 929&rga2 { 930 status = "okay"; 931}; 932 933&rga2_mmu { 934 status = "okay"; 935}; 936 937&rkvdec { 938 status = "okay"; 939}; 940 941&rkvdec_mmu { 942 status = "okay"; 943}; 944 945&rkvenc { 946 status = "okay"; 947}; 948 949&rkvenc_mmu { 950 status = "okay"; 951}; 952 953&route_dsi { 954 status = "okay"; 955}; 956 957&sai0 { 958 status = "okay"; 959 pinctrl-names = "default"; 960 pinctrl-0 = <&i2s0m0_lrck 961 &i2s0m0_sclk 962 &i2s0m0_sdi0 963 &i2s0m0_sdo0>; 964}; 965 966&saradc0 { 967 status = "okay"; 968 vref-supply = <&vcc_1v8>; 969}; 970 971&sdhci { 972 bus-width = <8>; 973 no-sdio; 974 no-sd; 975 non-removable; 976 max-frequency = <200000000>; 977 mmc-hs400-1_8v; 978 mmc-hs400-enhanced-strobe; 979 status = "okay"; 980}; 981 982&sdmmc0 { 983 max-frequency = <200000000>; 984 no-sdio; 985 no-mmc; 986 bus-width = <4>; 987 cap-mmc-highspeed; 988 cap-sd-highspeed; 989 disable-wp; 990 sd-uhs-sdr104; 991 vmmc-supply = <&vcc_sd>; 992 vqmmc-supply = <&vccio_sd>; 993 pinctrl-names = "default"; 994 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 995 status = "okay"; 996}; 997 998&sdmmc1 { 999 max-frequency = <200000000>; 1000 no-sd; 1001 no-mmc; 1002 bus-width = <4>; 1003 disable-wp; 1004 cap-sd-highspeed; 1005 cap-sdio-irq; 1006 keep-power-in-suspend; 1007 mmc-pwrseq = <&sdio_pwrseq>; 1008 non-removable; 1009 pinctrl-names = "default"; 1010 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 1011 sd-uhs-sdr104; 1012 status = "okay"; 1013}; 1014 1015&tsadc { 1016 status = "okay"; 1017}; 1018 1019&u2phy { 1020 status = "okay"; 1021}; 1022 1023&u2phy_otg { 1024 status = "okay"; 1025 vbus-supply = <&otg_switch>; 1026}; 1027 1028&uart1 { 1029 status = "okay"; 1030 pinctrl-names = "default"; 1031 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 1032}; 1033 1034&usbdrd30 { 1035 status = "okay"; 1036}; 1037 1038&usbdrd_dwc3 { 1039 status = "okay"; 1040 1041 dr_mode = "otg"; 1042 extcon = <&u2phy>; 1043 maximum-speed = "high-speed"; 1044 phys = <&u2phy_otg>; 1045 phy-names = "usb2-phy"; 1046 snps,dis_u2_susphy_quirk; 1047 snps,usb2-lpm-disable; 1048}; 1049 1050&video_phy { 1051 status = "okay"; 1052}; 1053 1054&vop { 1055 status = "okay"; 1056}; 1057 1058&vop_mmu { 1059 status = "okay"; 1060}; 1061