1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&i2c0 { 11*4882a593Smuzhiyun status = "okay"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun rk809: pmic@20 { 14*4882a593Smuzhiyun compatible = "rockchip,rk809"; 15*4882a593Smuzhiyun reg = <0x20>; 16*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 17*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun pinctrl-names = "default", "pmic-sleep", 20*4882a593Smuzhiyun "pmic-power-off", "pmic-reset"; 21*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 22*4882a593Smuzhiyun pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 23*4882a593Smuzhiyun pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 24*4882a593Smuzhiyun pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 25*4882a593Smuzhiyun rockchip,system-power-controller; 26*4882a593Smuzhiyun wakeup-source; 27*4882a593Smuzhiyun #clock-cells = <1>; 28*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 29*4882a593Smuzhiyun /* 1: rst regs (default in codes), 0: rst the pmic */ 30*4882a593Smuzhiyun pmic-reset-func = <0>; 31*4882a593Smuzhiyun /* not save the PMIC_POWER_EN register in uboot */ 32*4882a593Smuzhiyun not-save-power-en = <1>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vcc1-supply = <&vcc3v3_sys>; 35*4882a593Smuzhiyun vcc2-supply = <&vcc3v3_sys>; 36*4882a593Smuzhiyun vcc3-supply = <&vcc3v3_sys>; 37*4882a593Smuzhiyun vcc4-supply = <&vcc3v3_sys>; 38*4882a593Smuzhiyun vcc5-supply = <&vcc3v3_sys>; 39*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 40*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 41*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 42*4882a593Smuzhiyun vcc9-supply = <&vcc3v3_sys>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun pwrkey { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pinctrl_rk8xx: pinctrl_rk8xx { 49*4882a593Smuzhiyun gpio-controller; 50*4882a593Smuzhiyun #gpio-cells = <2>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun rk817_slppin_null: rk817_slppin_null { 53*4882a593Smuzhiyun pins = "gpio_slp"; 54*4882a593Smuzhiyun function = "pin_fun0"; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun rk817_slppin_slp: rk817_slppin_slp { 58*4882a593Smuzhiyun pins = "gpio_slp"; 59*4882a593Smuzhiyun function = "pin_fun1"; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun rk817_slppin_pwrdn: rk817_slppin_pwrdn { 63*4882a593Smuzhiyun pins = "gpio_slp"; 64*4882a593Smuzhiyun function = "pin_fun2"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun rk817_slppin_rst: rk817_slppin_rst { 68*4882a593Smuzhiyun pins = "gpio_slp"; 69*4882a593Smuzhiyun function = "pin_fun3"; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun regulators { 74*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 75*4882a593Smuzhiyun regulator-always-on; 76*4882a593Smuzhiyun regulator-boot-on; 77*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 78*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 79*4882a593Smuzhiyun regulator-init-microvolt = <900000>; 80*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 81*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 82*4882a593Smuzhiyun regulator-name = "vdd_logic"; 83*4882a593Smuzhiyun regulator-state-mem { 84*4882a593Smuzhiyun regulator-off-in-suspend; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun vdd_cpu: DCDC_REG2 { 89*4882a593Smuzhiyun regulator-always-on; 90*4882a593Smuzhiyun regulator-boot-on; 91*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 92*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 93*4882a593Smuzhiyun regulator-init-microvolt = <900000>; 94*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 95*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 96*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 97*4882a593Smuzhiyun regulator-state-mem { 98*4882a593Smuzhiyun regulator-off-in-suspend; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 103*4882a593Smuzhiyun regulator-always-on; 104*4882a593Smuzhiyun regulator-boot-on; 105*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 106*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 107*4882a593Smuzhiyun regulator-state-mem { 108*4882a593Smuzhiyun regulator-on-in-suspend; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun vdd_gpu: DCDC_REG4 { 113*4882a593Smuzhiyun regulator-always-on; 114*4882a593Smuzhiyun regulator-boot-on; 115*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 116*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 117*4882a593Smuzhiyun regulator-init-microvolt = <900000>; 118*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 119*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 120*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 121*4882a593Smuzhiyun regulator-state-mem { 122*4882a593Smuzhiyun regulator-off-in-suspend; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun vcc2v8_dvp: LDO_REG1 { 127*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 128*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 129*4882a593Smuzhiyun regulator-name = "vcc2v8_dvp"; 130*4882a593Smuzhiyun regulator-state-mem { 131*4882a593Smuzhiyun regulator-off-in-suspend; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun vdda_0v9: LDO_REG2 { 136*4882a593Smuzhiyun regulator-always-on; 137*4882a593Smuzhiyun regulator-boot-on; 138*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 139*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 140*4882a593Smuzhiyun regulator-name = "vdda_0v9"; 141*4882a593Smuzhiyun regulator-state-mem { 142*4882a593Smuzhiyun regulator-off-in-suspend; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun vdda0v9_pmu: LDO_REG3 { 147*4882a593Smuzhiyun regulator-always-on; 148*4882a593Smuzhiyun regulator-boot-on; 149*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 150*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 151*4882a593Smuzhiyun regulator-name = "vdda0v9_pmu"; 152*4882a593Smuzhiyun regulator-state-mem { 153*4882a593Smuzhiyun regulator-on-in-suspend; 154*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun vccio_acodec: LDO_REG4 { 159*4882a593Smuzhiyun regulator-always-on; 160*4882a593Smuzhiyun regulator-boot-on; 161*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 162*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 163*4882a593Smuzhiyun regulator-name = "vccio_acodec"; 164*4882a593Smuzhiyun regulator-state-mem { 165*4882a593Smuzhiyun regulator-off-in-suspend; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 170*4882a593Smuzhiyun regulator-always-on; 171*4882a593Smuzhiyun regulator-boot-on; 172*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 173*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 174*4882a593Smuzhiyun regulator-name = "vccio_sd"; 175*4882a593Smuzhiyun regulator-state-mem { 176*4882a593Smuzhiyun regulator-off-in-suspend; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun vcc3v3_pmu: LDO_REG6 { 181*4882a593Smuzhiyun regulator-always-on; 182*4882a593Smuzhiyun regulator-boot-on; 183*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 184*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 185*4882a593Smuzhiyun regulator-name = "vcc3v3_pmu"; 186*4882a593Smuzhiyun regulator-state-mem { 187*4882a593Smuzhiyun regulator-on-in-suspend; 188*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun vcca_1v8: LDO_REG7 { 193*4882a593Smuzhiyun regulator-always-on; 194*4882a593Smuzhiyun regulator-boot-on; 195*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 196*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 197*4882a593Smuzhiyun regulator-name = "vcca_1v8"; 198*4882a593Smuzhiyun regulator-state-mem { 199*4882a593Smuzhiyun regulator-off-in-suspend; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun vcca1v8_pmu: LDO_REG8 { 204*4882a593Smuzhiyun regulator-always-on; 205*4882a593Smuzhiyun regulator-boot-on; 206*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 208*4882a593Smuzhiyun regulator-name = "vcca1v8_pmu"; 209*4882a593Smuzhiyun regulator-state-mem { 210*4882a593Smuzhiyun regulator-on-in-suspend; 211*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG9 { 216*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 217*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 218*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 219*4882a593Smuzhiyun regulator-state-mem { 220*4882a593Smuzhiyun regulator-off-in-suspend; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vcc_1v8: DCDC_REG5 { 225*4882a593Smuzhiyun regulator-always-on; 226*4882a593Smuzhiyun regulator-boot-on; 227*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 228*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 229*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-off-in-suspend; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vcc_3v3: SWITCH_REG1 { 236*4882a593Smuzhiyun regulator-always-on; 237*4882a593Smuzhiyun regulator-boot-on; 238*4882a593Smuzhiyun regulator-name = "vcc_3v3"; 239*4882a593Smuzhiyun regulator-state-mem { 240*4882a593Smuzhiyun regulator-off-in-suspend; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun vcc3v3_sd: SWITCH_REG2 { 245*4882a593Smuzhiyun regulator-always-on; 246*4882a593Smuzhiyun regulator-boot-on; 247*4882a593Smuzhiyun regulator-name = "vcc3v3_sd"; 248*4882a593Smuzhiyun regulator-state-mem { 249*4882a593Smuzhiyun regulator-off-in-suspend; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun rk809_codec: codec { 255*4882a593Smuzhiyun #sound-dai-cells = <1>; 256*4882a593Smuzhiyun compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 257*4882a593Smuzhiyun clocks = <&mclkout_sai0>; 258*4882a593Smuzhiyun clock-names = "mclk"; 259*4882a593Smuzhiyun assigned-clocks = <&mclkout_sai0>; 260*4882a593Smuzhiyun assigned-clock-rates = <12288000>; 261*4882a593Smuzhiyun pinctrl-names = "default"; 262*4882a593Smuzhiyun pinctrl-0 = <&i2s0m0_mclk>; 263*4882a593Smuzhiyun hp-volume = <20>; 264*4882a593Smuzhiyun spk-volume = <3>; 265*4882a593Smuzhiyun mic-in-differential; 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun}; 270