xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3562-evb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	adc_keys: adc-keys {
14*4882a593Smuzhiyun		compatible = "adc-keys";
15*4882a593Smuzhiyun		io-channels = <&saradc0 1>;
16*4882a593Smuzhiyun		io-channel-names = "buttons";
17*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
18*4882a593Smuzhiyun		poll-interval = <100>;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun		vol-up-key {
21*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
22*4882a593Smuzhiyun			label = "volume up";
23*4882a593Smuzhiyun			press-threshold-microvolt = <17000>;
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		vol-down-key {
27*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
28*4882a593Smuzhiyun			label = "volume down";
29*4882a593Smuzhiyun			press-threshold-microvolt = <414000>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		menu-key {
33*4882a593Smuzhiyun			linux,code = <KEY_MENU>;
34*4882a593Smuzhiyun			label = "menu";
35*4882a593Smuzhiyun			press-threshold-microvolt = <800000>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		back-key {
39*4882a593Smuzhiyun			linux,code = <KEY_BACK>;
40*4882a593Smuzhiyun			label = "back";
41*4882a593Smuzhiyun			press-threshold-microvolt = <1200000>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	backlight: backlight {
46*4882a593Smuzhiyun		compatible = "pwm-backlight";
47*4882a593Smuzhiyun		pwms = <&pwm5 0 25000 0>;
48*4882a593Smuzhiyun		brightness-levels = <
49*4882a593Smuzhiyun			  0  20  20  21  21  22  22  23
50*4882a593Smuzhiyun			 23  24  24  25  25  26  26  27
51*4882a593Smuzhiyun			 27  28  28  29  29  30  30  31
52*4882a593Smuzhiyun			 31  32  32  33  33  34  34  35
53*4882a593Smuzhiyun			 35  36  36  37  37  38  38  39
54*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
55*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
56*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
57*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
58*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
59*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
60*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
61*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
62*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
63*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
64*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
65*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
66*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
67*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
68*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
69*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
70*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
71*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
72*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
73*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
74*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
75*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
76*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
77*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
78*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
79*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
80*4882a593Smuzhiyun			248 249 250 251 252 253 254 255
81*4882a593Smuzhiyun		>;
82*4882a593Smuzhiyun		default-brightness-level = <200>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	pdm_codec: dummy-codec {
86*4882a593Smuzhiyun		status = "okay";
87*4882a593Smuzhiyun		compatible = "rockchip,dummy-codec";
88*4882a593Smuzhiyun		#sound-dai-cells = <0>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	pdm_mic_array: pdm-mic-array {
92*4882a593Smuzhiyun		status = "disabled";
93*4882a593Smuzhiyun		compatible = "simple-audio-card";
94*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,pdm-mic-array";
95*4882a593Smuzhiyun		simple-audio-card,cpu {
96*4882a593Smuzhiyun			sound-dai = <&pdm>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun		simple-audio-card,codec {
99*4882a593Smuzhiyun			sound-dai = <&pdm_codec>;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	spdif_out: spdif-out {
104*4882a593Smuzhiyun		status = "okay";
105*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
106*4882a593Smuzhiyun		#sound-dai-cells = <0>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	spdif-sound {
110*4882a593Smuzhiyun		status = "okay";
111*4882a593Smuzhiyun		compatible = "simple-audio-card";
112*4882a593Smuzhiyun		simple-audio-card,name = "rk-spdif-sound";
113*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
114*4882a593Smuzhiyun		simple-audio-card,cpu {
115*4882a593Smuzhiyun			sound-dai = <&spdif_8ch>;
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun		simple-audio-card,codec {
118*4882a593Smuzhiyun			sound-dai = <&spdif_out>;
119*4882a593Smuzhiyun		};
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	test-power {
123*4882a593Smuzhiyun		status = "okay";
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	vcc3v3_lcd_n: vcc3v3-lcd0-n {
127*4882a593Smuzhiyun		compatible = "regulator-fixed";
128*4882a593Smuzhiyun		regulator-name = "vcc3v3_lcd_n";
129*4882a593Smuzhiyun		regulator-boot-on;
130*4882a593Smuzhiyun		regulator-state-mem {
131*4882a593Smuzhiyun			regulator-off-in-suspend;
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&cpu0 {
137*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&dfi {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&display_subsystem {
145*4882a593Smuzhiyun	status = "okay";
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&dmc {
149*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
150*4882a593Smuzhiyun	status = "okay";
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&dsi {
154*4882a593Smuzhiyun	status = "disabled";
155*4882a593Smuzhiyun	//rockchip,lane-rate = <1000>;
156*4882a593Smuzhiyun	dsi_panel: panel@0 {
157*4882a593Smuzhiyun		status = "okay";
158*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
159*4882a593Smuzhiyun		reg = <0>;
160*4882a593Smuzhiyun		backlight = <&backlight>;
161*4882a593Smuzhiyun		reset-delay-ms = <60>;
162*4882a593Smuzhiyun		enable-delay-ms = <60>;
163*4882a593Smuzhiyun		prepare-delay-ms = <60>;
164*4882a593Smuzhiyun		unprepare-delay-ms = <60>;
165*4882a593Smuzhiyun		disable-delay-ms = <60>;
166*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
167*4882a593Smuzhiyun			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
168*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
169*4882a593Smuzhiyun		dsi,lanes  = <4>;
170*4882a593Smuzhiyun		panel-init-sequence = [
171*4882a593Smuzhiyun			23 00 02 FE 21
172*4882a593Smuzhiyun			23 00 02 04 00
173*4882a593Smuzhiyun			23 00 02 00 64
174*4882a593Smuzhiyun			23 00 02 2A 00
175*4882a593Smuzhiyun			23 00 02 26 64
176*4882a593Smuzhiyun			23 00 02 54 00
177*4882a593Smuzhiyun			23 00 02 50 64
178*4882a593Smuzhiyun			23 00 02 7B 00
179*4882a593Smuzhiyun			23 00 02 77 64
180*4882a593Smuzhiyun			23 00 02 A2 00
181*4882a593Smuzhiyun			23 00 02 9D 64
182*4882a593Smuzhiyun			23 00 02 C9 00
183*4882a593Smuzhiyun			23 00 02 C5 64
184*4882a593Smuzhiyun			23 00 02 01 71
185*4882a593Smuzhiyun			23 00 02 27 71
186*4882a593Smuzhiyun			23 00 02 51 71
187*4882a593Smuzhiyun			23 00 02 78 71
188*4882a593Smuzhiyun			23 00 02 9E 71
189*4882a593Smuzhiyun			23 00 02 C6 71
190*4882a593Smuzhiyun			23 00 02 02 89
191*4882a593Smuzhiyun			23 00 02 28 89
192*4882a593Smuzhiyun			23 00 02 52 89
193*4882a593Smuzhiyun			23 00 02 79 89
194*4882a593Smuzhiyun			23 00 02 9F 89
195*4882a593Smuzhiyun			23 00 02 C7 89
196*4882a593Smuzhiyun			23 00 02 03 9E
197*4882a593Smuzhiyun			23 00 02 29 9E
198*4882a593Smuzhiyun			23 00 02 53 9E
199*4882a593Smuzhiyun			23 00 02 7A 9E
200*4882a593Smuzhiyun			23 00 02 A0 9E
201*4882a593Smuzhiyun			23 00 02 C8 9E
202*4882a593Smuzhiyun			23 00 02 09 00
203*4882a593Smuzhiyun			23 00 02 05 B0
204*4882a593Smuzhiyun			23 00 02 31 00
205*4882a593Smuzhiyun			23 00 02 2B B0
206*4882a593Smuzhiyun			23 00 02 5A 00
207*4882a593Smuzhiyun			23 00 02 55 B0
208*4882a593Smuzhiyun			23 00 02 80 00
209*4882a593Smuzhiyun			23 00 02 7C B0
210*4882a593Smuzhiyun			23 00 02 A7 00
211*4882a593Smuzhiyun			23 00 02 A3 B0
212*4882a593Smuzhiyun			23 00 02 CE 00
213*4882a593Smuzhiyun			23 00 02 CA B0
214*4882a593Smuzhiyun			23 00 02 06 C0
215*4882a593Smuzhiyun			23 00 02 2D C0
216*4882a593Smuzhiyun			23 00 02 56 C0
217*4882a593Smuzhiyun			23 00 02 7D C0
218*4882a593Smuzhiyun			23 00 02 A4 C0
219*4882a593Smuzhiyun			23 00 02 CB C0
220*4882a593Smuzhiyun			23 00 02 07 CF
221*4882a593Smuzhiyun			23 00 02 2F CF
222*4882a593Smuzhiyun			23 00 02 58 CF
223*4882a593Smuzhiyun			23 00 02 7E CF
224*4882a593Smuzhiyun			23 00 02 A5 CF
225*4882a593Smuzhiyun			23 00 02 CC CF
226*4882a593Smuzhiyun			23 00 02 08 DD
227*4882a593Smuzhiyun			23 00 02 30 DD
228*4882a593Smuzhiyun			23 00 02 59 DD
229*4882a593Smuzhiyun			23 00 02 7F DD
230*4882a593Smuzhiyun			23 00 02 A6 DD
231*4882a593Smuzhiyun			23 00 02 CD DD
232*4882a593Smuzhiyun			23 00 02 0E 15
233*4882a593Smuzhiyun			23 00 02 0A E9
234*4882a593Smuzhiyun			23 00 02 36 15
235*4882a593Smuzhiyun			23 00 02 32 E9
236*4882a593Smuzhiyun			23 00 02 5F 15
237*4882a593Smuzhiyun			23 00 02 5B E9
238*4882a593Smuzhiyun			23 00 02 85 15
239*4882a593Smuzhiyun			23 00 02 81 E9
240*4882a593Smuzhiyun			23 00 02 AD 15
241*4882a593Smuzhiyun			23 00 02 A9 E9
242*4882a593Smuzhiyun			23 00 02 D3 15
243*4882a593Smuzhiyun			23 00 02 CF E9
244*4882a593Smuzhiyun			23 00 02 0B 14
245*4882a593Smuzhiyun			23 00 02 33 14
246*4882a593Smuzhiyun			23 00 02 5C 14
247*4882a593Smuzhiyun			23 00 02 82 14
248*4882a593Smuzhiyun			23 00 02 AA 14
249*4882a593Smuzhiyun			23 00 02 D0 14
250*4882a593Smuzhiyun			23 00 02 0C 36
251*4882a593Smuzhiyun			23 00 02 34 36
252*4882a593Smuzhiyun			23 00 02 5D 36
253*4882a593Smuzhiyun			23 00 02 83 36
254*4882a593Smuzhiyun			23 00 02 AB 36
255*4882a593Smuzhiyun			23 00 02 D1 36
256*4882a593Smuzhiyun			23 00 02 0D 6B
257*4882a593Smuzhiyun			23 00 02 35 6B
258*4882a593Smuzhiyun			23 00 02 5E 6B
259*4882a593Smuzhiyun			23 00 02 84 6B
260*4882a593Smuzhiyun			23 00 02 AC 6B
261*4882a593Smuzhiyun			23 00 02 D2 6B
262*4882a593Smuzhiyun			23 00 02 13 5A
263*4882a593Smuzhiyun			23 00 02 0F 94
264*4882a593Smuzhiyun			23 00 02 3B 5A
265*4882a593Smuzhiyun			23 00 02 37 94
266*4882a593Smuzhiyun			23 00 02 64 5A
267*4882a593Smuzhiyun			23 00 02 60 94
268*4882a593Smuzhiyun			23 00 02 8A 5A
269*4882a593Smuzhiyun			23 00 02 86 94
270*4882a593Smuzhiyun			23 00 02 B2 5A
271*4882a593Smuzhiyun			23 00 02 AE 94
272*4882a593Smuzhiyun			23 00 02 D8 5A
273*4882a593Smuzhiyun			23 00 02 D4 94
274*4882a593Smuzhiyun			23 00 02 10 D1
275*4882a593Smuzhiyun			23 00 02 38 D1
276*4882a593Smuzhiyun			23 00 02 61 D1
277*4882a593Smuzhiyun			23 00 02 87 D1
278*4882a593Smuzhiyun			23 00 02 AF D1
279*4882a593Smuzhiyun			23 00 02 D5 D1
280*4882a593Smuzhiyun			23 00 02 11 04
281*4882a593Smuzhiyun			23 00 02 39 04
282*4882a593Smuzhiyun			23 00 02 62 04
283*4882a593Smuzhiyun			23 00 02 88 04
284*4882a593Smuzhiyun			23 00 02 B0 04
285*4882a593Smuzhiyun			23 00 02 D6 04
286*4882a593Smuzhiyun			23 00 02 12 05
287*4882a593Smuzhiyun			23 00 02 3A 05
288*4882a593Smuzhiyun			23 00 02 63 05
289*4882a593Smuzhiyun			23 00 02 89 05
290*4882a593Smuzhiyun			23 00 02 B1 05
291*4882a593Smuzhiyun			23 00 02 D7 05
292*4882a593Smuzhiyun			23 00 02 18 AA
293*4882a593Smuzhiyun			23 00 02 14 36
294*4882a593Smuzhiyun			23 00 02 42 AA
295*4882a593Smuzhiyun			23 00 02 3D 36
296*4882a593Smuzhiyun			23 00 02 69 AA
297*4882a593Smuzhiyun			23 00 02 65 36
298*4882a593Smuzhiyun			23 00 02 8F AA
299*4882a593Smuzhiyun			23 00 02 8B 36
300*4882a593Smuzhiyun			23 00 02 B7 AA
301*4882a593Smuzhiyun			23 00 02 B3 36
302*4882a593Smuzhiyun			23 00 02 DD AA
303*4882a593Smuzhiyun			23 00 02 D9 36
304*4882a593Smuzhiyun			23 00 02 15 74
305*4882a593Smuzhiyun			23 00 02 3F 74
306*4882a593Smuzhiyun			23 00 02 66 74
307*4882a593Smuzhiyun			23 00 02 8C 74
308*4882a593Smuzhiyun			23 00 02 B4 74
309*4882a593Smuzhiyun			23 00 02 DA 74
310*4882a593Smuzhiyun			23 00 02 16 9F
311*4882a593Smuzhiyun			23 00 02 40 9F
312*4882a593Smuzhiyun			23 00 02 67 9F
313*4882a593Smuzhiyun			23 00 02 8D 9F
314*4882a593Smuzhiyun			23 00 02 B5 9F
315*4882a593Smuzhiyun			23 00 02 DB 9F
316*4882a593Smuzhiyun			23 00 02 17 DC
317*4882a593Smuzhiyun			23 00 02 41 DC
318*4882a593Smuzhiyun			23 00 02 68 DC
319*4882a593Smuzhiyun			23 00 02 8E DC
320*4882a593Smuzhiyun			23 00 02 B6 DC
321*4882a593Smuzhiyun			23 00 02 DC DC
322*4882a593Smuzhiyun			23 00 02 1D FF
323*4882a593Smuzhiyun			23 00 02 19 03
324*4882a593Smuzhiyun			23 00 02 47 FF
325*4882a593Smuzhiyun			23 00 02 43 03
326*4882a593Smuzhiyun			23 00 02 6E FF
327*4882a593Smuzhiyun			23 00 02 6A 03
328*4882a593Smuzhiyun			23 00 02 94 FF
329*4882a593Smuzhiyun			23 00 02 90 03
330*4882a593Smuzhiyun			23 00 02 BC FF
331*4882a593Smuzhiyun			23 00 02 B8 03
332*4882a593Smuzhiyun			23 00 02 E2 FF
333*4882a593Smuzhiyun			23 00 02 DE 03
334*4882a593Smuzhiyun			23 00 02 1A 35
335*4882a593Smuzhiyun			23 00 02 44 35
336*4882a593Smuzhiyun			23 00 02 6B 35
337*4882a593Smuzhiyun			23 00 02 91 35
338*4882a593Smuzhiyun			23 00 02 B9 35
339*4882a593Smuzhiyun			23 00 02 DF 35
340*4882a593Smuzhiyun			23 00 02 1B 45
341*4882a593Smuzhiyun			23 00 02 45 45
342*4882a593Smuzhiyun			23 00 02 6C 45
343*4882a593Smuzhiyun			23 00 02 92 45
344*4882a593Smuzhiyun			23 00 02 BA 45
345*4882a593Smuzhiyun			23 00 02 E0 45
346*4882a593Smuzhiyun			23 00 02 1C 55
347*4882a593Smuzhiyun			23 00 02 46 55
348*4882a593Smuzhiyun			23 00 02 6D 55
349*4882a593Smuzhiyun			23 00 02 93 55
350*4882a593Smuzhiyun			23 00 02 BB 55
351*4882a593Smuzhiyun			23 00 02 E1 55
352*4882a593Smuzhiyun			23 00 02 22 FF
353*4882a593Smuzhiyun			23 00 02 1E 68
354*4882a593Smuzhiyun			23 00 02 4C FF
355*4882a593Smuzhiyun			23 00 02 48 68
356*4882a593Smuzhiyun			23 00 02 73 FF
357*4882a593Smuzhiyun			23 00 02 6F 68
358*4882a593Smuzhiyun			23 00 02 99 FF
359*4882a593Smuzhiyun			23 00 02 95 68
360*4882a593Smuzhiyun			23 00 02 C1 FF
361*4882a593Smuzhiyun			23 00 02 BD 68
362*4882a593Smuzhiyun			23 00 02 E7 FF
363*4882a593Smuzhiyun			23 00 02 E3 68
364*4882a593Smuzhiyun			23 00 02 1F 7E
365*4882a593Smuzhiyun			23 00 02 49 7E
366*4882a593Smuzhiyun			23 00 02 70 7E
367*4882a593Smuzhiyun			23 00 02 96 7E
368*4882a593Smuzhiyun			23 00 02 BE 7E
369*4882a593Smuzhiyun			23 00 02 E4 7E
370*4882a593Smuzhiyun			23 00 02 20 97
371*4882a593Smuzhiyun			23 00 02 4A 97
372*4882a593Smuzhiyun			23 00 02 71 97
373*4882a593Smuzhiyun			23 00 02 97 97
374*4882a593Smuzhiyun			23 00 02 BF 97
375*4882a593Smuzhiyun			23 00 02 E5 97
376*4882a593Smuzhiyun			23 00 02 21 B5
377*4882a593Smuzhiyun			23 00 02 4B B5
378*4882a593Smuzhiyun			23 00 02 72 B5
379*4882a593Smuzhiyun			23 00 02 98 B5
380*4882a593Smuzhiyun			23 00 02 C0 B5
381*4882a593Smuzhiyun			23 00 02 E6 B5
382*4882a593Smuzhiyun			23 00 02 25 F0
383*4882a593Smuzhiyun			23 00 02 23 E8
384*4882a593Smuzhiyun			23 00 02 4F F0
385*4882a593Smuzhiyun			23 00 02 4D E8
386*4882a593Smuzhiyun			23 00 02 76 F0
387*4882a593Smuzhiyun			23 00 02 74 E8
388*4882a593Smuzhiyun			23 00 02 9C F0
389*4882a593Smuzhiyun			23 00 02 9A E8
390*4882a593Smuzhiyun			23 00 02 C4 F0
391*4882a593Smuzhiyun			23 00 02 C2 E8
392*4882a593Smuzhiyun			23 00 02 EA F0
393*4882a593Smuzhiyun			23 00 02 E8 E8
394*4882a593Smuzhiyun			23 00 02 24 FF
395*4882a593Smuzhiyun			23 00 02 4E FF
396*4882a593Smuzhiyun			23 00 02 75 FF
397*4882a593Smuzhiyun			23 00 02 9B FF
398*4882a593Smuzhiyun			23 00 02 C3 FF
399*4882a593Smuzhiyun			23 00 02 E9 FF
400*4882a593Smuzhiyun			23 00 02 FE 3D
401*4882a593Smuzhiyun			23 00 02 00 04
402*4882a593Smuzhiyun			23 00 02 FE 23
403*4882a593Smuzhiyun			23 00 02 08 82
404*4882a593Smuzhiyun			23 00 02 0A 00
405*4882a593Smuzhiyun			23 00 02 0B 00
406*4882a593Smuzhiyun			23 00 02 0C 01
407*4882a593Smuzhiyun			23 00 02 16 00
408*4882a593Smuzhiyun			23 00 02 18 02
409*4882a593Smuzhiyun			23 00 02 1B 04
410*4882a593Smuzhiyun			23 00 02 19 04
411*4882a593Smuzhiyun			23 00 02 1C 81
412*4882a593Smuzhiyun			23 00 02 1F 00
413*4882a593Smuzhiyun			23 00 02 20 03
414*4882a593Smuzhiyun			23 00 02 23 04
415*4882a593Smuzhiyun			23 00 02 21 01
416*4882a593Smuzhiyun			23 00 02 54 63
417*4882a593Smuzhiyun			23 00 02 55 54
418*4882a593Smuzhiyun			23 00 02 6E 45
419*4882a593Smuzhiyun			23 00 02 6D 36
420*4882a593Smuzhiyun			23 00 02 FE 3D
421*4882a593Smuzhiyun			23 00 02 55 78
422*4882a593Smuzhiyun			23 00 02 FE 20
423*4882a593Smuzhiyun			23 00 02 26 30
424*4882a593Smuzhiyun			23 00 02 FE 3D
425*4882a593Smuzhiyun			23 00 02 20 71
426*4882a593Smuzhiyun			23 00 02 50 8F
427*4882a593Smuzhiyun			23 00 02 51 8F
428*4882a593Smuzhiyun			23 00 02 FE 00
429*4882a593Smuzhiyun			23 00 02 35 00
430*4882a593Smuzhiyun			05 78 01 11
431*4882a593Smuzhiyun			05 1E 01 29
432*4882a593Smuzhiyun		];
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun		panel-exit-sequence = [
435*4882a593Smuzhiyun			05 00 01 28
436*4882a593Smuzhiyun			05 00 01 10
437*4882a593Smuzhiyun		];
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun		disp_timings0: display-timings {
440*4882a593Smuzhiyun			native-mode = <&dsi_timing0>;
441*4882a593Smuzhiyun			dsi_timing0: timing0 {
442*4882a593Smuzhiyun				clock-frequency = <132000000>;
443*4882a593Smuzhiyun				hactive = <1080>;
444*4882a593Smuzhiyun				vactive = <1920>;
445*4882a593Smuzhiyun				hfront-porch = <15>;
446*4882a593Smuzhiyun				hsync-len = <2>;
447*4882a593Smuzhiyun				hback-porch = <30>;
448*4882a593Smuzhiyun				vfront-porch = <15>;
449*4882a593Smuzhiyun				vsync-len = <2>;
450*4882a593Smuzhiyun				vback-porch = <15>;
451*4882a593Smuzhiyun				hsync-active = <0>;
452*4882a593Smuzhiyun				vsync-active = <0>;
453*4882a593Smuzhiyun				de-active = <0>;
454*4882a593Smuzhiyun				pixelclk-active = <1>;
455*4882a593Smuzhiyun			};
456*4882a593Smuzhiyun		};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun		ports {
459*4882a593Smuzhiyun			#address-cells = <1>;
460*4882a593Smuzhiyun			#size-cells = <0>;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun			port@0 {
463*4882a593Smuzhiyun				reg = <0>;
464*4882a593Smuzhiyun				panel_in_dsi: endpoint {
465*4882a593Smuzhiyun					remote-endpoint = <&dsi_out_panel>;
466*4882a593Smuzhiyun				};
467*4882a593Smuzhiyun			};
468*4882a593Smuzhiyun		};
469*4882a593Smuzhiyun	};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	ports {
472*4882a593Smuzhiyun		#address-cells = <1>;
473*4882a593Smuzhiyun		#size-cells = <0>;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun		port@1 {
476*4882a593Smuzhiyun			reg = <1>;
477*4882a593Smuzhiyun			dsi_out_panel: endpoint {
478*4882a593Smuzhiyun				remote-endpoint = <&panel_in_dsi>;
479*4882a593Smuzhiyun			};
480*4882a593Smuzhiyun		};
481*4882a593Smuzhiyun	};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun};
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun&gpu {
486*4882a593Smuzhiyun	status = "okay";
487*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
488*4882a593Smuzhiyun};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun&i2c2 {
491*4882a593Smuzhiyun	status = "okay";
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun	gt1x: gt1x@14 {
494*4882a593Smuzhiyun		compatible = "goodix,gt1x";
495*4882a593Smuzhiyun		reg = <0x14>;
496*4882a593Smuzhiyun		pinctrl-names = "default";
497*4882a593Smuzhiyun		pinctrl-0 = <&touch_gpio>;
498*4882a593Smuzhiyun		goodix,rst-gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
499*4882a593Smuzhiyun		goodix,irq-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
500*4882a593Smuzhiyun		/*
501*4882a593Smuzhiyun		 * power-supply should switche to vcc3v3_lcd1_n
502*4882a593Smuzhiyun		 * when mipi panel is connected to dsi1.
503*4882a593Smuzhiyun		 */
504*4882a593Smuzhiyun		power-supply = <&vcc3v3_lcd_n>;
505*4882a593Smuzhiyun	};
506*4882a593Smuzhiyun};
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun&jpegd {
509*4882a593Smuzhiyun	status = "okay";
510*4882a593Smuzhiyun};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun&jpegd_mmu {
513*4882a593Smuzhiyun	status = "okay";
514*4882a593Smuzhiyun};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun&mpp_srv {
517*4882a593Smuzhiyun	status = "okay";
518*4882a593Smuzhiyun};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun&pinctrl {
521*4882a593Smuzhiyun	touch {
522*4882a593Smuzhiyun		touch_gpio: touch-gpio {
523*4882a593Smuzhiyun			rockchip,pins =
524*4882a593Smuzhiyun				<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
525*4882a593Smuzhiyun				<0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
526*4882a593Smuzhiyun		};
527*4882a593Smuzhiyun	};
528*4882a593Smuzhiyun};
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun&pwm5 {
531*4882a593Smuzhiyun	status = "okay";
532*4882a593Smuzhiyun};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun&rga2 {
535*4882a593Smuzhiyun	status = "okay";
536*4882a593Smuzhiyun};
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun&rga2_mmu {
539*4882a593Smuzhiyun	status = "okay";
540*4882a593Smuzhiyun};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun&rknpu {
543*4882a593Smuzhiyun	rknpu-supply = <&vdd_npu>;
544*4882a593Smuzhiyun	status = "okay";
545*4882a593Smuzhiyun};
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun&rknpu_mmu {
548*4882a593Smuzhiyun	status = "okay";
549*4882a593Smuzhiyun};
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun&rkvdec {
552*4882a593Smuzhiyun	status = "okay";
553*4882a593Smuzhiyun};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun&rkvdec_mmu {
556*4882a593Smuzhiyun	status = "okay";
557*4882a593Smuzhiyun};
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun&rkvenc {
560*4882a593Smuzhiyun	status = "okay";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&rkvenc_mmu {
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun&saradc0 {
568*4882a593Smuzhiyun	status = "okay";
569*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
570*4882a593Smuzhiyun};
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun&sdhci {
573*4882a593Smuzhiyun	bus-width = <8>;
574*4882a593Smuzhiyun	no-sdio;
575*4882a593Smuzhiyun	no-sd;
576*4882a593Smuzhiyun	non-removable;
577*4882a593Smuzhiyun	max-frequency = <200000000>;
578*4882a593Smuzhiyun	mmc-hs400-1_8v;
579*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
580*4882a593Smuzhiyun	full-pwr-cycle-in-suspend;
581*4882a593Smuzhiyun	status = "okay";
582*4882a593Smuzhiyun};
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun&tsadc {
585*4882a593Smuzhiyun	status = "okay";
586*4882a593Smuzhiyun};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun&vop {
589*4882a593Smuzhiyun	status = "okay";
590*4882a593Smuzhiyun};
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun&vop_mmu {
593*4882a593Smuzhiyun	status = "okay";
594*4882a593Smuzhiyun};
595