1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 9*4882a593Smuzhiyun#include "rk3399pro-npu.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Rockchip RK3399pro-npu EVB V10 Board"; 13*4882a593Smuzhiyun compatible = "rockchip,rk3399pro-npu-evb-v10", "rockchip,rk3399pro-npu"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun chosen { 16*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 init=/init kpti=0"; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun keys: gpio-keys { 20*4882a593Smuzhiyun compatible = "gpio-keys"; 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&pwr_key>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun power { 25*4882a593Smuzhiyun gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 26*4882a593Smuzhiyun label = "GPIO Power"; 27*4882a593Smuzhiyun linux,code = <116>; 28*4882a593Smuzhiyun wakeup-source; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun fiq-debugger { 33*4882a593Smuzhiyun compatible = "rockchip,fiq-debugger"; 34*4882a593Smuzhiyun rockchip,serial-id = <2>; 35*4882a593Smuzhiyun rockchip,wake-irq = <0>; 36*4882a593Smuzhiyun /* If enable uart uses irq instead of fiq */ 37*4882a593Smuzhiyun rockchip,irq-mode-enable = <0>; 38*4882a593Smuzhiyun rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 39*4882a593Smuzhiyun interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 40*4882a593Smuzhiyun pinctrl-names = "default"; 41*4882a593Smuzhiyun pinctrl-0 = <&uart2m0_xfer>; 42*4882a593Smuzhiyun status = "okay"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun vdd_cpu: vdd-cpu { 46*4882a593Smuzhiyun compatible = "regulator-fixed"; 47*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 48*4882a593Smuzhiyun regulator-always-on; 49*4882a593Smuzhiyun regulator-boot-on; 50*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 51*4882a593Smuzhiyun regulator-max-microvolt = <850000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun vcc5v0_sys: vcc5v0-sys { 55*4882a593Smuzhiyun compatible = "regulator-fixed"; 56*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 57*4882a593Smuzhiyun regulator-always-on; 58*4882a593Smuzhiyun regulator-boot-on; 59*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 60*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&cpu0 { 65*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&cpu1 { 69*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&i2c1 { 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun vdd_npu: tcs4525@1c { 76*4882a593Smuzhiyun compatible = "tcs,tcs4525"; 77*4882a593Smuzhiyun reg = <0x1c>; 78*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 79*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 80*4882a593Smuzhiyun pinctrl-0 = <&vsel_gpio>; 81*4882a593Smuzhiyun vsel-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun regulator-name = "vdd_npu"; 83*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 84*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 85*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 86*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 87*4882a593Smuzhiyun regulator-always-on; 88*4882a593Smuzhiyun regulator-boot-on; 89*4882a593Smuzhiyun regulator-initial-state = <3>; 90*4882a593Smuzhiyun regulator-state-mem { 91*4882a593Smuzhiyun regulator-off-in-suspend; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&npu { 97*4882a593Smuzhiyun npu-supply = <&vdd_npu>; 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&combphy { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&u2phy { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&u2phy_otg { 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun}; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun&usbdrd3 { 114*4882a593Smuzhiyun status = "okay"; 115*4882a593Smuzhiyun}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun&usbdrd_dwc3 { 118*4882a593Smuzhiyun status = "okay"; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&tsadc { 122*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 123*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 124*4882a593Smuzhiyun pinctrl-names = "init", "default"; 125*4882a593Smuzhiyun pinctrl-0 = <&tsadc_otp_gpio>; 126*4882a593Smuzhiyun pinctrl-1 = <&tsadc_otp_out>; 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&pinctrl { 131*4882a593Smuzhiyun vsel_gpio: vsel-gpio { 132*4882a593Smuzhiyun rockchip,pins = 133*4882a593Smuzhiyun <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun pwr_key: pwr-key { 137*4882a593Smuzhiyun rockchip,pins = 138*4882a593Smuzhiyun <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun}; 141