1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 4/dts-v1/; 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/display/drm_mipi_dsi.h> 9#include <dt-bindings/sensor-dev.h> 10#include <dt-bindings/pwm/pwm.h> 11#include "dt-bindings/usb/pd.h" 12#include "rk3399pro.dtsi" 13#include "rk3399-linux.dtsi" 14#include "rk3399-opp.dtsi" 15#include "rk3399-vop-clk-set.dtsi" 16 17/ { 18 compatible = "rockchip,rk3399pro-evb-v10-linux", "rockchip,rk3399pro"; 19 20 adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 2>; 23 io-channel-names = "buttons"; 24 poll-interval = <100>; 25 keyup-threshold-microvolt = <1800000>; 26 27 esc-key { 28 linux,code = <KEY_ESC>; 29 label = "esc"; 30 press-threshold-microvolt = <1310000>; 31 }; 32 33 menu-key { 34 linux,code = <KEY_MENU>; 35 label = "menu"; 36 press-threshold-microvolt = <987000>; 37 }; 38 39 home-key { 40 linux,code = <KEY_HOME>; 41 label = "home"; 42 press-threshold-microvolt = <624000>; 43 }; 44 45 vol-down-key { 46 linux,code = <KEY_VOLUMEDOWN>; 47 label = "volume down"; 48 press-threshold-microvolt = <300000>; 49 }; 50 51 vol-up-key { 52 linux,code = <KEY_VOLUMEUP>; 53 label = "volume up"; 54 press-threshold-microvolt = <17000>; 55 }; 56 }; 57 58 backlight: backlight { 59 compatible = "pwm-backlight"; 60 pwms = <&pwm0 0 25000 0>; 61 brightness-levels = < 62 0 20 20 21 21 22 22 23 63 23 24 24 25 25 26 26 27 64 27 28 28 29 29 30 30 31 65 31 32 32 33 33 34 34 35 66 35 36 36 37 37 38 38 39 67 40 41 42 43 44 45 46 47 68 48 49 50 51 52 53 54 55 69 56 57 58 59 60 61 62 63 70 64 65 66 67 68 69 70 71 71 72 73 74 75 76 77 78 79 72 80 81 82 83 84 85 86 87 73 88 89 90 91 92 93 94 95 74 96 97 98 99 100 101 102 103 75 104 105 106 107 108 109 110 111 76 112 113 114 115 116 117 118 119 77 120 121 122 123 124 125 126 127 78 128 129 130 131 132 133 134 135 79 136 137 138 139 140 141 142 143 80 144 145 146 147 148 149 150 151 81 152 153 154 155 156 157 158 159 82 160 161 162 163 164 165 166 167 83 168 169 170 171 172 173 174 175 84 176 177 178 179 180 181 182 183 85 184 185 186 187 188 189 190 191 86 192 193 194 195 196 197 198 199 87 200 201 202 203 204 205 206 207 88 208 209 210 211 212 213 214 215 89 216 217 218 219 220 221 222 223 90 224 225 226 227 228 229 230 231 91 232 233 234 235 236 237 238 239 92 240 241 242 243 244 245 246 247 93 248 249 250 251 252 253 254 255 94 >; 95 default-brightness-level = <200>; 96 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 97 }; 98 99 clkin_gmac: external-gmac-clock { 100 compatible = "fixed-clock"; 101 clock-frequency = <125000000>; 102 clock-output-names = "clkin_gmac"; 103 #clock-cells = <0>; 104 }; 105 106 fiq_debugger: fiq-debugger { 107 compatible = "rockchip,fiq-debugger"; 108 rockchip,serial-id = <2>; 109 rockchip,wake-irq = <0>; 110 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 111 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 112 pinctrl-names = "default"; 113 pinctrl-0 = <&uart2c_xfer>; 114 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>; 115 }; 116 117 hdmi_sound: hdmi-sound { 118 status = "okay"; 119 compatible = "simple-audio-card"; 120 simple-audio-card,format = "i2s"; 121 simple-audio-card,mclk-fs = <256>; 122 simple-audio-card,name = "rockchip,hdmi"; 123 124 simple-audio-card,cpu { 125 sound-dai = <&i2s2>; 126 }; 127 simple-audio-card,codec { 128 sound-dai = <&hdmi>; 129 }; 130 }; 131 132 panel: panel { 133 compatible = "simple-panel"; 134 backlight = <&backlight>; 135 enable-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 136 prepare-delay-ms = <20>; 137 enable-delay-ms = <20>; 138 reset-delay-ms = <20>; 139 140 display-timings { 141 native-mode = <&timing0>; 142 143 timing0: timing0 { 144 clock-frequency = <200000000>; 145 hactive = <1536>; 146 vactive = <2048>; 147 hfront-porch = <12>; 148 hsync-len = <16>; 149 hback-porch = <48>; 150 vfront-porch = <8>; 151 vsync-len = <4>; 152 vback-porch = <8>; 153 hsync-active = <0>; 154 vsync-active = <0>; 155 de-active = <0>; 156 pixelclk-active = <0>; 157 }; 158 }; 159 160 ports { 161 panel_in: endpoint { 162 remote-endpoint = <&edp_out>; 163 }; 164 }; 165 }; 166 167 rk809_sound: rk809-sound { 168 compatible = "rockchip,multicodecs-card"; 169 rockchip,card-name = "rockchip,rk809-codec"; 170 rockchip,codec-hp-det; 171 rockchip,mclk-fs = <256>; 172 rockchip,cpu = <&i2s1>; 173 rockchip,codec = <&rk809_codec>; 174 }; 175 176 rk_headset: rk-headset { 177 compatible = "rockchip_headset"; 178 headset_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&hp_det>; 181 io-channels = <&saradc 3>; 182 }; 183 184 sdio_pwrseq: sdio-pwrseq { 185 compatible = "mmc-pwrseq-simple"; 186 clocks = <&rk809 1>; 187 clock-names = "ext_clock"; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&wifi_enable_h>; 190 191 /* 192 * On the module itself this is one of these (depending 193 * on the actual card populated): 194 * - SDIO_RESET_L_WL_REG_ON 195 * - PDN (power down when low) 196 */ 197 reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 198 }; 199 200 vbus_typec: vbus-typec-regulator { 201 compatible = "regulator-fixed"; 202 enable-active-high; 203 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&vcc5v0_typec0_en>; 206 regulator-name = "vbus_typec"; 207 vin-supply = <&vcc5v0_sys>; 208 }; 209 210 vcc_phy: vcc-phy-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "vcc_phy"; 213 regulator-always-on; 214 regulator-boot-on; 215 }; 216 217 vcc5v0_sys: vccsys { 218 compatible = "regulator-fixed"; 219 regulator-name = "vcc5v0_sys"; 220 regulator-always-on; 221 regulator-boot-on; 222 regulator-min-microvolt = <5000000>; 223 regulator-max-microvolt = <5000000>; 224 }; 225 226 wireless-wlan { 227 compatible = "wlan-platdata"; 228 rockchip,grf = <&grf>; 229 wifi_chip_type = "ap6398s"; 230 sdio_vref = <1800>; 231 WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 232 status = "okay"; 233 }; 234 235 wireless-bluetooth { 236 compatible = "bluetooth-platdata"; 237 clocks = <&rk809 1>; 238 clock-names = "ext_clock"; 239 uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; 240 pinctrl-names = "default", "rts_gpio"; 241 pinctrl-0 = <&uart0_rts>, <&bt_irq_gpio>; 242 pinctrl-1 = <&uart0_gpios>; 243 BT,reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 244 BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 245 BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 246 status = "okay"; 247 }; 248}; 249 250&cdn_dp { 251 status = "okay"; 252 phys = <&tcphy0_dp>; 253}; 254 255&cpu_l0 { 256 cpu-supply = <&vdd_cpu_l>; 257}; 258 259&cpu_l1 { 260 cpu-supply = <&vdd_cpu_l>; 261}; 262 263&cpu_l2 { 264 cpu-supply = <&vdd_cpu_l>; 265}; 266 267&cpu_l3 { 268 cpu-supply = <&vdd_cpu_l>; 269}; 270 271&cpu_b0 { 272 cpu-supply = <&vdd_cpu_b>; 273}; 274 275&cpu_b1 { 276 cpu-supply = <&vdd_cpu_b>; 277}; 278 279&display_subsystem { 280 status = "okay"; 281}; 282 283&dp_in_vopb { 284 status = "disabled"; 285}; 286 287&edp { 288 status = "okay"; 289 force-hpd; 290 291 ports { 292 port@1 { 293 reg = <1>; 294 295 edp_out: endpoint { 296 remote-endpoint = <&panel_in>; 297 }; 298 }; 299 }; 300}; 301 302&edp_in_vopb { 303 status = "disabled"; 304}; 305 306&emmc_phy { 307 status = "okay"; 308}; 309 310&fiq_debugger { 311 pinctrl-0 = <&uart2a_xfer>; 312}; 313 314&gmac { 315 phy-supply = <&vcc_phy>; 316 phy-mode = "rgmii"; 317 clock_in_out = "input"; 318 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 319 snps,reset-active-low; 320 snps,reset-delays-us = <0 10000 50000>; 321 assigned-clocks = <&cru SCLK_RMII_SRC>; 322 assigned-clock-parents = <&clkin_gmac>; 323 pinctrl-names = "default"; 324 pinctrl-0 = <&rgmii_pins>; 325 tx_delay = <0x28>; 326 rx_delay = <0x11>; 327 status = "okay"; 328}; 329 330&gpu { 331 status = "okay"; 332 mali-supply = <&vdd_gpu>; 333}; 334 335&hdmi { 336 status = "okay"; 337 #sound-dai-cells = <0>; 338 rockchip,phy-table = 339 <74250000 0x8009 0x0004 0x0272>, 340 <165000000 0x802b 0x0004 0x0209>, 341 <297000000 0x8039 0x0005 0x028d>, 342 <594000000 0x8039 0x0000 0x00f6>, 343 <000000000 0x0000 0x0000 0x0000>; 344}; 345 346&hdmi_in_vopl { 347 status = "disabled"; 348}; 349 350&i2c0 { 351 status = "okay"; 352 i2c-scl-rising-time-ns = <180>; 353 i2c-scl-falling-time-ns = <30>; 354 clock-frequency = <400000>; 355 356 rk809: pmic@20 { 357 compatible = "rockchip,rk809"; 358 reg = <0x20>; 359 interrupt-parent = <&gpio1>; 360 interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 361 pinctrl-names = "default", "pmic-sleep", 362 "pmic-power-off", "pmic-reset"; 363 pinctrl-0 = <&pmic_int_l>; 364 pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>; 365 pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>; 366 pinctrl-3 = <&soc_slppin_gpio>, <&rk809_slppin_rst>; 367 rockchip,system-power-controller; 368 pmic-reset-func = <0>; 369 wakeup-source; 370 #clock-cells = <1>; 371 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 372 373 vcc1-supply = <&vcc5v0_sys>; 374 vcc2-supply = <&vcc5v0_sys>; 375 vcc3-supply = <&vcc5v0_sys>; 376 vcc4-supply = <&vcc5v0_sys>; 377 vcc5-supply = <&vcc_buck5>; 378 vcc6-supply = <&vcc_buck5>; 379 vcc7-supply = <&vcc3v3_sys>; 380 vcc8-supply = <&vcc3v3_sys>; 381 vcc9-supply = <&vcc5v0_sys>; 382 383 pwrkey { 384 status = "okay"; 385 }; 386 387 rtc { 388 status = "okay"; 389 }; 390 391 pinctrl_rk8xx: pinctrl_rk8xx { 392 gpio-controller; 393 #gpio-cells = <2>; 394 395 rk809_slppin_null: rk809_slppin_null { 396 pins = "gpio_slp"; 397 function = "pin_fun0"; 398 }; 399 400 rk809_slppin_slp: rk809_slppin_slp { 401 pins = "gpio_slp"; 402 function = "pin_fun1"; 403 }; 404 405 rk809_slppin_pwrdn: rk809_slppin_pwrdn { 406 pins = "gpio_slp"; 407 function = "pin_fun2"; 408 }; 409 410 rk809_slppin_rst: rk809_slppin_rst { 411 pins = "gpio_slp"; 412 function = "pin_fun3"; 413 }; 414 }; 415 416 regulators { 417 vdd_log: DCDC_REG1 { 418 regulator-always-on; 419 regulator-boot-on; 420 regulator-min-microvolt = <750000>; 421 regulator-max-microvolt = <1350000>; 422 regulator-initial-mode = <0x2>; 423 regulator-name = "vdd_log"; 424 regulator-state-mem { 425 regulator-on-in-suspend; 426 regulator-suspend-microvolt = <900000>; 427 }; 428 }; 429 430 vdd_cpu_l: DCDC_REG2 { 431 regulator-always-on; 432 regulator-boot-on; 433 regulator-min-microvolt = <750000>; 434 regulator-max-microvolt = <1350000>; 435 regulator-ramp-delay = <6001>; 436 regulator-initial-mode = <0x2>; 437 regulator-name = "vdd_cpu_l"; 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 }; 441 }; 442 443 vcc_ddr: DCDC_REG3 { 444 regulator-always-on; 445 regulator-boot-on; 446 regulator-name = "vcc_ddr"; 447 regulator-initial-mode = <0x2>; 448 regulator-state-mem { 449 regulator-on-in-suspend; 450 }; 451 }; 452 453 vcc3v3_sys: DCDC_REG4 { 454 regulator-always-on; 455 regulator-boot-on; 456 regulator-min-microvolt = <3300000>; 457 regulator-max-microvolt = <3300000>; 458 regulator-initial-mode = <0x2>; 459 regulator-name = "vcc3v3_sys"; 460 regulator-state-mem { 461 regulator-on-in-suspend; 462 regulator-suspend-microvolt = <3300000>; 463 }; 464 }; 465 466 vcc_buck5: DCDC_REG5 { 467 regulator-always-on; 468 regulator-boot-on; 469 regulator-min-microvolt = <2200000>; 470 regulator-max-microvolt = <2200000>; 471 regulator-name = "vcc_buck5"; 472 regulator-state-mem { 473 regulator-on-in-suspend; 474 regulator-suspend-microvolt = <2200000>; 475 }; 476 }; 477 478 vcca_0v9: LDO_REG1 { 479 regulator-always-on; 480 regulator-boot-on; 481 regulator-min-microvolt = <900000>; 482 regulator-max-microvolt = <900000>; 483 regulator-name = "vcca_0v9"; 484 regulator-state-mem { 485 regulator-off-in-suspend; 486 }; 487 }; 488 489 vcc_1v8: LDO_REG2 { 490 regulator-always-on; 491 regulator-boot-on; 492 regulator-min-microvolt = <1800000>; 493 regulator-max-microvolt = <1800000>; 494 495 regulator-name = "vcc_1v8"; 496 regulator-state-mem { 497 regulator-on-in-suspend; 498 regulator-suspend-microvolt = <1800000>; 499 }; 500 }; 501 502 vcc0v9_soc: LDO_REG3 { 503 regulator-always-on; 504 regulator-boot-on; 505 regulator-min-microvolt = <900000>; 506 regulator-max-microvolt = <900000>; 507 508 regulator-name = "vcc0v9_soc"; 509 regulator-state-mem { 510 regulator-on-in-suspend; 511 regulator-suspend-microvolt = <900000>; 512 }; 513 }; 514 515 vcca_1v8: LDO_REG4 { 516 regulator-always-on; 517 regulator-boot-on; 518 regulator-min-microvolt = <1800000>; 519 regulator-max-microvolt = <1800000>; 520 521 regulator-name = "vcca_1v8"; 522 regulator-state-mem { 523 regulator-off-in-suspend; 524 }; 525 }; 526 527 vdd1v5_dvp: LDO_REG5 { 528 regulator-always-on; 529 regulator-boot-on; 530 regulator-min-microvolt = <1500000>; 531 regulator-max-microvolt = <1500000>; 532 533 regulator-name = "vdd1v5_dvp"; 534 regulator-state-mem { 535 regulator-off-in-suspend; 536 }; 537 }; 538 539 vcc_1v5: LDO_REG6 { 540 regulator-always-on; 541 regulator-boot-on; 542 regulator-min-microvolt = <1500000>; 543 regulator-max-microvolt = <1500000>; 544 545 regulator-name = "vcc_1v5"; 546 regulator-state-mem { 547 regulator-off-in-suspend; 548 }; 549 }; 550 551 vcc_3v0: LDO_REG7 { 552 regulator-always-on; 553 regulator-boot-on; 554 regulator-min-microvolt = <3000000>; 555 regulator-max-microvolt = <3000000>; 556 557 regulator-name = "vcc_3v0"; 558 regulator-state-mem { 559 regulator-off-in-suspend; 560 }; 561 }; 562 563 vccio_sd: LDO_REG8 { 564 regulator-always-on; 565 regulator-boot-on; 566 regulator-min-microvolt = <1800000>; 567 regulator-max-microvolt = <3300000>; 568 569 regulator-name = "vccio_sd"; 570 regulator-state-mem { 571 regulator-off-in-suspend; 572 }; 573 }; 574 575 vcc_sd: LDO_REG9 { 576 regulator-always-on; 577 regulator-boot-on; 578 regulator-min-microvolt = <3300000>; 579 regulator-max-microvolt = <3300000>; 580 581 regulator-name = "vcc_sd"; 582 regulator-state-mem { 583 regulator-off-in-suspend; 584 }; 585 }; 586 587 vcc5v0_usb: SWITCH_REG1 { 588 regulator-name = "vcc5v0_usb"; 589 regulator-state-mem { 590 regulator-on-in-suspend; 591 }; 592 }; 593 594 vccio_3v3: SWITCH_REG2 { 595 regulator-always-on; 596 regulator-boot-on; 597 regulator-name = "vccio_3v3"; 598 regulator-state-mem { 599 regulator-off-in-suspend; 600 }; 601 }; 602 }; 603 604 rk809_codec: codec { 605 #sound-dai-cells = <0>; 606 compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 607 clocks = <&cru SCLK_I2S_8CH_OUT>; 608 clock-names = "mclk"; 609 pinctrl-names = "default"; 610 pinctrl-0 = <&i2s_8ch_mclk>; 611 hp-volume = <20>; 612 spk-volume = <3>; 613 status = "okay"; 614 }; 615 }; 616 617 vdd_cpu_b: syr837@40 { 618 compatible = "silergy,syr827"; 619 reg = <0x40>; 620 vin-supply = <&vcc5v0_sys>; 621 regulator-compatible = "fan53555-reg"; 622 pinctrl-0 = <&vsel1_gpio>; 623 vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 624 regulator-name = "vdd_cpu_b"; 625 regulator-min-microvolt = <712500>; 626 regulator-max-microvolt = <1500000>; 627 regulator-ramp-delay = <1000>; 628 fcs,suspend-voltage-selector = <1>; 629 regulator-always-on; 630 regulator-boot-on; 631 regulator-initial-state = <3>; 632 regulator-state-mem { 633 regulator-off-in-suspend; 634 }; 635 }; 636 637 vdd_gpu: syr828@41 { 638 compatible = "silergy,syr828"; 639 status = "okay"; 640 reg = <0x41>; 641 vin-supply = <&vcc5v0_sys>; 642 regulator-compatible = "fan53555-reg"; 643 pinctrl-0 = <&vsel2_gpio>; 644 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 645 regulator-name = "vdd_gpu"; 646 regulator-min-microvolt = <735000>; 647 regulator-max-microvolt = <1400000>; 648 regulator-ramp-delay = <1000>; 649 fcs,suspend-voltage-selector = <1>; 650 regulator-always-on; 651 regulator-boot-on; 652 regulator-state-mem { 653 regulator-off-in-suspend; 654 }; 655 }; 656 657 bq25700: bq25700@6b { 658 compatible = "ti,bq25703"; 659 reg = <0x6b>; 660 interrupt-parent = <&gpio1>; 661 interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>; 662 pinctrl-names = "default"; 663 pinctrl-0 = <&charger_ok_int>; 664 ti,charge-current = <1500000>; 665 ti,max-charge-voltage = <8704000>; 666 ti,max-input-voltage = <20000000>; 667 ti,max-input-current = <6000000>; 668 ti,input-current-sdp = <500000>; 669 ti,input-current-dcp = <2000000>; 670 ti,input-current-cdp = <2000000>; 671 ti,input-current-dc = <2000000>; 672 ti,minimum-sys-voltage = <6700000>; 673 ti,otg-voltage = <5000000>; 674 ti,otg-current = <500000>; 675 ti,input-current = <500000>; 676 pd-charge-only = <0>; 677 status = "disabled"; 678 }; 679}; 680 681&i2c1 { 682 status = "okay"; 683 i2c-scl-rising-time-ns = <140>; 684 i2c-scl-falling-time-ns = <30>; 685 686 mpu6500@68 { 687 status = "okay"; 688 compatible = "invensense,mpu6500"; 689 reg = <0x68>; 690 irq-gpio = <&gpio3 RK_PD2 IRQ_TYPE_EDGE_RISING>; 691 mpu-int_config = <0x10>; 692 mpu-level_shifter = <0>; 693 mpu-orientation = <0 1 0 1 0 0 0 0 1>; 694 orientation-x= <1>; 695 orientation-y= <0>; 696 orientation-z= <0>; 697 mpu-debug = <1>; 698 }; 699 700 sensor@d { 701 status = "okay"; 702 compatible = "ak8963"; 703 reg = <0x0d>; 704 type = <SENSOR_TYPE_COMPASS>; 705 irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_EDGE_RISING>; 706 irq_enable = <0>; 707 poll_delay_ms = <30>; 708 layout = <3>; 709 }; 710 711 vm149c: vm149c@0c { 712 compatible = "silicon touch,vm149c"; 713 status = "okay"; 714 reg = <0x0c>; 715 rockchip,camera-module-index = <0>; 716 rockchip,camera-module-facing = "back"; 717 }; 718 719 ov13850: ov13850@10 { 720 compatible = "ovti,ov13850"; 721 status = "disabled"; 722 reg = <0x10>; 723 clocks = <&cru SCLK_CIF_OUT>; 724 clock-names = "xvclk"; 725 726 /* conflict with csi-ctl-gpios */ 727 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 728 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 729 pinctrl-names = "rockchip,camera_default"; 730 pinctrl-0 = <&cif_clkout>; 731 lens-focus = <&vm149c>; 732 733 port { 734 ucam_out0: endpoint { 735 remote-endpoint = <&mipi_in_ucam0>; 736 data-lanes = <1 2>; 737 }; 738 }; 739 }; 740 741 imx327: imx327@1a { 742 compatible = "sony,imx327"; 743 status = "okay"; 744 reg = <0x1a>; 745 clocks = <&cru SCLK_CIF_OUT>; 746 clock-names = "xvclk"; 747 /* conflict with csi-ctl-gpios */ 748 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 749 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 750 pinctrl-names = "default"; 751 pinctrl-0 = <&cif_clkout>; 752 rockchip,camera-module-index = <0>; 753 rockchip,camera-module-facing = "back"; 754 rockchip,camera-module-name = "TongJu"; 755 rockchip,camera-module-lens-name = "CHT842-MD"; 756 port { 757 ucam_out2: endpoint { 758 remote-endpoint = <&mipi_in_ucam2>; 759 data-lanes = <1 2>; 760 }; 761 }; 762 }; 763}; 764 765&i2c4 { 766 status = "okay"; 767 i2c-scl-rising-time-ns = <345>; 768 i2c-scl-falling-time-ns = <11>; 769 770 gsl3673: gsl3673@40 { 771 compatible = "GSL,GSL3673"; 772 reg = <0x40>; 773 screen_max_x = <1536>; 774 screen_max_y = <2048>; 775 irq_gpio_number = <&gpio4 RK_PC3 IRQ_TYPE_LEVEL_LOW>; 776 rst_gpio_number = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 777 }; 778}; 779 780&i2c8 { 781 status = "okay"; 782 i2c-scl-rising-time-ns = <345>; 783 i2c-scl-falling-time-ns = <11>; 784 clock-frequency = <100000>; 785 786 usbc0: fusb302@22 { 787 compatible = "fcs,fusb302"; 788 reg = <0x22>; 789 interrupt-parent = <&gpio1>; 790 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 791 pinctrl-names = "default"; 792 pinctrl-0 = <&usbc0_int>; 793 vbus-supply = <&vbus_typec>; 794 status = "okay"; 795 796 ports { 797 #address-cells = <1>; 798 #size-cells = <0>; 799 800 port@0 { 801 reg = <0>; 802 usbc0_role_sw: endpoint@0 { 803 remote-endpoint = <&dwc3_0_role_switch>; 804 }; 805 }; 806 }; 807 808 usb_con: connector { 809 compatible = "usb-c-connector"; 810 label = "USB-C"; 811 data-role = "dual"; 812 power-role = "dual"; 813 try-power-role = "sink"; 814 op-sink-microwatt = <1000000>; 815 sink-pdos = 816 <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>; 817 source-pdos = 818 <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>; 819 820 ports { 821 #address-cells = <1>; 822 #size-cells = <0>; 823 824 port@0 { 825 reg = <0>; 826 usbc0_orien_sw: endpoint { 827 remote-endpoint = <&tcphy0_orientation_switch>; 828 }; 829 }; 830 }; 831 }; 832 }; 833 834}; 835 836&i2s1 { 837 status = "okay"; 838 #sound-dai-cells = <0>; 839}; 840 841&i2s2 { 842 #sound-dai-cells = <0>; 843 status = "okay"; 844}; 845 846&io_domains { 847 status = "okay"; 848 bt656-supply = <&vcca_1v8>; 849 audio-supply = <&vcca_1v8>; 850 sdmmc-supply = <&vccio_sd>; 851 gpio1830-supply = <&vcc_3v0>; 852}; 853 854&isp0_mmu { 855 status = "okay"; 856}; 857 858&isp1_mmu { 859 status = "okay"; 860}; 861 862&mipi_dphy_tx1rx1 { 863 status = "okay"; 864 865 ports { 866 #address-cells = <1>; 867 #size-cells = <0>; 868 869 port@0 { 870 reg = <0>; 871 #address-cells = <1>; 872 #size-cells = <0>; 873 874 mipi_in_ucam1: endpoint@1 { 875 reg = <1>; 876 /* Unlinked camera */ 877 //remote-endpoint = <&ucam_out1>; 878 data-lanes = <1 2>; 879 }; 880 }; 881 882 port@1 { 883 reg = <1>; 884 #address-cells = <1>; 885 #size-cells = <0>; 886 887 dphy_tx1rx1_out: endpoint@0 { 888 reg = <0>; 889 remote-endpoint = <&isp1_mipi_in>; 890 }; 891 }; 892 }; 893}; 894 895&mipi_dphy_rx0 { 896 status = "okay"; 897 898 ports { 899 #address-cells = <1>; 900 #size-cells = <0>; 901 902 port@0 { 903 reg = <0>; 904 #address-cells = <1>; 905 #size-cells = <0>; 906 907 mipi_in_ucam0: endpoint@1 { 908 reg = <1>; 909 remote-endpoint = <&ucam_out0>; 910 data-lanes = <1 2>; 911 }; 912 913 mipi_in_ucam2: endpoint@2 { 914 reg = <2>; 915 remote-endpoint = <&ucam_out2>; 916 data-lanes = <1 2>; 917 }; 918 }; 919 920 port@1 { 921 reg = <1>; 922 #address-cells = <1>; 923 #size-cells = <0>; 924 925 dphy_rx0_out: endpoint@0 { 926 reg = <0>; 927 remote-endpoint = <&isp0_mipi_in>; 928 }; 929 }; 930 }; 931}; 932 933&pcie_phy { 934 status = "okay"; 935}; 936 937&pcie0 { 938 status = "okay"; 939}; 940 941&pmu_io_domains { 942 status = "okay"; 943 pmu1830-supply = <&vcc_1v8>; 944}; 945 946&pwm0 { 947 status = "okay"; 948}; 949 950&pwm2 { 951 status = "okay"; 952}; 953 954&rkisp1_0 { 955 status = "okay"; 956 assigned-clocks = <&cru PLL_NPLL>, <&cru SCLK_CIF_OUT_SRC>, <&cru SCLK_CIF_OUT>; 957 assigned-clock-rates = <594000000>, <594000000>, <37125000>; 958 959 port { 960 #address-cells = <1>; 961 #size-cells = <0>; 962 963 isp0_mipi_in: endpoint@0 { 964 reg = <0>; 965 remote-endpoint = <&dphy_rx0_out>; 966 }; 967 }; 968}; 969 970&rkisp1_1 { 971 status = "okay"; 972 973 port { 974 #address-cells = <1>; 975 #size-cells = <0>; 976 977 isp1_mipi_in: endpoint@0 { 978 reg = <0>; 979 remote-endpoint = <&dphy_tx1rx1_out>; 980 }; 981 }; 982}; 983 984&rockchip_suspend { 985 status = "okay"; 986 rockchip,sleep-debug-en = <1>; 987 rockchip,sleep-mode-config = < 988 (0 989 | RKPM_SLP_ARMPD 990 | RKPM_SLP_PERILPPD 991 | RKPM_SLP_DDR_RET 992 | RKPM_SLP_PLLPD 993 | RKPM_SLP_CENTER_PD 994 | RKPM_SLP_OSC_DIS 995 | RKPM_SLP_AP_PWROFF 996 ) 997 >; 998 rockchip,wakeup-config = <RKPM_GPIO_WKUP_EN>; 999 rockchip,pwm-regulator-config = <PWM2_REGULATOR_EN>; 1000 rockchip,power-ctrl = 1001 <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, 1002 <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 1003}; 1004 1005&route_edp { 1006 status = "okay"; 1007}; 1008 1009&saradc { 1010 status = "okay"; 1011 vref-supply = <&vcc_1v8>; 1012}; 1013 1014&sdmmc { 1015 sd-uhs-sdr12; 1016 sd-uhs-sdr25; 1017 sd-uhs-sdr50; 1018 sd-uhs-sdr104; 1019}; 1020 1021&spi1 { 1022 status = "okay"; 1023 max-freq = <48000000>; /* spi internal clk, don't modify */ 1024 spi_dev@0 { 1025 compatible = "rockchip,spidev"; 1026 reg = <0>; 1027 spi-max-frequency = <12000000>; 1028 spi-lsb-first; 1029 }; 1030}; 1031 1032&tcphy0 { 1033 status = "okay"; 1034 orientation-switch; 1035 port { 1036 #address-cells = <1>; 1037 #size-cells = <0>; 1038 tcphy0_orientation_switch: endpoint@0 { 1039 reg = <0>; 1040 remote-endpoint = <&usbc0_orien_sw>; 1041 }; 1042 }; 1043}; 1044 1045&tcphy1 { 1046 status = "okay"; 1047}; 1048 1049&tsadc { 1050 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 1051 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 1052 status = "okay"; 1053}; 1054 1055&u2phy0 { 1056 status = "okay"; 1057 1058 u2phy0_otg: otg-port { 1059 status = "okay"; 1060 }; 1061 1062 u2phy0_host: host-port { 1063 phy-supply = <&vcc5v0_usb>; 1064 status = "okay"; 1065 }; 1066}; 1067 1068&u2phy1 { 1069 status = "okay"; 1070 1071 u2phy1_otg: otg-port { 1072 status = "okay"; 1073 }; 1074 1075 u2phy1_host: host-port { 1076 phy-supply = <&vcc5v0_usb>; 1077 status = "okay"; 1078 }; 1079}; 1080 1081&uart0 { 1082 pinctrl-names = "default"; 1083 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1084 status = "okay"; 1085}; 1086 1087&usb_host0_ehci { 1088 status = "okay"; 1089}; 1090 1091&usb_host1_ehci { 1092 status = "okay"; 1093}; 1094&usb_host0_ohci { 1095 status = "okay"; 1096}; 1097 1098&usb_host1_ohci { 1099 status = "okay"; 1100}; 1101 1102&usbdrd3_0 { 1103 status = "okay"; 1104}; 1105 1106&usbdrd3_1 { 1107 status = "okay"; 1108}; 1109 1110&usbdrd_dwc3_0 { 1111 status = "okay"; 1112 usb-role-switch; 1113 port { 1114 #address-cells = <1>; 1115 #size-cells = <0>; 1116 dwc3_0_role_switch: endpoint@0 { 1117 reg = <0>; 1118 remote-endpoint = <&usbc0_role_sw>; 1119 }; 1120 }; 1121}; 1122 1123&usbdrd_dwc3_1 { 1124 status = "okay"; 1125}; 1126 1127&vopb { 1128 status = "okay"; 1129}; 1130 1131&vopb_mmu { 1132 status = "okay"; 1133}; 1134 1135&vopl { 1136 status = "okay"; 1137}; 1138 1139&vopl_mmu { 1140 status = "okay"; 1141}; 1142 1143&pinctrl { 1144 pinctrl-names = "default"; 1145 pinctrl-0 = <&npu_ref_clk>; 1146 1147 bq2570 { 1148 charger_ok_int: charger-ok-int { 1149 rockchip,pins = 1150 <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1151 }; 1152 }; 1153 1154 headphone { 1155 hp_det: hp-det { 1156 rockchip,pins = 1157 <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1158 }; 1159 }; 1160 1161 lcd_rst { 1162 lcd_rst_gpio: lcd-rst-gpio { 1163 rockchip,pins = 1164 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1165 }; 1166 }; 1167 1168 npu_clk { 1169 npu_ref_clk: npu-ref-clk { 1170 rockchip,pins = 1171 <0 RK_PA2 1 &pcfg_pull_none>; 1172 }; 1173 }; 1174 1175 pmic { 1176 pmic_int_l: pmic-int-l { 1177 rockchip,pins = 1178 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 1179 }; 1180 vsel1_gpio: vsel1-gpio { 1181 rockchip,pins = 1182 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 1183 }; 1184 vsel2_gpio: vsel2-gpio { 1185 rockchip,pins = 1186 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 1187 }; 1188 1189 soc_slppin_gpio: soc-slppin-gpio { 1190 rockchip,pins = 1191 <1 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>; 1192 }; 1193 1194 soc_slppin_slp: soc-slppin-slp { 1195 rockchip,pins = 1196 <1 RK_PA5 1 &pcfg_pull_none>; 1197 }; 1198 1199 soc_slppin_rst: soc-slppin-rst { 1200 rockchip,pins = 1201 <1 RK_PA5 2 &pcfg_pull_none>; 1202 }; 1203 }; 1204 1205 usb-typec { 1206 usbc0_int: usbc0-int { 1207 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 1208 }; 1209 1210 vcc5v0_typec0_en: vcc5v0-typec0-en { 1211 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 1212 }; 1213 }; 1214 1215 sdio-pwrseq { 1216 wifi_enable_h: wifi-enable-h { 1217 rockchip,pins = 1218 <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 1219 }; 1220 }; 1221 1222 sdmmc { 1223 sdmmc_bus1: sdmmc-bus1 { 1224 rockchip,pins = 1225 <4 RK_PB0 1 &pcfg_pull_up_10ma>; 1226 }; 1227 1228 sdmmc_bus4: sdmmc-bus4 { 1229 rockchip,pins = 1230 <4 RK_PB0 1 &pcfg_pull_up_10ma>, 1231 <4 RK_PB1 1 &pcfg_pull_up_10ma>, 1232 <4 RK_PB2 1 &pcfg_pull_up_10ma>, 1233 <4 RK_PB3 1 &pcfg_pull_up_10ma>; 1234 }; 1235 1236 sdmmc_clk: sdmmc-clk { 1237 rockchip,pins = 1238 <4 RK_PB4 1 &pcfg_pull_none_10ma>; 1239 }; 1240 1241 sdmmc_cmd: sdmmc-cmd { 1242 rockchip,pins = 1243 <4 RK_PB5 1 &pcfg_pull_up_10ma>; 1244 }; 1245 }; 1246 1247 tp_irq { 1248 tp_irq_gpio: tp-irq-gpio { 1249 rockchip,pins = 1250 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 1251 }; 1252 }; 1253 1254 wireless-bluetooth { 1255 bt_irq_gpio: bt-irq-gpio { 1256 rockchip,pins = 1257 <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; 1258 }; 1259 1260 uart0_gpios: uart0-gpios { 1261 rockchip,pins = 1262 <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 1263 }; 1264 }; 1265}; 1266 1267/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1268/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1269/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1270