1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd 3 4/dts-v1/; 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/display/drm_mipi_dsi.h> 9#include <dt-bindings/sensor-dev.h> 10#include <dt-bindings/pwm/pwm.h> 11#include "dt-bindings/usb/pd.h" 12#include "rk3399pro.dtsi" 13#include "rk3399-linux.dtsi" 14#include "rk3399-opp.dtsi" 15#include "rk3399-vop-clk-set.dtsi" 16 17/ { 18 compatible = "rockchip,rk3399pro-evb-v11-linux", "rockchip,rk3399pro"; 19 20 adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 2>; 23 io-channel-names = "buttons"; 24 poll-interval = <100>; 25 keyup-threshold-microvolt = <1800000>; 26 27 esc-key { 28 linux,code = <KEY_ESC>; 29 label = "esc"; 30 press-threshold-microvolt = <1310000>; 31 }; 32 33 menu-key { 34 linux,code = <KEY_MENU>; 35 label = "menu"; 36 press-threshold-microvolt = <987000>; 37 }; 38 39 home-key { 40 linux,code = <KEY_HOME>; 41 label = "home"; 42 press-threshold-microvolt = <624000>; 43 }; 44 45 vol-down-key { 46 linux,code = <KEY_VOLUMEDOWN>; 47 label = "volume down"; 48 press-threshold-microvolt = <300000>; 49 }; 50 51 vol-up-key { 52 linux,code = <KEY_VOLUMEUP>; 53 label = "volume up"; 54 press-threshold-microvolt = <17000>; 55 }; 56 }; 57 58 backlight: backlight { 59 compatible = "pwm-backlight"; 60 pwms = <&pwm0 0 25000 0>; 61 brightness-levels = < 62 0 20 20 21 21 22 22 23 63 23 24 24 25 25 26 26 27 64 27 28 28 29 29 30 30 31 65 31 32 32 33 33 34 34 35 66 35 36 36 37 37 38 38 39 67 40 41 42 43 44 45 46 47 68 48 49 50 51 52 53 54 55 69 56 57 58 59 60 61 62 63 70 64 65 66 67 68 69 70 71 71 72 73 74 75 76 77 78 79 72 80 81 82 83 84 85 86 87 73 88 89 90 91 92 93 94 95 74 96 97 98 99 100 101 102 103 75 104 105 106 107 108 109 110 111 76 112 113 114 115 116 117 118 119 77 120 121 122 123 124 125 126 127 78 128 129 130 131 132 133 134 135 79 136 137 138 139 140 141 142 143 80 144 145 146 147 148 149 150 151 81 152 153 154 155 156 157 158 159 82 160 161 162 163 164 165 166 167 83 168 169 170 171 172 173 174 175 84 176 177 178 179 180 181 182 183 85 184 185 186 187 188 189 190 191 86 192 193 194 195 196 197 198 199 87 200 201 202 203 204 205 206 207 88 208 209 210 211 212 213 214 215 89 216 217 218 219 220 221 222 223 90 224 225 226 227 228 229 230 231 91 232 233 234 235 236 237 238 239 92 240 241 242 243 244 245 246 247 93 248 249 250 251 252 253 254 255 94 >; 95 default-brightness-level = <200>; 96 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 97 }; 98 99 clkin_gmac: external-gmac-clock { 100 compatible = "fixed-clock"; 101 clock-frequency = <125000000>; 102 clock-output-names = "clkin_gmac"; 103 #clock-cells = <0>; 104 }; 105 106 fiq_debugger: fiq-debugger { 107 compatible = "rockchip,fiq-debugger"; 108 rockchip,serial-id = <2>; 109 rockchip,wake-irq = <0>; 110 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 111 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 112 pinctrl-names = "default"; 113 pinctrl-0 = <&uart2c_xfer>; 114 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>; 115 }; 116 117 hdmi_sound: hdmi-sound { 118 status = "okay"; 119 compatible = "simple-audio-card"; 120 simple-audio-card,format = "i2s"; 121 simple-audio-card,mclk-fs = <256>; 122 simple-audio-card,name = "rockchip,hdmi"; 123 124 simple-audio-card,cpu { 125 sound-dai = <&i2s2>; 126 }; 127 simple-audio-card,codec { 128 sound-dai = <&hdmi>; 129 }; 130 }; 131 132 panel: panel { 133 compatible = "simple-panel"; 134 backlight = <&backlight>; 135 enable-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 136 prepare-delay-ms = <20>; 137 enable-delay-ms = <20>; 138 reset-delay-ms = <20>; 139 140 display-timings { 141 native-mode = <&timing0>; 142 143 timing0: timing0 { 144 clock-frequency = <200000000>; 145 hactive = <1536>; 146 vactive = <2048>; 147 hfront-porch = <12>; 148 hsync-len = <16>; 149 hback-porch = <48>; 150 vfront-porch = <8>; 151 vsync-len = <4>; 152 vback-porch = <8>; 153 hsync-active = <0>; 154 vsync-active = <0>; 155 de-active = <0>; 156 pixelclk-active = <0>; 157 }; 158 }; 159 160 ports { 161 panel_in: endpoint { 162 remote-endpoint = <&edp_out>; 163 }; 164 }; 165 }; 166 167 rk809_sound: rk809-sound { 168 compatible = "rockchip,multicodecs-card"; 169 rockchip,card-name = "rockchip,rk809-codec"; 170 rockchip,codec-hp-det; 171 rockchip,mclk-fs = <256>; 172 rockchip,cpu = <&i2s1>; 173 rockchip,codec = <&rk809_codec>; 174 }; 175 176 rk_headset: rk-headset { 177 compatible = "rockchip_headset"; 178 headset_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&hp_det>; 181 io-channels = <&saradc 3>; 182 }; 183 184 sdio_pwrseq: sdio-pwrseq { 185 compatible = "mmc-pwrseq-simple"; 186 clocks = <&rk809 1>; 187 clock-names = "ext_clock"; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&wifi_enable_h>; 190 191 /* 192 * On the module itself this is one of these (depending 193 * on the actual card populated): 194 * - SDIO_RESET_L_WL_REG_ON 195 * - PDN (power down when low) 196 */ 197 reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 198 }; 199 200 usbacm_video_control: usbacm-video-control { 201 compatible = "rockchip,usbacm-video-control"; 202 status = "disabled"; 203 }; 204 205 vcc_phy: vcc-phy-regulator { 206 compatible = "regulator-fixed"; 207 regulator-name = "vcc_phy"; 208 regulator-always-on; 209 regulator-boot-on; 210 }; 211 212 vbus_typec: vbus-typec-regulator { 213 compatible = "regulator-fixed"; 214 enable-active-high; 215 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 216 pinctrl-names = "default"; 217 pinctrl-0 = <&vcc5v0_typec0_en>; 218 regulator-name = "vbus_typec"; 219 vin-supply = <&vcc5v0_sys>; 220 }; 221 222 vcc5v0_sys: vccsys { 223 compatible = "regulator-fixed"; 224 regulator-name = "vcc5v0_sys"; 225 regulator-always-on; 226 regulator-boot-on; 227 regulator-min-microvolt = <5000000>; 228 regulator-max-microvolt = <5000000>; 229 }; 230 231 wireless-wlan { 232 compatible = "wlan-platdata"; 233 rockchip,grf = <&grf>; 234 wifi_chip_type = "ap6398s"; 235 sdio_vref = <1800>; 236 WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 237 status = "okay"; 238 }; 239 240 wireless-bluetooth { 241 compatible = "bluetooth-platdata"; 242 clocks = <&rk809 1>; 243 clock-names = "ext_clock"; 244 uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; 245 pinctrl-names = "default", "rts_gpio"; 246 pinctrl-0 = <&uart0_rts>, <&bt_irq_gpio>; 247 pinctrl-1 = <&uart0_gpios>; 248 BT,reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 249 BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 250 BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 251 status = "okay"; 252 }; 253}; 254 255&cdn_dp { 256 status = "okay"; 257 phys = <&tcphy0_dp>; 258}; 259 260&cpu_l0 { 261 cpu-supply = <&vdd_cpu_l>; 262}; 263 264&cpu_l1 { 265 cpu-supply = <&vdd_cpu_l>; 266}; 267 268&cpu_l2 { 269 cpu-supply = <&vdd_cpu_l>; 270}; 271 272&cpu_l3 { 273 cpu-supply = <&vdd_cpu_l>; 274}; 275 276&cpu_b0 { 277 cpu-supply = <&vdd_cpu_b>; 278}; 279 280&cpu_b1 { 281 cpu-supply = <&vdd_cpu_b>; 282}; 283 284&display_subsystem { 285 status = "okay"; 286}; 287 288&dfi { 289 status = "okay"; 290}; 291 292&dmc { 293 status = "okay"; 294 center-supply = <&vdd_center>; 295 upthreshold = <40>; 296 downdifferential = <20>; 297 system-status-freq = < 298 /*system status freq(KHz)*/ 299 SYS_STATUS_NORMAL 856000 300 SYS_STATUS_REBOOT 856000 301 SYS_STATUS_SUSPEND 328000 302 SYS_STATUS_VIDEO_1080P 666000 303 SYS_STATUS_VIDEO_4K 856000 304 SYS_STATUS_VIDEO_4K_10B 856000 305 SYS_STATUS_PERFORMANCE 856000 306 SYS_STATUS_BOOST 856000 307 SYS_STATUS_DUALVIEW 856000 308 SYS_STATUS_ISP 856000 309 >; 310 vop-bw-dmc-freq = < 311 /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */ 312 0 762 416000 313 763 3012 666000 314 3013 99999 856000 315 >; 316 317 vop-pn-msch-readlatency = < 318 0 0x20 319 4 0x20 320 >; 321 322 auto-min-freq = <328000>; 323 auto-freq-en = <0>; 324}; 325 326&dmc_opp_table { 327 compatible = "operating-points-v2"; 328 329 opp-200000000 { 330 opp-hz = /bits/ 64 <200000000>; 331 opp-microvolt = <900000>; 332 status = "disabled"; 333 }; 334 opp-300000000 { 335 opp-hz = /bits/ 64 <300000000>; 336 opp-microvolt = <900000>; 337 status = "disabled"; 338 }; 339 opp-328000000 { 340 opp-hz = /bits/ 64 <328000000>; 341 opp-microvolt = <900000>; 342 }; 343 opp-400000000 { 344 opp-hz = /bits/ 64 <400000000>; 345 opp-microvolt = <900000>; 346 status = "disabled"; 347 }; 348 opp-416000000 { 349 opp-hz = /bits/ 64 <416000000>; 350 opp-microvolt = <900000>; 351 }; 352 opp-528000000 { 353 opp-hz = /bits/ 64 <528000000>; 354 opp-microvolt = <900000>; 355 status = "disabled"; 356 }; 357 opp-600000000 { 358 opp-hz = /bits/ 64 <600000000>; 359 opp-microvolt = <900000>; 360 status = "disabled"; 361 }; 362 opp-666000000 { 363 opp-hz = /bits/ 64 <666000000>; 364 opp-microvolt = <900000>; 365 }; 366 opp-800000000 { 367 opp-hz = /bits/ 64 <800000000>; 368 opp-microvolt = <900000>; 369 status = "disabled"; 370 }; 371 opp-856000000 { 372 opp-hz = /bits/ 64 <856000000>; 373 opp-microvolt = <900000>; 374 }; 375 opp-928000000 { 376 opp-hz = /bits/ 64 <928000000>; 377 opp-microvolt = <900000>; 378 status = "disabled"; 379 }; 380}; 381 382&dp_in_vopb { 383 status = "disabled"; 384}; 385 386&edp { 387 status = "okay"; 388 force-hpd; 389 390 ports { 391 port@1 { 392 reg = <1>; 393 394 edp_out: endpoint { 395 remote-endpoint = <&panel_in>; 396 }; 397 }; 398 }; 399}; 400 401&edp_in_vopb { 402 status = "disabled"; 403}; 404 405&emmc_phy { 406 status = "okay"; 407}; 408 409&fiq_debugger { 410 pinctrl-0 = <&uart2a_xfer>; 411}; 412 413&gmac { 414 phy-supply = <&vcc_phy>; 415 phy-mode = "rgmii"; 416 clock_in_out = "input"; 417 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 418 snps,reset-active-low; 419 snps,reset-delays-us = <0 10000 50000>; 420 assigned-clocks = <&cru SCLK_RMII_SRC>; 421 assigned-clock-parents = <&clkin_gmac>; 422 pinctrl-names = "default"; 423 pinctrl-0 = <&rgmii_pins>; 424 tx_delay = <0x28>; 425 rx_delay = <0x11>; 426 status = "okay"; 427}; 428 429&gpu { 430 status = "okay"; 431 mali-supply = <&vdd_gpu>; 432}; 433 434&hdmi { 435 status = "okay"; 436 #sound-dai-cells = <0>; 437 rockchip,phy-table = 438 <74250000 0x8009 0x0004 0x0272>, 439 <165000000 0x802b 0x0004 0x0209>, 440 <297000000 0x8039 0x0005 0x028d>, 441 <594000000 0x8039 0x0000 0x00f6>, 442 <000000000 0x0000 0x0000 0x0000>; 443}; 444 445&hdmi_in_vopl { 446 status = "disabled"; 447}; 448 449&i2c0 { 450 status = "okay"; 451 i2c-scl-rising-time-ns = <180>; 452 i2c-scl-falling-time-ns = <30>; 453 clock-frequency = <400000>; 454 455 rk809: pmic@20 { 456 compatible = "rockchip,rk809"; 457 reg = <0x20>; 458 interrupt-parent = <&gpio1>; 459 interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 460 pinctrl-names = "default", "pmic-sleep", 461 "pmic-power-off", "pmic-reset"; 462 pinctrl-0 = <&pmic_int_l>; 463 pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>; 464 pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>; 465 pinctrl-3 = <&soc_slppin_gpio>, <&rk809_slppin_null>; 466 rockchip,system-power-controller; 467 pmic-reset-func = <0>; 468 wakeup-source; 469 #clock-cells = <1>; 470 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 471 472 vcc1-supply = <&vcc5v0_sys>; 473 vcc2-supply = <&vcc5v0_sys>; 474 vcc3-supply = <&vcc5v0_sys>; 475 vcc4-supply = <&vcc5v0_sys>; 476 vcc5-supply = <&vcc_buck5>; 477 vcc6-supply = <&vcc_buck5>; 478 vcc7-supply = <&vcc3v3_sys>; 479 vcc8-supply = <&vcc3v3_sys>; 480 vcc9-supply = <&vcc5v0_sys>; 481 482 pwrkey { 483 status = "okay"; 484 }; 485 486 rtc { 487 status = "okay"; 488 }; 489 490 pinctrl_rk8xx: pinctrl_rk8xx { 491 gpio-controller; 492 #gpio-cells = <2>; 493 494 rk809_slppin_null: rk809_slppin_null { 495 pins = "gpio_slp"; 496 function = "pin_fun0"; 497 }; 498 499 rk809_slppin_slp: rk809_slppin_slp { 500 pins = "gpio_slp"; 501 function = "pin_fun1"; 502 }; 503 504 rk809_slppin_pwrdn: rk809_slppin_pwrdn { 505 pins = "gpio_slp"; 506 function = "pin_fun2"; 507 }; 508 509 rk809_slppin_rst: rk809_slppin_rst { 510 pins = "gpio_slp"; 511 function = "pin_fun3"; 512 }; 513 }; 514 515 regulators { 516 vdd_center: DCDC_REG1 { 517 regulator-always-on; 518 regulator-boot-on; 519 regulator-min-microvolt = <750000>; 520 regulator-max-microvolt = <1350000>; 521 regulator-initial-mode = <0x2>; 522 regulator-name = "vdd_center"; 523 regulator-state-mem { 524 regulator-off-in-suspend; 525 regulator-suspend-microvolt = <900000>; 526 }; 527 }; 528 529 vdd_cpu_l: DCDC_REG2 { 530 regulator-always-on; 531 regulator-boot-on; 532 regulator-min-microvolt = <750000>; 533 regulator-max-microvolt = <1350000>; 534 regulator-ramp-delay = <6001>; 535 regulator-initial-mode = <0x2>; 536 regulator-name = "vdd_cpu_l"; 537 regulator-state-mem { 538 regulator-off-in-suspend; 539 }; 540 }; 541 542 vcc_ddr: DCDC_REG3 { 543 regulator-always-on; 544 regulator-boot-on; 545 regulator-name = "vcc_ddr"; 546 regulator-initial-mode = <0x2>; 547 regulator-state-mem { 548 regulator-on-in-suspend; 549 }; 550 }; 551 552 vcc3v3_sys: DCDC_REG4 { 553 regulator-always-on; 554 regulator-boot-on; 555 regulator-min-microvolt = <3300000>; 556 regulator-max-microvolt = <3300000>; 557 regulator-initial-mode = <0x2>; 558 regulator-name = "vcc3v3_sys"; 559 regulator-state-mem { 560 regulator-on-in-suspend; 561 regulator-suspend-microvolt = <3300000>; 562 }; 563 }; 564 565 vcc_buck5: DCDC_REG5 { 566 regulator-always-on; 567 regulator-boot-on; 568 regulator-min-microvolt = <2200000>; 569 regulator-max-microvolt = <2200000>; 570 regulator-name = "vcc_buck5"; 571 regulator-state-mem { 572 regulator-on-in-suspend; 573 regulator-suspend-microvolt = <2200000>; 574 }; 575 }; 576 577 vcca_0v9: LDO_REG1 { 578 regulator-always-on; 579 regulator-boot-on; 580 regulator-min-microvolt = <900000>; 581 regulator-max-microvolt = <900000>; 582 regulator-name = "vcca_0v9"; 583 regulator-state-mem { 584 regulator-off-in-suspend; 585 }; 586 }; 587 588 vcc_1v8: LDO_REG2 { 589 regulator-always-on; 590 regulator-boot-on; 591 regulator-min-microvolt = <1800000>; 592 regulator-max-microvolt = <1800000>; 593 594 regulator-name = "vcc_1v8"; 595 regulator-state-mem { 596 regulator-on-in-suspend; 597 regulator-suspend-microvolt = <1800000>; 598 }; 599 }; 600 601 vcc0v9_soc: LDO_REG3 { 602 regulator-always-on; 603 regulator-boot-on; 604 regulator-min-microvolt = <900000>; 605 regulator-max-microvolt = <900000>; 606 607 regulator-name = "vcc0v9_soc"; 608 regulator-state-mem { 609 regulator-on-in-suspend; 610 regulator-suspend-microvolt = <900000>; 611 }; 612 }; 613 614 vcca_1v8: LDO_REG4 { 615 regulator-always-on; 616 regulator-boot-on; 617 regulator-min-microvolt = <1800000>; 618 regulator-max-microvolt = <1800000>; 619 620 regulator-name = "vcca_1v8"; 621 regulator-state-mem { 622 regulator-off-in-suspend; 623 }; 624 }; 625 626 vdd1v5_dvp: LDO_REG5 { 627 regulator-always-on; 628 regulator-boot-on; 629 regulator-min-microvolt = <1500000>; 630 regulator-max-microvolt = <1500000>; 631 632 regulator-name = "vdd1v5_dvp"; 633 regulator-state-mem { 634 regulator-off-in-suspend; 635 }; 636 }; 637 638 vcc_1v5: LDO_REG6 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <1500000>; 642 regulator-max-microvolt = <1500000>; 643 644 regulator-name = "vcc_1v5"; 645 regulator-state-mem { 646 regulator-off-in-suspend; 647 }; 648 }; 649 650 vcc_3v0: LDO_REG7 { 651 regulator-always-on; 652 regulator-boot-on; 653 regulator-min-microvolt = <3000000>; 654 regulator-max-microvolt = <3000000>; 655 656 regulator-name = "vcc_3v0"; 657 regulator-state-mem { 658 regulator-off-in-suspend; 659 }; 660 }; 661 662 vccio_sd: LDO_REG8 { 663 regulator-always-on; 664 regulator-boot-on; 665 regulator-min-microvolt = <1800000>; 666 regulator-max-microvolt = <3300000>; 667 668 regulator-name = "vccio_sd"; 669 regulator-state-mem { 670 regulator-off-in-suspend; 671 }; 672 }; 673 674 vcc_sd: LDO_REG9 { 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <3300000>; 678 regulator-max-microvolt = <3300000>; 679 680 regulator-name = "vcc_sd"; 681 regulator-state-mem { 682 regulator-off-in-suspend; 683 }; 684 }; 685 686 vcc5v0_usb: SWITCH_REG1 { 687 regulator-name = "vcc5v0_usb"; 688 regulator-state-mem { 689 regulator-on-in-suspend; 690 }; 691 }; 692 693 vccio_3v3: SWITCH_REG2 { 694 regulator-always-on; 695 regulator-boot-on; 696 regulator-name = "vccio_3v3"; 697 regulator-state-mem { 698 regulator-off-in-suspend; 699 }; 700 }; 701 }; 702 703 rk809_codec: codec { 704 #sound-dai-cells = <0>; 705 compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 706 clocks = <&cru SCLK_I2S_8CH_OUT>; 707 clock-names = "mclk"; 708 pinctrl-names = "default"; 709 pinctrl-0 = <&i2s_8ch_mclk>; 710 hp-volume = <20>; 711 spk-volume = <3>; 712 status = "okay"; 713 }; 714 }; 715 716 vdd_cpu_b: tcs4525@1c { 717 compatible = "tcs,tcs4525"; 718 reg = <0x1c>; 719 vin-supply = <&vcc5v0_sys>; 720 regulator-compatible = "fan53555-reg"; 721 pinctrl-0 = <&vsel1_gpio>; 722 vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 723 regulator-name = "vdd_cpu_b"; 724 regulator-min-microvolt = <712500>; 725 regulator-max-microvolt = <1500000>; 726 regulator-ramp-delay = <2300>; 727 fcs,suspend-voltage-selector = <1>; 728 regulator-always-on; 729 regulator-boot-on; 730 regulator-initial-state = <3>; 731 regulator-state-mem { 732 regulator-off-in-suspend; 733 }; 734 }; 735 736 vdd_gpu: tcs4526@10 { 737 compatible = "tcs,tcs4526"; 738 reg = <0x10>; 739 vin-supply = <&vcc5v0_sys>; 740 regulator-compatible = "fan53555-reg"; 741 pinctrl-0 = <&vsel2_gpio>; 742 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 743 regulator-name = "vdd_gpu"; 744 regulator-min-microvolt = <735000>; 745 regulator-max-microvolt = <1400000>; 746 regulator-ramp-delay = <1000>; 747 fcs,suspend-voltage-selector = <1>; 748 regulator-always-on; 749 regulator-boot-on; 750 regulator-initial-state = <3>; 751 regulator-state-mem { 752 regulator-off-in-suspend; 753 }; 754 }; 755 756 bq25700: bq25700@6b { 757 compatible = "ti,bq25703"; 758 reg = <0x6b>; 759 interrupt-parent = <&gpio1>; 760 interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>; 761 pinctrl-names = "default"; 762 pinctrl-0 = <&charger_ok_int>; 763 ti,charge-current = <1500000>; 764 ti,max-charge-voltage = <8704000>; 765 ti,max-input-voltage = <20000000>; 766 ti,max-input-current = <6000000>; 767 ti,input-current-sdp = <500000>; 768 ti,input-current-dcp = <2000000>; 769 ti,input-current-cdp = <2000000>; 770 ti,input-current-dc = <2000000>; 771 ti,minimum-sys-voltage = <6700000>; 772 ti,otg-voltage = <5000000>; 773 ti,otg-current = <500000>; 774 ti,input-current = <500000>; 775 pd-charge-only = <0>; 776 status = "disabled"; 777 }; 778}; 779 780&i2c1 { 781 status = "okay"; 782 i2c-scl-rising-time-ns = <140>; 783 i2c-scl-falling-time-ns = <30>; 784 785 mpu6500@68 { 786 status = "okay"; 787 compatible = "invensense,mpu6500"; 788 reg = <0x68>; 789 irq-gpio = <&gpio3 RK_PD2 IRQ_TYPE_EDGE_RISING>; 790 mpu-int_config = <0x10>; 791 mpu-level_shifter = <0>; 792 mpu-orientation = <0 1 0 1 0 0 0 0 1>; 793 orientation-x= <1>; 794 orientation-y= <0>; 795 orientation-z= <0>; 796 mpu-debug = <1>; 797 }; 798 799 sensor@d { 800 status = "okay"; 801 compatible = "ak8963"; 802 reg = <0x0d>; 803 type = <SENSOR_TYPE_COMPASS>; 804 irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_EDGE_RISING>; 805 irq_enable = <0>; 806 poll_delay_ms = <30>; 807 layout = <3>; 808 }; 809 810 ov13850: ov13850@10 { 811 compatible = "ovti,ov13850"; 812 status = "okay"; 813 reg = <0x10>; 814 clocks = <&cru SCLK_CIF_OUT>; 815 clock-names = "xvclk"; 816 817 /* conflict with csi-ctl-gpios */ 818 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 819 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 820 pinctrl-names = "rockchip,camera_default"; 821 pinctrl-0 = <&cif_clkout>; 822 823 port { 824 ucam_out0: endpoint { 825 remote-endpoint = <&mipi_in_ucam0>; 826 data-lanes = <1 2>; 827 }; 828 }; 829 }; 830 831 imx327: imx327@1a { 832 compatible = "sony,imx327"; 833 status = "okay"; 834 reg = <0x1a>; 835 clocks = <&cru SCLK_CIF_OUT>; 836 clock-names = "xvclk"; 837 /* conflict with csi-ctl-gpios */ 838 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 839 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 840 pinctrl-names = "default"; 841 pinctrl-0 = <&cif_clkout>; 842 rockchip,camera-module-index = <0>; 843 rockchip,camera-module-facing = "back"; 844 rockchip,camera-module-name = "TongJu"; 845 rockchip,camera-module-lens-name = "CHT842-MD"; 846 port { 847 ucam_out2: endpoint { 848 remote-endpoint = <&mipi_in_ucam2>; 849 data-lanes = <1 2>; 850 }; 851 }; 852 }; 853 854}; 855 856&i2c4 { 857 status = "okay"; 858 i2c-scl-rising-time-ns = <345>; 859 i2c-scl-falling-time-ns = <11>; 860 861 gsl3673: gsl3673@40 { 862 compatible = "GSL,GSL3673"; 863 reg = <0x40>; 864 screen_max_x = <1536>; 865 screen_max_y = <2048>; 866 irq_gpio_number = <&gpio4 RK_PC3 IRQ_TYPE_LEVEL_LOW>; 867 rst_gpio_number = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 868 }; 869}; 870 871&i2c8 { 872 status = "okay"; 873 i2c-scl-rising-time-ns = <345>; 874 i2c-scl-falling-time-ns = <11>; 875 clock-frequency = <100000>; 876 877 fusb0: fusb30x@22 { 878 compatible = "fairchild,fusb302"; 879 reg = <0x22>; 880 pinctrl-names = "default"; 881 pinctrl-0 = <&fusb0_int>; 882 int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; 883 vbus-5v-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; 884 status = "okay"; 885 }; 886 887}; 888 889&i2s1 { 890 status = "okay"; 891 #sound-dai-cells = <0>; 892}; 893 894&i2s2 { 895 #sound-dai-cells = <0>; 896 status = "okay"; 897}; 898 899&io_domains { 900 status = "okay"; 901 bt656-supply = <&vcca_1v8>; 902 audio-supply = <&vcca_1v8>; 903 sdmmc-supply = <&vccio_sd>; 904 gpio1830-supply = <&vcc_3v0>; 905}; 906 907&isp0_mmu { 908 status = "okay"; 909}; 910 911&isp1_mmu { 912 status = "okay"; 913}; 914 915&mipi_dphy_tx1rx1 { 916 status = "okay"; 917 918 ports { 919 #address-cells = <1>; 920 #size-cells = <0>; 921 922 port@0 { 923 reg = <0>; 924 #address-cells = <1>; 925 #size-cells = <0>; 926 927 mipi_in_ucam1: endpoint@1 { 928 reg = <1>; 929 /* Unlinked camera */ 930 //remote-endpoint = <&ucam_out1>; 931 data-lanes = <1 2>; 932 }; 933 }; 934 935 port@1 { 936 reg = <1>; 937 #address-cells = <1>; 938 #size-cells = <0>; 939 940 dphy_tx1rx1_out: endpoint@0 { 941 reg = <0>; 942 remote-endpoint = <&isp1_mipi_in>; 943 }; 944 }; 945 }; 946}; 947 948&mipi_dphy_rx0 { 949 status = "okay"; 950 951 ports { 952 #address-cells = <1>; 953 #size-cells = <0>; 954 955 port@0 { 956 reg = <0>; 957 #address-cells = <1>; 958 #size-cells = <0>; 959 960 mipi_in_ucam0: endpoint@1 { 961 reg = <1>; 962 remote-endpoint = <&ucam_out0>; 963 data-lanes = <1 2>; 964 }; 965 mipi_in_ucam2: endpoint@2 { 966 reg = <2>; 967 remote-endpoint = <&ucam_out2>; 968 data-lanes = <1 2>; 969 }; 970 }; 971 972 port@1 { 973 reg = <1>; 974 #address-cells = <1>; 975 #size-cells = <0>; 976 977 dphy_rx0_out: endpoint@0 { 978 reg = <0>; 979 remote-endpoint = <&isp0_mipi_in>; 980 }; 981 }; 982 }; 983}; 984 985&pcie_phy { 986 status = "okay"; 987}; 988 989&pcie0 { 990 status = "okay"; 991}; 992 993&pmu_io_domains { 994 status = "okay"; 995 pmu1830-supply = <&vcc_1v8>; 996}; 997 998&pwm0 { 999 status = "okay"; 1000}; 1001 1002&pwm2 { 1003 status = "okay"; 1004}; 1005 1006&rkisp1_0 { 1007 status = "okay"; 1008 assigned-clocks = <&cru PLL_NPLL>, <&cru SCLK_CIF_OUT_SRC>, <&cru SCLK_CIF_OUT>; 1009 assigned-clock-rates = <594000000>, <594000000>, <37125000>; 1010 port { 1011 #address-cells = <1>; 1012 #size-cells = <0>; 1013 1014 isp0_mipi_in: endpoint@0 { 1015 reg = <0>; 1016 remote-endpoint = <&dphy_rx0_out>; 1017 }; 1018 }; 1019}; 1020 1021&rkisp1_1 { 1022 status = "okay"; 1023 1024 port { 1025 #address-cells = <1>; 1026 #size-cells = <0>; 1027 1028 isp1_mipi_in: endpoint@0 { 1029 reg = <0>; 1030 remote-endpoint = <&dphy_tx1rx1_out>; 1031 }; 1032 }; 1033}; 1034 1035&rockchip_suspend { 1036 status = "okay"; 1037 rockchip,sleep-debug-en = <1>; 1038 rockchip,sleep-mode-config = < 1039 (0 1040 | RKPM_SLP_ARMPD 1041 | RKPM_SLP_PERILPPD 1042 | RKPM_SLP_DDR_RET 1043 | RKPM_SLP_PLLPD 1044 | RKPM_SLP_CENTER_PD 1045 | RKPM_SLP_OSC_DIS 1046 | RKPM_SLP_AP_PWROFF 1047 ) 1048 >; 1049 rockchip,wakeup-config = <RKPM_GPIO_WKUP_EN>; 1050 rockchip,pwm-regulator-config = <PWM2_REGULATOR_EN>; 1051 rockchip,power-ctrl = 1052 <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, 1053 <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 1054}; 1055 1056&route_edp { 1057 status = "okay"; 1058}; 1059 1060&saradc { 1061 status = "okay"; 1062 vref-supply = <&vcc_1v8>; 1063}; 1064 1065&sdmmc { 1066 sd-uhs-sdr12; 1067 sd-uhs-sdr25; 1068 sd-uhs-sdr50; 1069 sd-uhs-sdr104; 1070}; 1071 1072&spi1 { 1073 status = "okay"; 1074 max-freq = <48000000>; /* spi internal clk, don't modify */ 1075 spi_dev@0 { 1076 compatible = "rockchip,spidev"; 1077 reg = <0>; 1078 spi-max-frequency = <12000000>; 1079 spi-lsb-first; 1080 }; 1081}; 1082 1083&tcphy0 { 1084 status = "okay"; 1085 orientation-switch; 1086 port { 1087 #address-cells = <1>; 1088 #size-cells = <0>; 1089 tcphy0_orientation_switch: endpoint@0 { 1090 reg = <0>; 1091 remote-endpoint = <&usbc0_orien_sw>; 1092 }; 1093 }; 1094}; 1095 1096&tcphy1 { 1097 status = "okay"; 1098}; 1099 1100&tsadc { 1101 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 1102 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 1103 status = "okay"; 1104}; 1105 1106&u2phy0 { 1107 status = "okay"; 1108 extcon = <&fusb0>; 1109 1110 u2phy0_otg: otg-port { 1111 status = "okay"; 1112 }; 1113 1114 u2phy0_host: host-port { 1115 phy-supply = <&vcc5v0_usb>; 1116 status = "okay"; 1117 }; 1118}; 1119 1120&u2phy1 { 1121 status = "okay"; 1122 1123 u2phy1_otg: otg-port { 1124 status = "okay"; 1125 }; 1126 1127 u2phy1_host: host-port { 1128 phy-supply = <&vcc5v0_usb>; 1129 status = "okay"; 1130 }; 1131}; 1132 1133&uart0 { 1134 pinctrl-names = "default"; 1135 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1136 status = "okay"; 1137}; 1138 1139&usb_host0_ehci { 1140 status = "okay"; 1141}; 1142 1143&usb_host1_ehci { 1144 status = "okay"; 1145}; 1146&usb_host0_ohci { 1147 status = "okay"; 1148}; 1149 1150&usb_host1_ohci { 1151 status = "okay"; 1152}; 1153 1154&usbdrd3_0 { 1155 status = "okay"; 1156}; 1157 1158&usbdrd3_1 { 1159 status = "okay"; 1160}; 1161 1162&usbdrd_dwc3_0 { 1163 status = "okay"; 1164 usb-role-switch; 1165 port { 1166 #address-cells = <1>; 1167 #size-cells = <0>; 1168 dwc3_0_role_switch: endpoint@0 { 1169 reg = <0>; 1170 remote-endpoint = <&usbc0_role_sw>; 1171 }; 1172 }; 1173}; 1174 1175&usbdrd_dwc3_1 { 1176 status = "okay"; 1177}; 1178 1179&vopb { 1180 status = "okay"; 1181}; 1182 1183&vopb_mmu { 1184 status = "okay"; 1185}; 1186 1187&vopl { 1188 status = "okay"; 1189}; 1190 1191&vopl_mmu { 1192 status = "okay"; 1193}; 1194 1195&pinctrl { 1196 pinctrl-names = "default"; 1197 pinctrl-0 = <&npu_ref_clk>; 1198 1199 bq2570 { 1200 charger_ok_int: charger-ok-int { 1201 rockchip,pins = 1202 <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1203 }; 1204 }; 1205 1206 headphone { 1207 hp_det: hp-det { 1208 rockchip,pins = 1209 <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1210 }; 1211 }; 1212 1213 lcd_rst { 1214 lcd_rst_gpio: lcd-rst-gpio { 1215 rockchip,pins = 1216 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1217 }; 1218 }; 1219 1220 npu_clk { 1221 npu_ref_clk: npu-ref-clk { 1222 rockchip,pins = 1223 <0 RK_PA2 1 &pcfg_pull_none>; 1224 }; 1225 }; 1226 1227 pmic { 1228 pmic_int_l: pmic-int-l { 1229 rockchip,pins = 1230 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 1231 }; 1232 vsel1_gpio: vsel1-gpio { 1233 rockchip,pins = 1234 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 1235 }; 1236 vsel2_gpio: vsel2-gpio { 1237 rockchip,pins = 1238 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 1239 }; 1240 1241 soc_slppin_gpio: soc-slppin-gpio { 1242 rockchip,pins = 1243 <1 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>; 1244 }; 1245 1246 soc_slppin_slp: soc-slppin-slp { 1247 rockchip,pins = 1248 <1 RK_PA5 1 &pcfg_pull_down>; 1249 }; 1250 1251 soc_slppin_rst: soc-slppin-rst { 1252 rockchip,pins = 1253 <1 RK_PA5 2 &pcfg_pull_none>; 1254 }; 1255 }; 1256 1257 sdio-pwrseq { 1258 wifi_enable_h: wifi-enable-h { 1259 rockchip,pins = 1260 <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 1261 }; 1262 }; 1263 1264 sdmmc { 1265 sdmmc_bus1: sdmmc-bus1 { 1266 rockchip,pins = 1267 <4 RK_PB0 1 &pcfg_pull_up_10ma>; 1268 }; 1269 1270 sdmmc_bus4: sdmmc-bus4 { 1271 rockchip,pins = 1272 <4 RK_PB0 1 &pcfg_pull_up_10ma>, 1273 <4 RK_PB1 1 &pcfg_pull_up_10ma>, 1274 <4 RK_PB2 1 &pcfg_pull_up_10ma>, 1275 <4 RK_PB3 1 &pcfg_pull_up_10ma>; 1276 }; 1277 1278 sdmmc_clk: sdmmc-clk { 1279 rockchip,pins = 1280 <4 RK_PB4 1 &pcfg_pull_none_10ma>; 1281 }; 1282 1283 sdmmc_cmd: sdmmc-cmd { 1284 rockchip,pins = 1285 <4 RK_PB5 1 &pcfg_pull_up_10ma>; 1286 }; 1287 }; 1288 1289 tp_irq { 1290 tp_irq_gpio: tp-irq-gpio { 1291 rockchip,pins = 1292 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 1293 }; 1294 }; 1295 1296 usb-typec { 1297 usbc0_int: usbc0-int { 1298 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 1299 }; 1300 1301 vcc5v0_typec0_en: vcc5v0-typec0-en { 1302 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 1303 }; 1304 }; 1305 1306 wireless-bluetooth { 1307 bt_irq_gpio: bt-irq-gpio { 1308 rockchip,pins = 1309 <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; 1310 }; 1311 1312 uart0_gpios: uart0-gpios { 1313 rockchip,pins = 1314 <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 1315 }; 1316 }; 1317}; 1318 1319/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1320/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1321/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1322