xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4*4882a593Smuzhiyun * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h>
9*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
10*4882a593Smuzhiyun#include "rk3399.dtsi"
11*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
19*4882a593Smuzhiyun		compatible = "fixed-clock";
20*4882a593Smuzhiyun		clock-frequency = <125000000>;
21*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
22*4882a593Smuzhiyun		#clock-cells = <0>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
26*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
27*4882a593Smuzhiyun		clocks = <&rk808 1>;
28*4882a593Smuzhiyun		clock-names = "ext_clock";
29*4882a593Smuzhiyun		pinctrl-names = "default";
30*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
31*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	vcc12v_dcin: dc-12v {
35*4882a593Smuzhiyun		compatible = "regulator-fixed";
36*4882a593Smuzhiyun		regulator-name = "vcc12v_dcin";
37*4882a593Smuzhiyun		regulator-always-on;
38*4882a593Smuzhiyun		regulator-boot-on;
39*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
40*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	vcc5v0_sys: vcc-sys {
44*4882a593Smuzhiyun		compatible = "regulator-fixed";
45*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
46*4882a593Smuzhiyun		regulator-always-on;
47*4882a593Smuzhiyun		regulator-boot-on;
48*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
49*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
50*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	vcc_0v9: vcc-0v9 {
54*4882a593Smuzhiyun		compatible = "regulator-fixed";
55*4882a593Smuzhiyun		regulator-name = "vcc_0v9";
56*4882a593Smuzhiyun		regulator-always-on;
57*4882a593Smuzhiyun		regulator-boot-on;
58*4882a593Smuzhiyun		regulator-min-microvolt = <900000>;
59*4882a593Smuzhiyun		regulator-max-microvolt = <900000>;
60*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	vcc3v3_pcie: vcc3v3-pcie-regulator {
64*4882a593Smuzhiyun		compatible = "regulator-fixed";
65*4882a593Smuzhiyun		enable-active-high;
66*4882a593Smuzhiyun		gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
67*4882a593Smuzhiyun		pinctrl-names = "default";
68*4882a593Smuzhiyun		pinctrl-0 = <&pcie_pwr_en>;
69*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie";
70*4882a593Smuzhiyun		regulator-always-on;
71*4882a593Smuzhiyun		regulator-boot-on;
72*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
76*4882a593Smuzhiyun		compatible = "regulator-fixed";
77*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
78*4882a593Smuzhiyun		regulator-always-on;
79*4882a593Smuzhiyun		regulator-boot-on;
80*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
81*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
82*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		enable-active-high;
88*4882a593Smuzhiyun		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
89*4882a593Smuzhiyun		pinctrl-names = "default";
90*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
91*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
92*4882a593Smuzhiyun		regulator-always-on;
93*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	vcc5v0_typec: vcc5v0-typec-regulator {
97*4882a593Smuzhiyun		compatible = "regulator-fixed";
98*4882a593Smuzhiyun		enable-active-high;
99*4882a593Smuzhiyun		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
100*4882a593Smuzhiyun		pinctrl-names = "default";
101*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_typec_en>;
102*4882a593Smuzhiyun		regulator-name = "vcc5v0_typec";
103*4882a593Smuzhiyun		regulator-always-on;
104*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	vcc_lan: vcc3v3-phy-regulator {
108*4882a593Smuzhiyun		compatible = "regulator-fixed";
109*4882a593Smuzhiyun		regulator-name = "vcc_lan";
110*4882a593Smuzhiyun		regulator-always-on;
111*4882a593Smuzhiyun		regulator-boot-on;
112*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
113*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		regulator-state-mem {
116*4882a593Smuzhiyun			regulator-off-in-suspend;
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	vdd_log: vdd-log {
121*4882a593Smuzhiyun		compatible = "pwm-regulator";
122*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 1>;
123*4882a593Smuzhiyun		regulator-name = "vdd_log";
124*4882a593Smuzhiyun		regulator-always-on;
125*4882a593Smuzhiyun		regulator-boot-on;
126*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
127*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
128*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&cpu_l0 {
133*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&cpu_l1 {
137*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&cpu_l2 {
141*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&cpu_l3 {
145*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&cpu_b0 {
149*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&cpu_b1 {
153*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&emmc_phy {
157*4882a593Smuzhiyun	status = "okay";
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun&gmac {
161*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
162*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
163*4882a593Smuzhiyun	clock_in_out = "input";
164*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
165*4882a593Smuzhiyun	phy-mode = "rgmii";
166*4882a593Smuzhiyun	pinctrl-names = "default";
167*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
168*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
169*4882a593Smuzhiyun	snps,reset-active-low;
170*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
171*4882a593Smuzhiyun	tx_delay = <0x28>;
172*4882a593Smuzhiyun	rx_delay = <0x11>;
173*4882a593Smuzhiyun	status = "okay";
174*4882a593Smuzhiyun};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun&gpu {
177*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun&hdmi {
182*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
183*4882a593Smuzhiyun	pinctrl-names = "default";
184*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_cec>;
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&hdmi_sound {
189*4882a593Smuzhiyun	status = "okay";
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&i2c0 {
193*4882a593Smuzhiyun	clock-frequency = <400000>;
194*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
195*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	rk808: pmic@1b {
199*4882a593Smuzhiyun		compatible = "rockchip,rk808";
200*4882a593Smuzhiyun		reg = <0x1b>;
201*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
202*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
203*4882a593Smuzhiyun		#clock-cells = <1>;
204*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
205*4882a593Smuzhiyun		pinctrl-names = "default";
206*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
207*4882a593Smuzhiyun		rockchip,system-power-controller;
208*4882a593Smuzhiyun		wakeup-source;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
211*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
212*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
213*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
214*4882a593Smuzhiyun		vcc6-supply = <&vcc5v0_sys>;
215*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
216*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
217*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
218*4882a593Smuzhiyun		vcc10-supply = <&vcc5v0_sys>;
219*4882a593Smuzhiyun		vcc11-supply = <&vcc5v0_sys>;
220*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
221*4882a593Smuzhiyun		vddio-supply = <&vcc_1v8>;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		regulators {
224*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
225*4882a593Smuzhiyun				regulator-name = "vdd_center";
226*4882a593Smuzhiyun				regulator-always-on;
227*4882a593Smuzhiyun				regulator-boot-on;
228*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
229*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
230*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
231*4882a593Smuzhiyun				regulator-state-mem {
232*4882a593Smuzhiyun					regulator-off-in-suspend;
233*4882a593Smuzhiyun				};
234*4882a593Smuzhiyun			};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
237*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
238*4882a593Smuzhiyun				regulator-always-on;
239*4882a593Smuzhiyun				regulator-boot-on;
240*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
241*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
242*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
243*4882a593Smuzhiyun				regulator-state-mem {
244*4882a593Smuzhiyun					regulator-off-in-suspend;
245*4882a593Smuzhiyun				};
246*4882a593Smuzhiyun			};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
249*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
250*4882a593Smuzhiyun				regulator-always-on;
251*4882a593Smuzhiyun				regulator-boot-on;
252*4882a593Smuzhiyun				regulator-state-mem {
253*4882a593Smuzhiyun					regulator-on-in-suspend;
254*4882a593Smuzhiyun				};
255*4882a593Smuzhiyun			};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
258*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
259*4882a593Smuzhiyun				regulator-always-on;
260*4882a593Smuzhiyun				regulator-boot-on;
261*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
262*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
263*4882a593Smuzhiyun				regulator-state-mem {
264*4882a593Smuzhiyun					regulator-on-in-suspend;
265*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
266*4882a593Smuzhiyun				};
267*4882a593Smuzhiyun			};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun			vcc1v8_codec: LDO_REG1 {
270*4882a593Smuzhiyun				regulator-name = "vcc1v8_codec";
271*4882a593Smuzhiyun				regulator-always-on;
272*4882a593Smuzhiyun				regulator-boot-on;
273*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
274*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
275*4882a593Smuzhiyun				regulator-state-mem {
276*4882a593Smuzhiyun					regulator-off-in-suspend;
277*4882a593Smuzhiyun				};
278*4882a593Smuzhiyun			};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun			vcc1v8_hdmi: LDO_REG2 {
281*4882a593Smuzhiyun				regulator-name = "vcc1v8_hdmi";
282*4882a593Smuzhiyun				regulator-always-on;
283*4882a593Smuzhiyun				regulator-boot-on;
284*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
285*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
286*4882a593Smuzhiyun				regulator-state-mem {
287*4882a593Smuzhiyun					regulator-off-in-suspend;
288*4882a593Smuzhiyun				};
289*4882a593Smuzhiyun			};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun			vcca_1v8: LDO_REG3 {
292*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
293*4882a593Smuzhiyun				regulator-always-on;
294*4882a593Smuzhiyun				regulator-boot-on;
295*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
296*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
297*4882a593Smuzhiyun				regulator-state-mem {
298*4882a593Smuzhiyun					regulator-on-in-suspend;
299*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
300*4882a593Smuzhiyun				};
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun			vcc_sdio: LDO_REG4 {
304*4882a593Smuzhiyun				regulator-name = "vcc_sdio";
305*4882a593Smuzhiyun				regulator-always-on;
306*4882a593Smuzhiyun				regulator-boot-on;
307*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
308*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
309*4882a593Smuzhiyun				regulator-state-mem {
310*4882a593Smuzhiyun					regulator-on-in-suspend;
311*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
312*4882a593Smuzhiyun				};
313*4882a593Smuzhiyun			};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
316*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
317*4882a593Smuzhiyun				regulator-always-on;
318*4882a593Smuzhiyun				regulator-boot-on;
319*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
320*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
321*4882a593Smuzhiyun				regulator-state-mem {
322*4882a593Smuzhiyun					regulator-off-in-suspend;
323*4882a593Smuzhiyun				};
324*4882a593Smuzhiyun			};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
327*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
328*4882a593Smuzhiyun				regulator-always-on;
329*4882a593Smuzhiyun				regulator-boot-on;
330*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
331*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
332*4882a593Smuzhiyun				regulator-state-mem {
333*4882a593Smuzhiyun					regulator-on-in-suspend;
334*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
335*4882a593Smuzhiyun				};
336*4882a593Smuzhiyun			};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun			vcc0v9_hdmi: LDO_REG7 {
339*4882a593Smuzhiyun				regulator-name = "vcc0v9_hdmi";
340*4882a593Smuzhiyun				regulator-always-on;
341*4882a593Smuzhiyun				regulator-boot-on;
342*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
343*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
344*4882a593Smuzhiyun				regulator-state-mem {
345*4882a593Smuzhiyun					regulator-off-in-suspend;
346*4882a593Smuzhiyun				};
347*4882a593Smuzhiyun			};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
350*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
351*4882a593Smuzhiyun				regulator-always-on;
352*4882a593Smuzhiyun				regulator-boot-on;
353*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
354*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
355*4882a593Smuzhiyun				regulator-state-mem {
356*4882a593Smuzhiyun					regulator-on-in-suspend;
357*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
358*4882a593Smuzhiyun				};
359*4882a593Smuzhiyun			};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun			vcc_cam: SWITCH_REG1 {
362*4882a593Smuzhiyun				regulator-name = "vcc_cam";
363*4882a593Smuzhiyun				regulator-always-on;
364*4882a593Smuzhiyun				regulator-boot-on;
365*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
366*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
367*4882a593Smuzhiyun				regulator-state-mem {
368*4882a593Smuzhiyun					regulator-off-in-suspend;
369*4882a593Smuzhiyun				};
370*4882a593Smuzhiyun			};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun			vcc_mipi: SWITCH_REG2 {
373*4882a593Smuzhiyun				regulator-name = "vcc_mipi";
374*4882a593Smuzhiyun				regulator-always-on;
375*4882a593Smuzhiyun				regulator-boot-on;
376*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
377*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
378*4882a593Smuzhiyun				regulator-state-mem {
379*4882a593Smuzhiyun					regulator-off-in-suspend;
380*4882a593Smuzhiyun				};
381*4882a593Smuzhiyun			};
382*4882a593Smuzhiyun		};
383*4882a593Smuzhiyun	};
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
386*4882a593Smuzhiyun		compatible = "silergy,syr827";
387*4882a593Smuzhiyun		reg = <0x40>;
388*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
389*4882a593Smuzhiyun		pinctrl-names = "default";
390*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_pin>;
391*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
392*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
393*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
394*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
395*4882a593Smuzhiyun		regulator-always-on;
396*4882a593Smuzhiyun		regulator-boot-on;
397*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun		regulator-state-mem {
400*4882a593Smuzhiyun			regulator-off-in-suspend;
401*4882a593Smuzhiyun		};
402*4882a593Smuzhiyun	};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
405*4882a593Smuzhiyun		compatible = "silergy,syr828";
406*4882a593Smuzhiyun		reg = <0x41>;
407*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
408*4882a593Smuzhiyun		pinctrl-names = "default";
409*4882a593Smuzhiyun		pinctrl-0 = <&vsel2_pin>;
410*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
411*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
412*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
413*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
414*4882a593Smuzhiyun		regulator-always-on;
415*4882a593Smuzhiyun		regulator-boot-on;
416*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun		regulator-state-mem {
419*4882a593Smuzhiyun			regulator-off-in-suspend;
420*4882a593Smuzhiyun		};
421*4882a593Smuzhiyun	};
422*4882a593Smuzhiyun};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun&i2c1 {
425*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
426*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
427*4882a593Smuzhiyun	status = "okay";
428*4882a593Smuzhiyun};
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun&i2c3 {
431*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
432*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
433*4882a593Smuzhiyun	status = "okay";
434*4882a593Smuzhiyun};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun&i2c4 {
437*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <600>;
438*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
439*4882a593Smuzhiyun	status = "okay";
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&i2s0 {
443*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
444*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
445*4882a593Smuzhiyun	status = "okay";
446*4882a593Smuzhiyun};
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun&i2s1 {
449*4882a593Smuzhiyun	rockchip,playback-channels = <2>;
450*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
451*4882a593Smuzhiyun};
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun&i2s2 {
454*4882a593Smuzhiyun	status = "okay";
455*4882a593Smuzhiyun};
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun&io_domains {
458*4882a593Smuzhiyun	status = "okay";
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun	bt656-supply = <&vcc_3v0>;
461*4882a593Smuzhiyun	audio-supply = <&vcc1v8_codec>;
462*4882a593Smuzhiyun	sdmmc-supply = <&vcc_sdio>;
463*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;
464*4882a593Smuzhiyun};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun&pmu_io_domains {
467*4882a593Smuzhiyun	status = "okay";
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	pmu1830-supply = <&vcc_3v0>;
470*4882a593Smuzhiyun};
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun&pcie_phy {
473*4882a593Smuzhiyun	status = "okay";
474*4882a593Smuzhiyun};
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun&pcie0 {
477*4882a593Smuzhiyun	ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
478*4882a593Smuzhiyun	max-link-speed = <2>;
479*4882a593Smuzhiyun	num-lanes = <4>;
480*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqnb_cpm>;
481*4882a593Smuzhiyun	pinctrl-names = "default";
482*4882a593Smuzhiyun	vpcie0v9-supply = <&vcc_0v9>;
483*4882a593Smuzhiyun	vpcie1v8-supply = <&vcc_1v8>;
484*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie>;
485*4882a593Smuzhiyun	status = "okay";
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun&pinctrl {
489*4882a593Smuzhiyun	bt {
490*4882a593Smuzhiyun		bt_enable_h: bt-enable-h {
491*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
492*4882a593Smuzhiyun		};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun		bt_host_wake_l: bt-host-wake-l {
495*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
496*4882a593Smuzhiyun		};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun		bt_wake_l: bt-wake-l {
499*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
500*4882a593Smuzhiyun		};
501*4882a593Smuzhiyun	};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun	pcie {
504*4882a593Smuzhiyun		pcie_pwr_en: pcie-pwr-en {
505*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
506*4882a593Smuzhiyun		};
507*4882a593Smuzhiyun	};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun	sdio0 {
510*4882a593Smuzhiyun		sdio0_bus4: sdio0-bus4 {
511*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
512*4882a593Smuzhiyun					<2 RK_PC5 1 &pcfg_pull_up_20ma>,
513*4882a593Smuzhiyun					<2 RK_PC6 1 &pcfg_pull_up_20ma>,
514*4882a593Smuzhiyun					<2 RK_PC7 1 &pcfg_pull_up_20ma>;
515*4882a593Smuzhiyun		};
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun		sdio0_cmd: sdio0-cmd {
518*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
519*4882a593Smuzhiyun		};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun		sdio0_clk: sdio0-clk {
522*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
523*4882a593Smuzhiyun		};
524*4882a593Smuzhiyun	};
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun	pmic {
527*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
528*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
529*4882a593Smuzhiyun		};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun		vsel1_pin: vsel1-pin {
532*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
533*4882a593Smuzhiyun		};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun		vsel2_pin: vsel2-pin {
536*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
537*4882a593Smuzhiyun		};
538*4882a593Smuzhiyun	};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun	usb-typec {
541*4882a593Smuzhiyun		vcc5v0_typec_en: vcc5v0-typec-en {
542*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
543*4882a593Smuzhiyun		};
544*4882a593Smuzhiyun	};
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun	usb2 {
547*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
548*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
549*4882a593Smuzhiyun		};
550*4882a593Smuzhiyun	};
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun	wifi {
553*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
554*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
555*4882a593Smuzhiyun		};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun		wifi_host_wake_l: wifi-host-wake-l {
558*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
559*4882a593Smuzhiyun		};
560*4882a593Smuzhiyun	};
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&pwm2 {
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun&saradc {
568*4882a593Smuzhiyun	status = "okay";
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
571*4882a593Smuzhiyun};
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun&sdio0 {
574*4882a593Smuzhiyun	#address-cells = <1>;
575*4882a593Smuzhiyun	#size-cells = <0>;
576*4882a593Smuzhiyun	bus-width = <4>;
577*4882a593Smuzhiyun	clock-frequency = <50000000>;
578*4882a593Smuzhiyun	cap-sdio-irq;
579*4882a593Smuzhiyun	cap-sd-highspeed;
580*4882a593Smuzhiyun	keep-power-in-suspend;
581*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
582*4882a593Smuzhiyun	non-removable;
583*4882a593Smuzhiyun	pinctrl-names = "default";
584*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
585*4882a593Smuzhiyun	sd-uhs-sdr104;
586*4882a593Smuzhiyun};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun&sdmmc {
589*4882a593Smuzhiyun	bus-width = <4>;
590*4882a593Smuzhiyun	cap-mmc-highspeed;
591*4882a593Smuzhiyun	cap-sd-highspeed;
592*4882a593Smuzhiyun	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
593*4882a593Smuzhiyun	disable-wp;
594*4882a593Smuzhiyun	max-frequency = <150000000>;
595*4882a593Smuzhiyun	pinctrl-names = "default";
596*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
597*4882a593Smuzhiyun	status = "okay";
598*4882a593Smuzhiyun};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun&sdhci {
601*4882a593Smuzhiyun	bus-width = <8>;
602*4882a593Smuzhiyun	mmc-hs400-1_8v;
603*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
604*4882a593Smuzhiyun	non-removable;
605*4882a593Smuzhiyun	status = "okay";
606*4882a593Smuzhiyun};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun&tcphy0 {
609*4882a593Smuzhiyun	status = "okay";
610*4882a593Smuzhiyun};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun&tcphy1 {
613*4882a593Smuzhiyun	status = "okay";
614*4882a593Smuzhiyun};
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun&tsadc {
617*4882a593Smuzhiyun	status = "okay";
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun	/* tshut mode 0:CRU 1:GPIO */
620*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
621*4882a593Smuzhiyun	/* tshut polarity 0:LOW 1:HIGH */
622*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
623*4882a593Smuzhiyun};
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun&u2phy0 {
626*4882a593Smuzhiyun	status = "okay";
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun	u2phy0_otg: otg-port {
629*4882a593Smuzhiyun		status = "okay";
630*4882a593Smuzhiyun	};
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun	u2phy0_host: host-port {
633*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
634*4882a593Smuzhiyun		status = "okay";
635*4882a593Smuzhiyun	};
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&u2phy1 {
639*4882a593Smuzhiyun	status = "okay";
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun	u2phy1_otg: otg-port {
642*4882a593Smuzhiyun		status = "okay";
643*4882a593Smuzhiyun	};
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun	u2phy1_host: host-port {
646*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
647*4882a593Smuzhiyun		status = "okay";
648*4882a593Smuzhiyun	};
649*4882a593Smuzhiyun};
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun&uart0 {
652*4882a593Smuzhiyun	pinctrl-names = "default";
653*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
654*4882a593Smuzhiyun};
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun&uart2 {
657*4882a593Smuzhiyun	status = "okay";
658*4882a593Smuzhiyun};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun&usb_host0_ehci {
661*4882a593Smuzhiyun	status = "okay";
662*4882a593Smuzhiyun};
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun&usb_host0_ohci {
665*4882a593Smuzhiyun	status = "okay";
666*4882a593Smuzhiyun};
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun&usb_host1_ehci {
669*4882a593Smuzhiyun	status = "okay";
670*4882a593Smuzhiyun};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun&usb_host1_ohci {
673*4882a593Smuzhiyun	status = "okay";
674*4882a593Smuzhiyun};
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun&usbdrd3_0 {
677*4882a593Smuzhiyun	status = "okay";
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun&usbdrd_dwc3_0 {
681*4882a593Smuzhiyun	status = "okay";
682*4882a593Smuzhiyun	dr_mode = "otg";
683*4882a593Smuzhiyun};
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun&usbdrd3_1 {
686*4882a593Smuzhiyun	status = "okay";
687*4882a593Smuzhiyun};
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun&usbdrd_dwc3_1 {
690*4882a593Smuzhiyun	status = "okay";
691*4882a593Smuzhiyun	dr_mode = "host";
692*4882a593Smuzhiyun};
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun&vopb {
695*4882a593Smuzhiyun	status = "okay";
696*4882a593Smuzhiyun};
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun&vopb_mmu {
699*4882a593Smuzhiyun	status = "okay";
700*4882a593Smuzhiyun};
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun&vopl {
703*4882a593Smuzhiyun	status = "okay";
704*4882a593Smuzhiyun};
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun&vopl_mmu {
707*4882a593Smuzhiyun	status = "okay";
708*4882a593Smuzhiyun};
709