1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd 4*4882a593Smuzhiyun * Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "rk3399-roc-pc.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Firefly ROC-RK3399-PC Mezzanine Board"; 12*4882a593Smuzhiyun compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* MP8009 PoE PD */ 15*4882a593Smuzhiyun poe_12v: poe-12v { 16*4882a593Smuzhiyun compatible = "regulator-fixed"; 17*4882a593Smuzhiyun regulator-name = "poe_12v"; 18*4882a593Smuzhiyun regulator-always-on; 19*4882a593Smuzhiyun regulator-boot-on; 20*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 21*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun vcc3v3_ngff: vcc3v3-ngff { 25*4882a593Smuzhiyun compatible = "regulator-fixed"; 26*4882a593Smuzhiyun regulator-name = "vcc3v3_ngff"; 27*4882a593Smuzhiyun enable-active-high; 28*4882a593Smuzhiyun gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun pinctrl-0 = <&vcc3v3_ngff_en>; 31*4882a593Smuzhiyun regulator-always-on; 32*4882a593Smuzhiyun regulator-boot-on; 33*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 34*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 35*4882a593Smuzhiyun vin-supply = <&sys_12v>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun vcc3v3_pcie: vcc3v3-pcie { 39*4882a593Smuzhiyun compatible = "regulator-fixed"; 40*4882a593Smuzhiyun regulator-name = "vcc3v3_pcie"; 41*4882a593Smuzhiyun enable-active-high; 42*4882a593Smuzhiyun gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun pinctrl-names = "default"; 44*4882a593Smuzhiyun pinctrl-0 = <&vcc3v3_pcie_en>; 45*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 46*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 47*4882a593Smuzhiyun vin-supply = <&sys_12v>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&sys_12v { 52*4882a593Smuzhiyun vin-supply = <&poe_12v>; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&pcie_phy { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&pcie0 { 60*4882a593Smuzhiyun ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun num-lanes = <4>; 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun pinctrl-0 = <&pcie_perst>; 64*4882a593Smuzhiyun vpcie3v3-supply = <&vcc3v3_pcie>; 65*4882a593Smuzhiyun vpcie1v8-supply = <&vcc1v8_pmu>; 66*4882a593Smuzhiyun vpcie0v9-supply = <&vcca_0v9>; 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun}; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun&pinctrl { 71*4882a593Smuzhiyun ngff { 72*4882a593Smuzhiyun vcc3v3_ngff_en: vcc3v3-ngff-en { 73*4882a593Smuzhiyun rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun pcie { 78*4882a593Smuzhiyun vcc3v3_pcie_en: vcc3v3-pcie-en { 79*4882a593Smuzhiyun rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun pcie_perst: pcie-perst { 83*4882a593Smuzhiyun rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&sdio0 { 89*4882a593Smuzhiyun bus-width = <4>; 90*4882a593Smuzhiyun cap-sd-highspeed; 91*4882a593Smuzhiyun cap-sdio-irq; 92*4882a593Smuzhiyun keep-power-in-suspend; 93*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 94*4882a593Smuzhiyun non-removable; 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 97*4882a593Smuzhiyun sd-uhs-sdr104; 98*4882a593Smuzhiyun vmmc-supply = <&vcc3v3_ngff>; 99*4882a593Smuzhiyun vqmmc-supply = <&vcc_1v8>; 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&uart0 { 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun}; 108