1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "dt-bindings/pwm/pwm.h" 9*4882a593Smuzhiyun#include "dt-bindings/input/input.h" 10*4882a593Smuzhiyun#include "rk3399.dtsi" 11*4882a593Smuzhiyun#include "rk3399-opp.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Orange Pi RK3399 Board"; 15*4882a593Smuzhiyun compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun chosen { 18*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 22*4882a593Smuzhiyun compatible = "fixed-clock"; 23*4882a593Smuzhiyun clock-frequency = <125000000>; 24*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 25*4882a593Smuzhiyun #clock-cells = <0>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun adc-keys { 29*4882a593Smuzhiyun compatible = "adc-keys"; 30*4882a593Smuzhiyun io-channels = <&saradc 1>; 31*4882a593Smuzhiyun io-channel-names = "buttons"; 32*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 33*4882a593Smuzhiyun poll-interval = <100>; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun button-up { 36*4882a593Smuzhiyun label = "Volume Up"; 37*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 38*4882a593Smuzhiyun press-threshold-microvolt = <100000>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun button-down { 42*4882a593Smuzhiyun label = "Volume Down"; 43*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 44*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun back { 48*4882a593Smuzhiyun label = "Back"; 49*4882a593Smuzhiyun linux,code = <KEY_BACK>; 50*4882a593Smuzhiyun press-threshold-microvolt = <985000>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun menu { 54*4882a593Smuzhiyun label = "Menu"; 55*4882a593Smuzhiyun linux,code = <KEY_MENU>; 56*4882a593Smuzhiyun press-threshold-microvolt = <1314000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun dc_12v: dc-12v { 61*4882a593Smuzhiyun compatible = "regulator-fixed"; 62*4882a593Smuzhiyun regulator-name = "dc_12v"; 63*4882a593Smuzhiyun regulator-always-on; 64*4882a593Smuzhiyun regulator-boot-on; 65*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 66*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun keys: gpio-keys { 70*4882a593Smuzhiyun compatible = "gpio-keys"; 71*4882a593Smuzhiyun autorepeat; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun power { 74*4882a593Smuzhiyun debounce-interval = <100>; 75*4882a593Smuzhiyun gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 76*4882a593Smuzhiyun label = "GPIO Power"; 77*4882a593Smuzhiyun linux,code = <KEY_POWER>; 78*4882a593Smuzhiyun linux,input-type = <1>; 79*4882a593Smuzhiyun pinctrl-names = "default"; 80*4882a593Smuzhiyun pinctrl-0 = <&pwr_btn>; 81*4882a593Smuzhiyun wakeup-source; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 86*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 87*4882a593Smuzhiyun clocks = <&rk808 1>; 88*4882a593Smuzhiyun clock-names = "ext_clock"; 89*4882a593Smuzhiyun pinctrl-names = "default"; 90*4882a593Smuzhiyun pinctrl-0 = <&wifi_reg_on_h>; 91*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* switched by pmic_sleep */ 95*4882a593Smuzhiyun vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { 96*4882a593Smuzhiyun compatible = "regulator-fixed"; 97*4882a593Smuzhiyun regulator-name = "vcc1v8_s3"; 98*4882a593Smuzhiyun regulator-always-on; 99*4882a593Smuzhiyun regulator-boot-on; 100*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 101*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 102*4882a593Smuzhiyun vin-supply = <&vcc_1v8>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun vcc3v0_sd: vcc3v0-sd { 106*4882a593Smuzhiyun compatible = "regulator-fixed"; 107*4882a593Smuzhiyun enable-active-high; 108*4882a593Smuzhiyun gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 109*4882a593Smuzhiyun pinctrl-names = "default"; 110*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_pwr_h>; 111*4882a593Smuzhiyun regulator-boot-on; 112*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 113*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 114*4882a593Smuzhiyun regulator-name = "vcc3v0_sd"; 115*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 119*4882a593Smuzhiyun compatible = "regulator-fixed"; 120*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 121*4882a593Smuzhiyun regulator-always-on; 122*4882a593Smuzhiyun regulator-boot-on; 123*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 124*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 125*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host-regulator { 129*4882a593Smuzhiyun compatible = "regulator-fixed"; 130*4882a593Smuzhiyun enable-active-high; 131*4882a593Smuzhiyun gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&vcc5v0_host_en>; 134*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 135*4882a593Smuzhiyun regulator-always-on; 136*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun vbus_typec: vbus-typec-regulator { 140*4882a593Smuzhiyun compatible = "regulator-fixed"; 141*4882a593Smuzhiyun enable-active-high; 142*4882a593Smuzhiyun gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 143*4882a593Smuzhiyun pinctrl-names = "default"; 144*4882a593Smuzhiyun pinctrl-0 = <&vcc5v0_typec_en>; 145*4882a593Smuzhiyun regulator-name = "vbus_typec"; 146*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun vcc_sys: vcc-sys { 150*4882a593Smuzhiyun compatible = "regulator-fixed"; 151*4882a593Smuzhiyun regulator-name = "vcc_sys"; 152*4882a593Smuzhiyun regulator-always-on; 153*4882a593Smuzhiyun regulator-boot-on; 154*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 155*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 156*4882a593Smuzhiyun vin-supply = <&dc_12v>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun vdd_log: vdd-log { 160*4882a593Smuzhiyun compatible = "pwm-regulator"; 161*4882a593Smuzhiyun pwms = <&pwm2 0 25000 1>; 162*4882a593Smuzhiyun regulator-name = "vdd_log"; 163*4882a593Smuzhiyun regulator-always-on; 164*4882a593Smuzhiyun regulator-boot-on; 165*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 166*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 167*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun&cpu_l0 { 172*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 173*4882a593Smuzhiyun}; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun&cpu_l1 { 176*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&cpu_l2 { 180*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 181*4882a593Smuzhiyun}; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun&cpu_l3 { 184*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&cpu_b0 { 188*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&cpu_b1 { 192*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&emmc_phy { 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&gmac { 200*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 201*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 202*4882a593Smuzhiyun clock_in_out = "input"; 203*4882a593Smuzhiyun phy-supply = <&vcc3v3_s3>; 204*4882a593Smuzhiyun phy-mode = "rgmii"; 205*4882a593Smuzhiyun phy-handle = <&rtl8211e>; 206*4882a593Smuzhiyun pinctrl-names = "default"; 207*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; 208*4882a593Smuzhiyun tx_delay = <0x28>; 209*4882a593Smuzhiyun rx_delay = <0x11>; 210*4882a593Smuzhiyun status = "okay"; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun mdio { 213*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 214*4882a593Smuzhiyun #address-cells = <1>; 215*4882a593Smuzhiyun #size-cells = <0>; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun rtl8211e: ethernet-phy@1 { 218*4882a593Smuzhiyun reg = <1>; 219*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 220*4882a593Smuzhiyun interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 221*4882a593Smuzhiyun reset-assert-us = <10000>; 222*4882a593Smuzhiyun reset-deassert-us = <30000>; 223*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&gpu { 229*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&hdmi { 234*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 235*4882a593Smuzhiyun status = "okay"; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&hdmi_sound { 239*4882a593Smuzhiyun status = "okay"; 240*4882a593Smuzhiyun}; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun&i2c0 { 243*4882a593Smuzhiyun clock-frequency = <400000>; 244*4882a593Smuzhiyun i2c-scl-rising-time-ns = <168>; 245*4882a593Smuzhiyun i2c-scl-falling-time-ns = <4>; 246*4882a593Smuzhiyun status = "okay"; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun rk808: pmic@1b { 249*4882a593Smuzhiyun compatible = "rockchip,rk808"; 250*4882a593Smuzhiyun reg = <0x1b>; 251*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 252*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 253*4882a593Smuzhiyun #clock-cells = <1>; 254*4882a593Smuzhiyun clock-output-names = "rtc_clko_soc", "rtc_clko_wifi"; 255*4882a593Smuzhiyun pinctrl-names = "default"; 256*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 257*4882a593Smuzhiyun rockchip,system-power-controller; 258*4882a593Smuzhiyun wakeup-source; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun vcc1-supply = <&vcc3v3_sys>; 261*4882a593Smuzhiyun vcc2-supply = <&vcc3v3_sys>; 262*4882a593Smuzhiyun vcc3-supply = <&vcc3v3_sys>; 263*4882a593Smuzhiyun vcc4-supply = <&vcc3v3_sys>; 264*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 265*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 266*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 267*4882a593Smuzhiyun vcc9-supply = <&vcc3v3_sys>; 268*4882a593Smuzhiyun vcc10-supply = <&vcc3v3_sys>; 269*4882a593Smuzhiyun vcc11-supply = <&vcc3v3_sys>; 270*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 271*4882a593Smuzhiyun vddio-supply = <&vcc_3v0>; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun regulators { 274*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 275*4882a593Smuzhiyun regulator-name = "vdd_center"; 276*4882a593Smuzhiyun regulator-always-on; 277*4882a593Smuzhiyun regulator-boot-on; 278*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 279*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 280*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 281*4882a593Smuzhiyun regulator-state-mem { 282*4882a593Smuzhiyun regulator-off-in-suspend; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 287*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 288*4882a593Smuzhiyun regulator-always-on; 289*4882a593Smuzhiyun regulator-boot-on; 290*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 291*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 292*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 293*4882a593Smuzhiyun regulator-state-mem { 294*4882a593Smuzhiyun regulator-off-in-suspend; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 299*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 300*4882a593Smuzhiyun regulator-always-on; 301*4882a593Smuzhiyun regulator-boot-on; 302*4882a593Smuzhiyun regulator-state-mem { 303*4882a593Smuzhiyun regulator-on-in-suspend; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 308*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 309*4882a593Smuzhiyun regulator-always-on; 310*4882a593Smuzhiyun regulator-boot-on; 311*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 312*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 313*4882a593Smuzhiyun regulator-state-mem { 314*4882a593Smuzhiyun regulator-on-in-suspend; 315*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG1 { 320*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 321*4882a593Smuzhiyun regulator-always-on; 322*4882a593Smuzhiyun regulator-boot-on; 323*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 324*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 325*4882a593Smuzhiyun regulator-state-mem { 326*4882a593Smuzhiyun regulator-off-in-suspend; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun vcc3v0_tp: LDO_REG2 { 331*4882a593Smuzhiyun regulator-name = "vcc3v0_tp"; 332*4882a593Smuzhiyun regulator-always-on; 333*4882a593Smuzhiyun regulator-boot-on; 334*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 335*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 336*4882a593Smuzhiyun regulator-state-mem { 337*4882a593Smuzhiyun regulator-off-in-suspend; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun vcc1v8_pmupll: LDO_REG3 { 342*4882a593Smuzhiyun regulator-name = "vcc1v8_pmupll"; 343*4882a593Smuzhiyun regulator-always-on; 344*4882a593Smuzhiyun regulator-boot-on; 345*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 346*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 347*4882a593Smuzhiyun regulator-state-mem { 348*4882a593Smuzhiyun regulator-on-in-suspend; 349*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun vcc_sdio: LDO_REG4 { 354*4882a593Smuzhiyun regulator-name = "vcc_sdio"; 355*4882a593Smuzhiyun regulator-always-on; 356*4882a593Smuzhiyun regulator-boot-on; 357*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 358*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 359*4882a593Smuzhiyun regulator-state-mem { 360*4882a593Smuzhiyun regulator-on-in-suspend; 361*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun vcca3v0_codec: LDO_REG5 { 366*4882a593Smuzhiyun regulator-name = "vcca3v0_codec"; 367*4882a593Smuzhiyun regulator-always-on; 368*4882a593Smuzhiyun regulator-boot-on; 369*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 370*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 371*4882a593Smuzhiyun regulator-state-mem { 372*4882a593Smuzhiyun regulator-off-in-suspend; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 377*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 378*4882a593Smuzhiyun regulator-always-on; 379*4882a593Smuzhiyun regulator-boot-on; 380*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 381*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 382*4882a593Smuzhiyun regulator-state-mem { 383*4882a593Smuzhiyun regulator-on-in-suspend; 384*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun vcca1v8_codec: LDO_REG7 { 389*4882a593Smuzhiyun regulator-name = "vcca1v8_codec"; 390*4882a593Smuzhiyun regulator-always-on; 391*4882a593Smuzhiyun regulator-boot-on; 392*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 393*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 394*4882a593Smuzhiyun regulator-state-mem { 395*4882a593Smuzhiyun regulator-off-in-suspend; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun vcc_3v0: LDO_REG8 { 400*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 401*4882a593Smuzhiyun regulator-always-on; 402*4882a593Smuzhiyun regulator-boot-on; 403*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 404*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 405*4882a593Smuzhiyun regulator-state-mem { 406*4882a593Smuzhiyun regulator-on-in-suspend; 407*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 412*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 413*4882a593Smuzhiyun regulator-always-on; 414*4882a593Smuzhiyun regulator-boot-on; 415*4882a593Smuzhiyun regulator-state-mem { 416*4882a593Smuzhiyun regulator-off-in-suspend; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 421*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 422*4882a593Smuzhiyun regulator-always-on; 423*4882a593Smuzhiyun regulator-boot-on; 424*4882a593Smuzhiyun regulator-state-mem { 425*4882a593Smuzhiyun regulator-off-in-suspend; 426*4882a593Smuzhiyun }; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun vdd_cpu_b: regulator@40 { 432*4882a593Smuzhiyun compatible = "silergy,syr827"; 433*4882a593Smuzhiyun reg = <0x40>; 434*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 435*4882a593Smuzhiyun pinctrl-names = "default"; 436*4882a593Smuzhiyun pinctrl-0 = <&cpu_b_sleep>; 437*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 438*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 439*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 440*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 441*4882a593Smuzhiyun regulator-always-on; 442*4882a593Smuzhiyun regulator-boot-on; 443*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun regulator-state-mem { 446*4882a593Smuzhiyun regulator-off-in-suspend; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun }; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun vdd_gpu: regulator@41 { 451*4882a593Smuzhiyun compatible = "silergy,syr828"; 452*4882a593Smuzhiyun reg = <0x41>; 453*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 454*4882a593Smuzhiyun pinctrl-names = "default"; 455*4882a593Smuzhiyun pinctrl-0 = <&gpu_sleep>; 456*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 457*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 458*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 459*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 460*4882a593Smuzhiyun regulator-always-on; 461*4882a593Smuzhiyun regulator-boot-on; 462*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun regulator-state-mem { 465*4882a593Smuzhiyun regulator-off-in-suspend; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun}; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun&i2c1 { 471*4882a593Smuzhiyun i2c-scl-rising-time-ns = <450>; 472*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 473*4882a593Smuzhiyun status = "okay"; 474*4882a593Smuzhiyun}; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun&i2c3 { 477*4882a593Smuzhiyun i2c-scl-rising-time-ns = <450>; 478*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 479*4882a593Smuzhiyun status = "okay"; 480*4882a593Smuzhiyun}; 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun&i2c4 { 483*4882a593Smuzhiyun clock-frequency = <400000>; 484*4882a593Smuzhiyun i2c-scl-rising-time-ns = <450>; 485*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 486*4882a593Smuzhiyun status = "okay"; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun ak09911@c { 489*4882a593Smuzhiyun compatible = "asahi-kasei,ak09911"; 490*4882a593Smuzhiyun reg = <0x0c>; 491*4882a593Smuzhiyun vdd-supply = <&vcc3v3_s3>; 492*4882a593Smuzhiyun vid-supply = <&vcc3v3_s3>; 493*4882a593Smuzhiyun }; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun mpu6500@68 { 496*4882a593Smuzhiyun compatible = "invensense,mpu6500"; 497*4882a593Smuzhiyun reg = <0x68>; 498*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 499*4882a593Smuzhiyun interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>; 500*4882a593Smuzhiyun pinctrl-names = "default"; 501*4882a593Smuzhiyun pinctrl-0 = <&gsensor_int_l>; 502*4882a593Smuzhiyun vddio-supply = <&vcc3v3_s3>; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun lsm6ds3@6a { 506*4882a593Smuzhiyun compatible = "st,lsm6ds3"; 507*4882a593Smuzhiyun reg = <0x6a>; 508*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 509*4882a593Smuzhiyun interrupts = <RK_PD0 IRQ_TYPE_EDGE_RISING>; 510*4882a593Smuzhiyun pinctrl-names = "default"; 511*4882a593Smuzhiyun pinctrl-0 = <&gyr_int_l>; 512*4882a593Smuzhiyun vdd-supply = <&vcc3v3_s3>; 513*4882a593Smuzhiyun vddio-supply = <&vcc3v3_s3>; 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun cm32181@10 { 517*4882a593Smuzhiyun compatible = "capella,cm32181"; 518*4882a593Smuzhiyun reg = <0x10>; 519*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 520*4882a593Smuzhiyun interrupts = <RK_PD0 IRQ_TYPE_EDGE_RISING>; 521*4882a593Smuzhiyun pinctrl-names = "default"; 522*4882a593Smuzhiyun pinctrl-0 = <&light_int_l>; 523*4882a593Smuzhiyun vdd-supply = <&vcc3v3_s3>; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun fusb302@22 { 527*4882a593Smuzhiyun compatible = "fcs,fusb302"; 528*4882a593Smuzhiyun reg = <0x22>; 529*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 530*4882a593Smuzhiyun interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 531*4882a593Smuzhiyun pinctrl-names = "default"; 532*4882a593Smuzhiyun pinctrl-0 = <&chg_cc_int_l>; 533*4882a593Smuzhiyun vbus-supply = <&vbus_typec>; 534*4882a593Smuzhiyun }; 535*4882a593Smuzhiyun}; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun&io_domains { 538*4882a593Smuzhiyun status = "okay"; 539*4882a593Smuzhiyun bt656-supply = <&vcc_3v0>; 540*4882a593Smuzhiyun audio-supply = <&vcca1v8_codec>; 541*4882a593Smuzhiyun sdmmc-supply = <&vcc_sdio>; 542*4882a593Smuzhiyun gpio1830-supply = <&vcc_3v0>; 543*4882a593Smuzhiyun}; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun&pmu_io_domains { 546*4882a593Smuzhiyun status = "okay"; 547*4882a593Smuzhiyun pmu1830-supply = <&vcc_3v0>; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&pinctrl { 551*4882a593Smuzhiyun buttons { 552*4882a593Smuzhiyun pwr_btn: pwr-btn { 553*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 554*4882a593Smuzhiyun }; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun gmac { 558*4882a593Smuzhiyun phy_intb: phy-intb { 559*4882a593Smuzhiyun rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun phy_rstb: phy-rstb { 563*4882a593Smuzhiyun rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun pmic { 568*4882a593Smuzhiyun cpu_b_sleep: cpu-b-sleep { 569*4882a593Smuzhiyun rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun gpu_sleep: gpu-sleep { 573*4882a593Smuzhiyun rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 577*4882a593Smuzhiyun rockchip,pins = 578*4882a593Smuzhiyun <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 579*4882a593Smuzhiyun }; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun sd { 583*4882a593Smuzhiyun sdmmc0_pwr_h: sdmmc0-pwr-h { 584*4882a593Smuzhiyun rockchip,pins = 585*4882a593Smuzhiyun <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun }; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun usb2 { 590*4882a593Smuzhiyun vcc5v0_host_en: vcc5v0-host-en { 591*4882a593Smuzhiyun rockchip,pins = 592*4882a593Smuzhiyun <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun vcc5v0_typec_en: vcc5v0-typec-en { 596*4882a593Smuzhiyun rockchip,pins = 597*4882a593Smuzhiyun <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun sdio-pwrseq { 602*4882a593Smuzhiyun wifi_reg_on_h: wifi-reg-on-h { 603*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun }; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun wifi { 608*4882a593Smuzhiyun wifi_host_wake_l: wifi-host-wake-l { 609*4882a593Smuzhiyun rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 610*4882a593Smuzhiyun }; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun bluetooth { 614*4882a593Smuzhiyun bt_reg_on_h: bt-enable-h { 615*4882a593Smuzhiyun rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 616*4882a593Smuzhiyun }; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun bt_host_wake_l: bt-host-wake-l { 619*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 620*4882a593Smuzhiyun }; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun bt_wake_l: bt-wake-l { 623*4882a593Smuzhiyun rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun mpu6500 { 628*4882a593Smuzhiyun gsensor_int_l: gsensor-int-l { 629*4882a593Smuzhiyun rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 630*4882a593Smuzhiyun }; 631*4882a593Smuzhiyun }; 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun lsm6ds3 { 634*4882a593Smuzhiyun gyr_int_l: gyr-int-l { 635*4882a593Smuzhiyun rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 636*4882a593Smuzhiyun }; 637*4882a593Smuzhiyun }; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun cm32181 { 640*4882a593Smuzhiyun light_int_l: light-int-l { 641*4882a593Smuzhiyun rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 642*4882a593Smuzhiyun }; 643*4882a593Smuzhiyun }; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun fusb302 { 646*4882a593Smuzhiyun chg_cc_int_l: chg-cc-int-l { 647*4882a593Smuzhiyun rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun}; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun&pwm0 { 653*4882a593Smuzhiyun status = "okay"; 654*4882a593Smuzhiyun}; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun&pwm2 { 657*4882a593Smuzhiyun status = "okay"; 658*4882a593Smuzhiyun}; 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun&saradc { 661*4882a593Smuzhiyun vref-supply = <&vcca1v8_s3>; 662*4882a593Smuzhiyun status = "okay"; 663*4882a593Smuzhiyun}; 664*4882a593Smuzhiyun 665*4882a593Smuzhiyun&sdhci { 666*4882a593Smuzhiyun bus-width = <8>; 667*4882a593Smuzhiyun mmc-hs400-1_8v; 668*4882a593Smuzhiyun mmc-hs400-enhanced-strobe; 669*4882a593Smuzhiyun non-removable; 670*4882a593Smuzhiyun status = "okay"; 671*4882a593Smuzhiyun}; 672*4882a593Smuzhiyun 673*4882a593Smuzhiyun&sdio0 { 674*4882a593Smuzhiyun bus-width = <4>; 675*4882a593Smuzhiyun cap-sd-highspeed; 676*4882a593Smuzhiyun cap-sdio-irq; 677*4882a593Smuzhiyun clock-frequency = <50000000>; 678*4882a593Smuzhiyun disable-wp; 679*4882a593Smuzhiyun keep-power-in-suspend; 680*4882a593Smuzhiyun max-frequency = <50000000>; 681*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 682*4882a593Smuzhiyun non-removable; 683*4882a593Smuzhiyun pinctrl-names = "default"; 684*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 685*4882a593Smuzhiyun sd-uhs-sdr104; 686*4882a593Smuzhiyun #address-cells = <1>; 687*4882a593Smuzhiyun #size-cells = <0>; 688*4882a593Smuzhiyun status = "okay"; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun brcmf: wifi@1 { 691*4882a593Smuzhiyun reg = <1>; 692*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 693*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 694*4882a593Smuzhiyun interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 695*4882a593Smuzhiyun interrupt-names = "host-wake"; 696*4882a593Smuzhiyun pinctrl-names = "default"; 697*4882a593Smuzhiyun pinctrl-0 = <&wifi_host_wake_l>; 698*4882a593Smuzhiyun }; 699*4882a593Smuzhiyun}; 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun&sdmmc { 702*4882a593Smuzhiyun bus-width = <4>; 703*4882a593Smuzhiyun cap-mmc-highspeed; 704*4882a593Smuzhiyun cap-sd-highspeed; 705*4882a593Smuzhiyun cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 706*4882a593Smuzhiyun clock-frequency = <150000000>; 707*4882a593Smuzhiyun disable-wp; 708*4882a593Smuzhiyun max-frequency = <150000000>; 709*4882a593Smuzhiyun pinctrl-names = "default"; 710*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 711*4882a593Smuzhiyun vmmc-supply = <&vcc3v0_sd>; 712*4882a593Smuzhiyun vqmmc-supply = <&vcc_sdio>; 713*4882a593Smuzhiyun status = "okay"; 714*4882a593Smuzhiyun}; 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun&tcphy0 { 717*4882a593Smuzhiyun status = "okay"; 718*4882a593Smuzhiyun}; 719*4882a593Smuzhiyun 720*4882a593Smuzhiyun&tcphy1 { 721*4882a593Smuzhiyun status = "okay"; 722*4882a593Smuzhiyun}; 723*4882a593Smuzhiyun 724*4882a593Smuzhiyun&tsadc { 725*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; 726*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; 727*4882a593Smuzhiyun status = "okay"; 728*4882a593Smuzhiyun}; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun&u2phy0 { 731*4882a593Smuzhiyun status = "okay"; 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun u2phy0_otg: otg-port { 734*4882a593Smuzhiyun phy-supply = <&vbus_typec>; 735*4882a593Smuzhiyun status = "okay"; 736*4882a593Smuzhiyun }; 737*4882a593Smuzhiyun 738*4882a593Smuzhiyun u2phy0_host: host-port { 739*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 740*4882a593Smuzhiyun status = "okay"; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun}; 743*4882a593Smuzhiyun 744*4882a593Smuzhiyun&u2phy1 { 745*4882a593Smuzhiyun status = "okay"; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun u2phy1_otg: otg-port { 748*4882a593Smuzhiyun status = "okay"; 749*4882a593Smuzhiyun }; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun u2phy1_host: host-port { 752*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 753*4882a593Smuzhiyun status = "okay"; 754*4882a593Smuzhiyun }; 755*4882a593Smuzhiyun}; 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun&uart0 { 758*4882a593Smuzhiyun pinctrl-names = "default"; 759*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 760*4882a593Smuzhiyun status = "okay"; 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun bluetooth { 763*4882a593Smuzhiyun compatible = "brcm,bcm43438-bt"; 764*4882a593Smuzhiyun clocks = <&rk808 1>; 765*4882a593Smuzhiyun clock-names = "lpo"; 766*4882a593Smuzhiyun device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 767*4882a593Smuzhiyun host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 768*4882a593Smuzhiyun shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 769*4882a593Smuzhiyun pinctrl-names = "default"; 770*4882a593Smuzhiyun pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>; 771*4882a593Smuzhiyun vbat-supply = <&vcc3v3_sys>; 772*4882a593Smuzhiyun vddio-supply = <&vcc_1v8>; 773*4882a593Smuzhiyun }; 774*4882a593Smuzhiyun}; 775*4882a593Smuzhiyun 776*4882a593Smuzhiyun&uart2 { 777*4882a593Smuzhiyun status = "okay"; 778*4882a593Smuzhiyun}; 779*4882a593Smuzhiyun 780*4882a593Smuzhiyun&usb_host0_ehci { 781*4882a593Smuzhiyun status = "okay"; 782*4882a593Smuzhiyun}; 783*4882a593Smuzhiyun 784*4882a593Smuzhiyun&usb_host0_ohci { 785*4882a593Smuzhiyun status = "okay"; 786*4882a593Smuzhiyun}; 787*4882a593Smuzhiyun 788*4882a593Smuzhiyun&usb_host1_ehci { 789*4882a593Smuzhiyun status = "okay"; 790*4882a593Smuzhiyun}; 791*4882a593Smuzhiyun 792*4882a593Smuzhiyun&usb_host1_ohci { 793*4882a593Smuzhiyun status = "okay"; 794*4882a593Smuzhiyun}; 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun&usbdrd3_0 { 797*4882a593Smuzhiyun status = "okay"; 798*4882a593Smuzhiyun}; 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun&usbdrd_dwc3_0 { 801*4882a593Smuzhiyun status = "okay"; 802*4882a593Smuzhiyun dr_mode = "otg"; 803*4882a593Smuzhiyun}; 804*4882a593Smuzhiyun 805*4882a593Smuzhiyun&usbdrd3_1 { 806*4882a593Smuzhiyun status = "okay"; 807*4882a593Smuzhiyun}; 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun&usbdrd_dwc3_1 { 810*4882a593Smuzhiyun status = "okay"; 811*4882a593Smuzhiyun dr_mode = "host"; 812*4882a593Smuzhiyun}; 813*4882a593Smuzhiyun 814*4882a593Smuzhiyun&vopb { 815*4882a593Smuzhiyun status = "okay"; 816*4882a593Smuzhiyun}; 817*4882a593Smuzhiyun 818*4882a593Smuzhiyun&vopb_mmu { 819*4882a593Smuzhiyun status = "okay"; 820*4882a593Smuzhiyun}; 821*4882a593Smuzhiyun 822*4882a593Smuzhiyun&vopl { 823*4882a593Smuzhiyun status = "okay"; 824*4882a593Smuzhiyun}; 825*4882a593Smuzhiyun 826*4882a593Smuzhiyun&vopl_mmu { 827*4882a593Smuzhiyun status = "okay"; 828*4882a593Smuzhiyun}; 829