xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3399.dtsi"
10*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Leez RK3399 P710";
14*4882a593Smuzhiyun	compatible = "leez,p710", "rockchip,rk3399";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
21*4882a593Smuzhiyun		compatible = "fixed-clock";
22*4882a593Smuzhiyun		clock-frequency = <125000000>;
23*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
24*4882a593Smuzhiyun		#clock-cells = <0>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
28*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
29*4882a593Smuzhiyun		clocks = <&rk808 1>;
30*4882a593Smuzhiyun		clock-names = "ext_clock";
31*4882a593Smuzhiyun		pinctrl-names = "default";
32*4882a593Smuzhiyun		pinctrl-0 = <&wifi_reg_on_h>;
33*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	dc5v_adp: dc5v-adp {
37*4882a593Smuzhiyun		compatible = "regulator-fixed";
38*4882a593Smuzhiyun		regulator-name = "dc5v_adapter";
39*4882a593Smuzhiyun		regulator-always-on;
40*4882a593Smuzhiyun		regulator-boot-on;
41*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
42*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	vcc3v3_lan: vcc3v3-lan {
46*4882a593Smuzhiyun		compatible = "regulator-fixed";
47*4882a593Smuzhiyun		regulator-name = "vcc3v3_lan";
48*4882a593Smuzhiyun		regulator-always-on;
49*4882a593Smuzhiyun		regulator-boot-on;
50*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
51*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
52*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
56*4882a593Smuzhiyun		compatible = "regulator-fixed";
57*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
58*4882a593Smuzhiyun		regulator-always-on;
59*4882a593Smuzhiyun		regulator-boot-on;
60*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
61*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
62*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	vcc5v0_host0: vcc5v0_host1: vcc5v0-host {
66*4882a593Smuzhiyun		compatible = "regulator-fixed";
67*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
68*4882a593Smuzhiyun		regulator-boot-on;
69*4882a593Smuzhiyun		regulator-always-on;
70*4882a593Smuzhiyun		regulator-min-microvolt = <5500000>;
71*4882a593Smuzhiyun		regulator-max-microvolt = <5500000>;
72*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	vcc5v0_host3: vcc5v0-host3 {
76*4882a593Smuzhiyun		compatible = "regulator-fixed";
77*4882a593Smuzhiyun		regulator-name = "vcc5v0_host3";
78*4882a593Smuzhiyun		enable-active-high;
79*4882a593Smuzhiyun		gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
80*4882a593Smuzhiyun		pinctrl-names = "default";
81*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host3_en>;
82*4882a593Smuzhiyun		regulator-always-on;
83*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
87*4882a593Smuzhiyun		compatible = "regulator-fixed";
88*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
89*4882a593Smuzhiyun		regulator-always-on;
90*4882a593Smuzhiyun		regulator-boot-on;
91*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
92*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
93*4882a593Smuzhiyun		vin-supply = <&dc5v_adp>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	vdd_log: vdd-log {
97*4882a593Smuzhiyun		compatible = "pwm-regulator";
98*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 1>;
99*4882a593Smuzhiyun		regulator-name = "vdd_log";
100*4882a593Smuzhiyun		regulator-always-on;
101*4882a593Smuzhiyun		regulator-boot-on;
102*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
103*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
104*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&cpu_l0 {
109*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&cpu_l1 {
113*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&cpu_l2 {
117*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&cpu_l3 {
121*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&cpu_b0 {
125*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&cpu_b1 {
129*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&emmc_phy {
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&gmac {
137*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
138*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
139*4882a593Smuzhiyun	clock_in_out = "input";
140*4882a593Smuzhiyun	phy-supply = <&vcc3v3_lan>;
141*4882a593Smuzhiyun	phy-mode = "rgmii";
142*4882a593Smuzhiyun	pinctrl-names = "default";
143*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
144*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
145*4882a593Smuzhiyun	snps,reset-active-low;
146*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
147*4882a593Smuzhiyun	tx_delay = <0x28>;
148*4882a593Smuzhiyun	rx_delay = <0x11>;
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&gpu {
153*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&hdmi {
158*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c7>;
159*4882a593Smuzhiyun	pinctrl-names = "default";
160*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_cec>;
161*4882a593Smuzhiyun	status = "okay";
162*4882a593Smuzhiyun};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun&hdmi_sound {
165*4882a593Smuzhiyun	status = "okay";
166*4882a593Smuzhiyun};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun&i2c0 {
169*4882a593Smuzhiyun	clock-frequency = <400000>;
170*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
171*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	rk808: pmic@1b {
175*4882a593Smuzhiyun		compatible = "rockchip,rk808";
176*4882a593Smuzhiyun		reg = <0x1b>;
177*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
178*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
179*4882a593Smuzhiyun		#clock-cells = <1>;
180*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
181*4882a593Smuzhiyun		pinctrl-names = "default";
182*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
183*4882a593Smuzhiyun		rockchip,system-power-controller;
184*4882a593Smuzhiyun		wakeup-source;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
187*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
188*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
189*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
190*4882a593Smuzhiyun		vcc6-supply = <&vcc5v0_sys>;
191*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
192*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
193*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
194*4882a593Smuzhiyun		vcc10-supply = <&vcc5v0_sys>;
195*4882a593Smuzhiyun		vcc11-supply = <&vcc5v0_sys>;
196*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
197*4882a593Smuzhiyun		vddio-supply = <&vcc_1v8>;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun		regulators {
200*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
201*4882a593Smuzhiyun				regulator-name = "vdd_center";
202*4882a593Smuzhiyun				regulator-always-on;
203*4882a593Smuzhiyun				regulator-boot-on;
204*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
205*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
206*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
207*4882a593Smuzhiyun				regulator-state-mem {
208*4882a593Smuzhiyun					regulator-off-in-suspend;
209*4882a593Smuzhiyun				};
210*4882a593Smuzhiyun			};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
213*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
214*4882a593Smuzhiyun				regulator-always-on;
215*4882a593Smuzhiyun				regulator-boot-on;
216*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
217*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
218*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
219*4882a593Smuzhiyun				regulator-state-mem {
220*4882a593Smuzhiyun					regulator-off-in-suspend;
221*4882a593Smuzhiyun				};
222*4882a593Smuzhiyun			};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
225*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
226*4882a593Smuzhiyun				regulator-always-on;
227*4882a593Smuzhiyun				regulator-boot-on;
228*4882a593Smuzhiyun				regulator-state-mem {
229*4882a593Smuzhiyun					regulator-on-in-suspend;
230*4882a593Smuzhiyun				};
231*4882a593Smuzhiyun			};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
234*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
235*4882a593Smuzhiyun				regulator-always-on;
236*4882a593Smuzhiyun				regulator-boot-on;
237*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
238*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
239*4882a593Smuzhiyun				regulator-state-mem {
240*4882a593Smuzhiyun					regulator-on-in-suspend;
241*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
242*4882a593Smuzhiyun				};
243*4882a593Smuzhiyun			};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
246*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
247*4882a593Smuzhiyun				regulator-always-on;
248*4882a593Smuzhiyun				regulator-boot-on;
249*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
250*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
251*4882a593Smuzhiyun				regulator-state-mem {
252*4882a593Smuzhiyun					regulator-off-in-suspend;
253*4882a593Smuzhiyun				};
254*4882a593Smuzhiyun			};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun			vcc1v8_hdmi: LDO_REG2 {
257*4882a593Smuzhiyun				regulator-name = "vcc1v8_hdmi";
258*4882a593Smuzhiyun				regulator-always-on;
259*4882a593Smuzhiyun				regulator-boot-on;
260*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
261*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
262*4882a593Smuzhiyun				regulator-state-mem {
263*4882a593Smuzhiyun					regulator-off-in-suspend;
264*4882a593Smuzhiyun				};
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun			vcca_1v8: LDO_REG3 {
268*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
269*4882a593Smuzhiyun				regulator-always-on;
270*4882a593Smuzhiyun				regulator-boot-on;
271*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
272*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
273*4882a593Smuzhiyun				regulator-state-mem {
274*4882a593Smuzhiyun					regulator-on-in-suspend;
275*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
276*4882a593Smuzhiyun				};
277*4882a593Smuzhiyun			};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun			vccio_sd: LDO_REG4 {
280*4882a593Smuzhiyun				regulator-name = "vccio_sd";
281*4882a593Smuzhiyun				regulator-always-on;
282*4882a593Smuzhiyun				regulator-boot-on;
283*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
284*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
285*4882a593Smuzhiyun				regulator-state-mem {
286*4882a593Smuzhiyun					regulator-on-in-suspend;
287*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
288*4882a593Smuzhiyun				};
289*4882a593Smuzhiyun			};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
292*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
293*4882a593Smuzhiyun				regulator-always-on;
294*4882a593Smuzhiyun				regulator-boot-on;
295*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
296*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
297*4882a593Smuzhiyun				regulator-state-mem {
298*4882a593Smuzhiyun					regulator-off-in-suspend;
299*4882a593Smuzhiyun				};
300*4882a593Smuzhiyun			};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
303*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
304*4882a593Smuzhiyun				regulator-always-on;
305*4882a593Smuzhiyun				regulator-boot-on;
306*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
307*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
308*4882a593Smuzhiyun				regulator-state-mem {
309*4882a593Smuzhiyun					regulator-on-in-suspend;
310*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
311*4882a593Smuzhiyun				};
312*4882a593Smuzhiyun			};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun			vcc0v9_hdmi: LDO_REG7 {
315*4882a593Smuzhiyun				regulator-name = "vcc0v9_hdmi";
316*4882a593Smuzhiyun				regulator-always-on;
317*4882a593Smuzhiyun				regulator-boot-on;
318*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
319*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
320*4882a593Smuzhiyun				regulator-state-mem {
321*4882a593Smuzhiyun					regulator-off-in-suspend;
322*4882a593Smuzhiyun				};
323*4882a593Smuzhiyun			};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
326*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
327*4882a593Smuzhiyun				regulator-always-on;
328*4882a593Smuzhiyun				regulator-boot-on;
329*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
330*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
331*4882a593Smuzhiyun				regulator-state-mem {
332*4882a593Smuzhiyun					regulator-on-in-suspend;
333*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
334*4882a593Smuzhiyun				};
335*4882a593Smuzhiyun			};
336*4882a593Smuzhiyun		};
337*4882a593Smuzhiyun	};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
340*4882a593Smuzhiyun		compatible = "silergy,syr827";
341*4882a593Smuzhiyun		reg = <0x40>;
342*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
343*4882a593Smuzhiyun		pinctrl-names = "default";
344*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_pin>;
345*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
346*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
347*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
348*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
349*4882a593Smuzhiyun		regulator-always-on;
350*4882a593Smuzhiyun		regulator-boot-on;
351*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun		regulator-state-mem {
354*4882a593Smuzhiyun			regulator-off-in-suspend;
355*4882a593Smuzhiyun		};
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
359*4882a593Smuzhiyun		compatible = "silergy,syr828";
360*4882a593Smuzhiyun		reg = <0x41>;
361*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
362*4882a593Smuzhiyun		pinctrl-names = "default";
363*4882a593Smuzhiyun		pinctrl-0 = <&vsel2_pin>;
364*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
365*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
366*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
367*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
368*4882a593Smuzhiyun		regulator-always-on;
369*4882a593Smuzhiyun		regulator-boot-on;
370*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun		regulator-state-mem {
373*4882a593Smuzhiyun			regulator-off-in-suspend;
374*4882a593Smuzhiyun		};
375*4882a593Smuzhiyun	};
376*4882a593Smuzhiyun};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun&i2c1 {
379*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
380*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
381*4882a593Smuzhiyun	status = "okay";
382*4882a593Smuzhiyun};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun&i2c3 {
385*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
386*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
387*4882a593Smuzhiyun	status = "okay";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&i2c4 {
391*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <600>;
392*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
393*4882a593Smuzhiyun	status = "okay";
394*4882a593Smuzhiyun};
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun&i2c7 {
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun&i2s0 {
401*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
402*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
403*4882a593Smuzhiyun	status = "okay";
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&i2s1 {
407*4882a593Smuzhiyun	rockchip,playback-channels = <2>;
408*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
409*4882a593Smuzhiyun	status = "okay";
410*4882a593Smuzhiyun};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun&i2s2 {
413*4882a593Smuzhiyun	status = "okay";
414*4882a593Smuzhiyun};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun&io_domains {
417*4882a593Smuzhiyun	status = "okay";
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun	bt656-supply = <&vcc1v8_dvp>;
420*4882a593Smuzhiyun	audio-supply = <&vcc_1v8>;
421*4882a593Smuzhiyun	sdmmc-supply = <&vccio_sd>;
422*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;
423*4882a593Smuzhiyun};
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun&pmu_io_domains {
426*4882a593Smuzhiyun	status = "okay";
427*4882a593Smuzhiyun	pmu1830-supply = <&vcc_3v0>;
428*4882a593Smuzhiyun};
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun&pinctrl {
431*4882a593Smuzhiyun	bt {
432*4882a593Smuzhiyun		bt_reg_on_h: bt-reg-on-h {
433*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		bt_host_wake_l: bt-host-wake-l {
437*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
438*4882a593Smuzhiyun		};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun		bt_wake_l: bt-wake-l {
441*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
442*4882a593Smuzhiyun		};
443*4882a593Smuzhiyun	};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun	pmic {
446*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
447*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
448*4882a593Smuzhiyun		};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun		vsel1_pin: vsel1-pin {
451*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
452*4882a593Smuzhiyun		};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun		vsel2_pin: vsel2-pin {
455*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
456*4882a593Smuzhiyun		};
457*4882a593Smuzhiyun	};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun	usb2 {
460*4882a593Smuzhiyun		vcc5v0_host3_en: vcc5v0-host3-en {
461*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
462*4882a593Smuzhiyun		};
463*4882a593Smuzhiyun	};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun	wifi {
466*4882a593Smuzhiyun		wifi_reg_on_h: wifi-reg-on-h {
467*4882a593Smuzhiyun			rockchip,pins =
468*4882a593Smuzhiyun				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
469*4882a593Smuzhiyun		};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun		wifi_host_wake_l: wifi-host-wake-l {
472*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
473*4882a593Smuzhiyun		};
474*4882a593Smuzhiyun	};
475*4882a593Smuzhiyun};
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun&pwm2 {
478*4882a593Smuzhiyun	status = "okay";
479*4882a593Smuzhiyun};
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun&saradc {
482*4882a593Smuzhiyun	status = "okay";
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&sdio0 {
488*4882a593Smuzhiyun	#address-cells = <1>;
489*4882a593Smuzhiyun	#size-cells = <0>;
490*4882a593Smuzhiyun	bus-width = <4>;
491*4882a593Smuzhiyun	clock-frequency = <50000000>;
492*4882a593Smuzhiyun	cap-sdio-irq;
493*4882a593Smuzhiyun	cap-sd-highspeed;
494*4882a593Smuzhiyun	keep-power-in-suspend;
495*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
496*4882a593Smuzhiyun	non-removable;
497*4882a593Smuzhiyun	pinctrl-names = "default";
498*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
499*4882a593Smuzhiyun	sd-uhs-sdr104;
500*4882a593Smuzhiyun	status = "okay";
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun	brcmf: wifi@1 {
503*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
504*4882a593Smuzhiyun		reg = <1>;
505*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
506*4882a593Smuzhiyun		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
507*4882a593Smuzhiyun		interrupt-names = "host-wake";
508*4882a593Smuzhiyun		pinctrl-names = "default";
509*4882a593Smuzhiyun		pinctrl-0 = <&wifi_host_wake_l>;
510*4882a593Smuzhiyun	};
511*4882a593Smuzhiyun};
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun&sdhci {
514*4882a593Smuzhiyun	bus-width = <8>;
515*4882a593Smuzhiyun	mmc-hs400-1_8v;
516*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
517*4882a593Smuzhiyun	non-removable;
518*4882a593Smuzhiyun	status = "okay";
519*4882a593Smuzhiyun};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun&sdmmc {
522*4882a593Smuzhiyun	bus-width = <4>;
523*4882a593Smuzhiyun	cap-mmc-highspeed;
524*4882a593Smuzhiyun	cap-sd-highspeed;
525*4882a593Smuzhiyun	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
526*4882a593Smuzhiyun	disable-wp;
527*4882a593Smuzhiyun	max-frequency = <150000000>;
528*4882a593Smuzhiyun	pinctrl-names = "default";
529*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
530*4882a593Smuzhiyun	status = "okay";
531*4882a593Smuzhiyun};
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun&tcphy0 {
534*4882a593Smuzhiyun	status = "okay";
535*4882a593Smuzhiyun};
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun&tcphy1 {
538*4882a593Smuzhiyun	status = "okay";
539*4882a593Smuzhiyun};
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun&tsadc {
542*4882a593Smuzhiyun	status = "okay";
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun	/* tshut mode 0:CRU 1:GPIO */
545*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
546*4882a593Smuzhiyun	/* tshut polarity 0:LOW 1:HIGH */
547*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
548*4882a593Smuzhiyun};
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun&u2phy0 {
551*4882a593Smuzhiyun	status = "okay";
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun	u2phy0_otg: otg-port {
554*4882a593Smuzhiyun		status = "okay";
555*4882a593Smuzhiyun	};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun	u2phy0_host: host-port {
558*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host0>;
559*4882a593Smuzhiyun		status = "okay";
560*4882a593Smuzhiyun	};
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&u2phy1 {
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun	u2phy1_otg: otg-port {
567*4882a593Smuzhiyun		status = "okay";
568*4882a593Smuzhiyun	};
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun	u2phy1_host: host-port {
571*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host1>;
572*4882a593Smuzhiyun		status = "okay";
573*4882a593Smuzhiyun	};
574*4882a593Smuzhiyun};
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun&uart0 {
577*4882a593Smuzhiyun	pinctrl-names = "default";
578*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
579*4882a593Smuzhiyun	status = "okay";
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun	bluetooth {
582*4882a593Smuzhiyun		compatible = "brcm,bcm43438-bt";
583*4882a593Smuzhiyun		clocks = <&rk808 1>;
584*4882a593Smuzhiyun		clock-names = "ext_clock";
585*4882a593Smuzhiyun		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
586*4882a593Smuzhiyun		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
587*4882a593Smuzhiyun		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
588*4882a593Smuzhiyun		pinctrl-names = "default";
589*4882a593Smuzhiyun		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
590*4882a593Smuzhiyun	};
591*4882a593Smuzhiyun};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun&uart2 {
594*4882a593Smuzhiyun	status = "okay";
595*4882a593Smuzhiyun};
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun&usb_host0_ehci {
598*4882a593Smuzhiyun	status = "okay";
599*4882a593Smuzhiyun};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun&usb_host0_ohci {
602*4882a593Smuzhiyun	status = "okay";
603*4882a593Smuzhiyun};
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun&usb_host1_ehci {
606*4882a593Smuzhiyun	status = "okay";
607*4882a593Smuzhiyun};
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun&usb_host1_ohci {
610*4882a593Smuzhiyun	status = "okay";
611*4882a593Smuzhiyun};
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun&usbdrd3_0 {
614*4882a593Smuzhiyun	status = "okay";
615*4882a593Smuzhiyun};
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun&usbdrd_dwc3_0 {
618*4882a593Smuzhiyun	status = "okay";
619*4882a593Smuzhiyun	dr_mode = "otg";
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&usbdrd3_1 {
623*4882a593Smuzhiyun	status = "okay";
624*4882a593Smuzhiyun};
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun&usbdrd_dwc3_1 {
627*4882a593Smuzhiyun	status = "okay";
628*4882a593Smuzhiyun	dr_mode = "host";
629*4882a593Smuzhiyun};
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun&vopb {
632*4882a593Smuzhiyun	status = "okay";
633*4882a593Smuzhiyun};
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun&vopb_mmu {
636*4882a593Smuzhiyun	status = "okay";
637*4882a593Smuzhiyun};
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun&vopl {
640*4882a593Smuzhiyun	status = "okay";
641*4882a593Smuzhiyun};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun&vopl_mmu {
644*4882a593Smuzhiyun	status = "okay";
645*4882a593Smuzhiyun};
646