1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "rk3399.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Rockchip RK3399 FPGA Board"; 12*4882a593Smuzhiyun compatible = "rockchip,fpga", "rockchip,rk3399"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun bootargs = "init=/init console=uart,mmio32,0xff1a0000"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@00000000 { 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0x0 0x00000000 0x0 0x20000000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&uart2 { 25*4882a593Smuzhiyun status = "okay"; 26*4882a593Smuzhiyun clocks = <&xin24m>, <&xin24m>; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29