1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "rk3399-evb.dtsi" 8*4882a593Smuzhiyun#include "rk3399-early-opp.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun vcc5v0_sys: vcc5v0-sys { 14*4882a593Smuzhiyun compatible = "regulator-fixed"; 15*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 16*4882a593Smuzhiyun regulator-always-on; 17*4882a593Smuzhiyun regulator-boot-on; 18*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 19*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun vdd_center: vdd-center { 23*4882a593Smuzhiyun compatible = "pwm-regulator"; 24*4882a593Smuzhiyun rockchip,pwm_id = <3>; 25*4882a593Smuzhiyun rockchip,pwm_voltage = <900000>; 26*4882a593Smuzhiyun pwms = <&pwm3 0 25000 1>; 27*4882a593Smuzhiyun regulator-name = "vdd_center"; 28*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 29*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 30*4882a593Smuzhiyun regulator-always-on; 31*4882a593Smuzhiyun regulator-boot-on; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun xin32k: xin32k { 35*4882a593Smuzhiyun compatible = "fixed-clock"; 36*4882a593Smuzhiyun clock-frequency = <32768>; 37*4882a593Smuzhiyun clock-output-names = "xin32k"; 38*4882a593Smuzhiyun #clock-cells = <0>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&cpu_l0 { 43*4882a593Smuzhiyun dynamic-power-coefficient = <121>; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&cpu_b0 { 47*4882a593Smuzhiyun dynamic-power-coefficient = <1068>; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&soc_thermal { 51*4882a593Smuzhiyun sustainable-power = <1600>; /* milliwatts */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun cooling-maps { 54*4882a593Smuzhiyun map0 { 55*4882a593Smuzhiyun trip = <&target>; 56*4882a593Smuzhiyun cooling-device = 57*4882a593Smuzhiyun <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 58*4882a593Smuzhiyun contribution = <10240>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun map1 { 61*4882a593Smuzhiyun trip = <&target>; 62*4882a593Smuzhiyun cooling-device = 63*4882a593Smuzhiyun <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 64*4882a593Smuzhiyun contribution = <1024>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun map2 { 67*4882a593Smuzhiyun trip = <&target>; 68*4882a593Smuzhiyun cooling-device = 69*4882a593Smuzhiyun <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 70*4882a593Smuzhiyun contribution = <10240>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&gpu_power_model { 76*4882a593Smuzhiyun dynamic-power = <1780>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&i2c0 { 80*4882a593Smuzhiyun fusb1: fusb30x@22 { 81*4882a593Smuzhiyun compatible = "fairchild,fusb302"; 82*4882a593Smuzhiyun reg = <0x22>; 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun pinctrl-0 = <&fusb1_int>; 85*4882a593Smuzhiyun vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 86*4882a593Smuzhiyun int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 87*4882a593Smuzhiyun status = "okay"; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun vdd_cpu_b: syr827@40 { 91*4882a593Smuzhiyun compatible = "silergy,syr827"; 92*4882a593Smuzhiyun reg = <0x40>; 93*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 94*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 95*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 96*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 97*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 98*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 99*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 100*4882a593Smuzhiyun regulator-always-on; 101*4882a593Smuzhiyun regulator-boot-on; 102*4882a593Smuzhiyun regulator-initial-state = <3>; 103*4882a593Smuzhiyun regulator-state-mem { 104*4882a593Smuzhiyun regulator-off-in-suspend; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun lp8752: lp8752@60 { 109*4882a593Smuzhiyun compatible = "ti,lp8752"; 110*4882a593Smuzhiyun reg = <0x60>; 111*4882a593Smuzhiyun vin0-supply = <&vcc5v0_sys>; 112*4882a593Smuzhiyun regulators { 113*4882a593Smuzhiyun vdd_gpu: lp8752_buck0 { 114*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 115*4882a593Smuzhiyun regulator-min-microvolt = <735000>; 116*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 117*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 118*4882a593Smuzhiyun regulator-always-on; 119*4882a593Smuzhiyun regulator-boot-on; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun rk808: pmic@1b { 125*4882a593Smuzhiyun compatible = "rockchip,rk808"; 126*4882a593Smuzhiyun reg = <0x1b>; 127*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 128*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 129*4882a593Smuzhiyun pinctrl-names = "default"; 130*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l &pmic_dvs2>; 131*4882a593Smuzhiyun rockchip,system-power-controller; 132*4882a593Smuzhiyun wakeup-source; 133*4882a593Smuzhiyun #clock-cells = <1>; 134*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun vcc1-supply = <&vcc3v3_sys>; 137*4882a593Smuzhiyun vcc2-supply = <&vcc3v3_sys>; 138*4882a593Smuzhiyun vcc3-supply = <&vcc3v3_sys>; 139*4882a593Smuzhiyun vcc4-supply = <&vcc3v3_sys>; 140*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 141*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 142*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 143*4882a593Smuzhiyun vcc9-supply = <&vcc3v3_sys>; 144*4882a593Smuzhiyun vcc10-supply = <&vcc3v3_sys>; 145*4882a593Smuzhiyun vcc11-supply = <&vcc3v3_sys>; 146*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 147*4882a593Smuzhiyun vddio-supply = <&vcc1v8_pmu>; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun regulators { 150*4882a593Smuzhiyun vdd_log: DCDC_REG1 { 151*4882a593Smuzhiyun regulator-always-on; 152*4882a593Smuzhiyun regulator-boot-on; 153*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 154*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 155*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 156*4882a593Smuzhiyun regulator-name = "vdd_log"; 157*4882a593Smuzhiyun regulator-state-mem { 158*4882a593Smuzhiyun regulator-on-in-suspend; 159*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 164*4882a593Smuzhiyun regulator-always-on; 165*4882a593Smuzhiyun regulator-boot-on; 166*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 167*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 168*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 169*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 170*4882a593Smuzhiyun regulator-state-mem { 171*4882a593Smuzhiyun regulator-off-in-suspend; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 176*4882a593Smuzhiyun regulator-always-on; 177*4882a593Smuzhiyun regulator-boot-on; 178*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 179*4882a593Smuzhiyun regulator-state-mem { 180*4882a593Smuzhiyun regulator-on-in-suspend; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 185*4882a593Smuzhiyun regulator-always-on; 186*4882a593Smuzhiyun regulator-boot-on; 187*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 188*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 189*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 190*4882a593Smuzhiyun regulator-state-mem { 191*4882a593Smuzhiyun regulator-on-in-suspend; 192*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG1 { 197*4882a593Smuzhiyun regulator-always-on; 198*4882a593Smuzhiyun regulator-boot-on; 199*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 200*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 201*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 202*4882a593Smuzhiyun regulator-state-mem { 203*4882a593Smuzhiyun regulator-off-in-suspend; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun vcc3v0_tp: LDO_REG2 { 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun regulator-boot-on; 210*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 211*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 212*4882a593Smuzhiyun regulator-name = "vcc3v0_tp"; 213*4882a593Smuzhiyun regulator-state-mem { 214*4882a593Smuzhiyun regulator-off-in-suspend; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun vcc1v8_pmu: LDO_REG3 { 219*4882a593Smuzhiyun regulator-always-on; 220*4882a593Smuzhiyun regulator-boot-on; 221*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 222*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 223*4882a593Smuzhiyun regulator-name = "vcc1v8_pmu"; 224*4882a593Smuzhiyun regulator-state-mem { 225*4882a593Smuzhiyun regulator-on-in-suspend; 226*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun vcc_sd: LDO_REG4 { 231*4882a593Smuzhiyun regulator-always-on; 232*4882a593Smuzhiyun regulator-boot-on; 233*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 234*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 235*4882a593Smuzhiyun regulator-name = "vcc_sd"; 236*4882a593Smuzhiyun regulator-state-mem { 237*4882a593Smuzhiyun regulator-on-in-suspend; 238*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun vcca3v0_codec: LDO_REG5 { 243*4882a593Smuzhiyun regulator-always-on; 244*4882a593Smuzhiyun regulator-boot-on; 245*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 246*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 247*4882a593Smuzhiyun regulator-name = "vcca3v0_codec"; 248*4882a593Smuzhiyun regulator-state-mem { 249*4882a593Smuzhiyun regulator-off-in-suspend; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 254*4882a593Smuzhiyun regulator-always-on; 255*4882a593Smuzhiyun regulator-boot-on; 256*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 257*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 258*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 259*4882a593Smuzhiyun regulator-state-mem { 260*4882a593Smuzhiyun regulator-on-in-suspend; 261*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun vcca1v8_codec: LDO_REG7 { 266*4882a593Smuzhiyun regulator-always-on; 267*4882a593Smuzhiyun regulator-boot-on; 268*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 269*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 270*4882a593Smuzhiyun regulator-name = "vcca1v8_codec"; 271*4882a593Smuzhiyun regulator-state-mem { 272*4882a593Smuzhiyun regulator-off-in-suspend; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun vcc_3v0: LDO_REG8 { 277*4882a593Smuzhiyun regulator-always-on; 278*4882a593Smuzhiyun regulator-boot-on; 279*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 280*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 281*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 282*4882a593Smuzhiyun regulator-state-mem { 283*4882a593Smuzhiyun regulator-on-in-suspend; 284*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 289*4882a593Smuzhiyun regulator-always-on; 290*4882a593Smuzhiyun regulator-boot-on; 291*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 292*4882a593Smuzhiyun regulator-state-mem { 293*4882a593Smuzhiyun regulator-off-in-suspend; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 298*4882a593Smuzhiyun regulator-always-on; 299*4882a593Smuzhiyun regulator-boot-on; 300*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 301*4882a593Smuzhiyun regulator-state-mem { 302*4882a593Smuzhiyun regulator-off-in-suspend; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun}; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun&pwm3 { 310*4882a593Smuzhiyun status = "okay"; 311*4882a593Smuzhiyun pinctrl-names = "active"; 312*4882a593Smuzhiyun pinctrl-0 = <&pwm3a_pin_pull_down>; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&u2phy0_otg { 316*4882a593Smuzhiyun rockchip,utmi-avalid; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&i2c6 { 320*4882a593Smuzhiyun status = "okay"; 321*4882a593Smuzhiyun fusb0: fusb30x@22 { 322*4882a593Smuzhiyun compatible = "fairchild,fusb302"; 323*4882a593Smuzhiyun reg = <0x22>; 324*4882a593Smuzhiyun pinctrl-names = "default"; 325*4882a593Smuzhiyun pinctrl-0 = <&fusb0_int>; 326*4882a593Smuzhiyun vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 327*4882a593Smuzhiyun int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 328*4882a593Smuzhiyun status = "okay"; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun}; 331