xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-evb-rev1.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "rk3399-evb.dtsi"
8*4882a593Smuzhiyun#include "rk3399-early-opp.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	compatible = "rockchip,rk3399-evb-rev1", "rockchip,rk3399";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	vdd_log: vdd-log {
14*4882a593Smuzhiyun		compatible = "pwm-regulator";
15*4882a593Smuzhiyun		rockchip,pwm_id = <2>;
16*4882a593Smuzhiyun		rockchip,pwm_voltage = <900000>;
17*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 1>;
18*4882a593Smuzhiyun		regulator-name = "vdd_log";
19*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
20*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
21*4882a593Smuzhiyun		regulator-always-on;
22*4882a593Smuzhiyun		regulator-boot-on;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	vdd_center: vdd-center {
26*4882a593Smuzhiyun		compatible = "pwm-regulator";
27*4882a593Smuzhiyun		rockchip,pwm_id = <3>;
28*4882a593Smuzhiyun		rockchip,pwm_voltage = <900000>;
29*4882a593Smuzhiyun		pwms = <&pwm3 0 25000 1>;
30*4882a593Smuzhiyun		regulator-name = "vdd_center";
31*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
32*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
33*4882a593Smuzhiyun		regulator-always-on;
34*4882a593Smuzhiyun		regulator-boot-on;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	xin32k: xin32k {
38*4882a593Smuzhiyun		compatible = "fixed-clock";
39*4882a593Smuzhiyun		clock-frequency = <32768>;
40*4882a593Smuzhiyun		clock-output-names = "xin32k";
41*4882a593Smuzhiyun		#clock-cells = <0>;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&cpu_l0 {
46*4882a593Smuzhiyun	dynamic-power-coefficient = <121>;
47*4882a593Smuzhiyun};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun&cpu_b0 {
50*4882a593Smuzhiyun	dynamic-power-coefficient = <1068>;
51*4882a593Smuzhiyun};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun&soc_thermal {
54*4882a593Smuzhiyun	sustainable-power = <1600>; /* milliwatts */
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	cooling-maps {
57*4882a593Smuzhiyun		map0 {
58*4882a593Smuzhiyun			trip = <&target>;
59*4882a593Smuzhiyun			cooling-device =
60*4882a593Smuzhiyun				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
61*4882a593Smuzhiyun			contribution = <10240>;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun		map1 {
64*4882a593Smuzhiyun			trip = <&target>;
65*4882a593Smuzhiyun			cooling-device =
66*4882a593Smuzhiyun				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
67*4882a593Smuzhiyun			contribution = <1024>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun		map2 {
70*4882a593Smuzhiyun			trip = <&target>;
71*4882a593Smuzhiyun			cooling-device =
72*4882a593Smuzhiyun				<&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
73*4882a593Smuzhiyun			contribution = <10240>;
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun&gpu_power_model {
79*4882a593Smuzhiyun	dynamic-power = <1780>;
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&i2c0 {
83*4882a593Smuzhiyun	fusb0: fusb30x@22 {
84*4882a593Smuzhiyun		compatible = "fairchild,fusb302";
85*4882a593Smuzhiyun		reg = <0x22>;
86*4882a593Smuzhiyun		pinctrl-names = "default";
87*4882a593Smuzhiyun		pinctrl-0 = <&fusb0_int>;
88*4882a593Smuzhiyun		vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
89*4882a593Smuzhiyun		int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
90*4882a593Smuzhiyun		status = "okay";
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	mp8865: mp8865@68 {
94*4882a593Smuzhiyun		compatible = "mps,mp8865";
95*4882a593Smuzhiyun		reg = <0x68>;
96*4882a593Smuzhiyun		regulators {
97*4882a593Smuzhiyun			vdd_gpu: mp8865_dcdc1 {
98*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
99*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
100*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
101*4882a593Smuzhiyun				regulator-ramp-delay = <8000>;
102*4882a593Smuzhiyun				regulator-always-on;
103*4882a593Smuzhiyun				regulator-boot-on;
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun	rk808: pmic@1b {
109*4882a593Smuzhiyun		compatible = "rockchip,rk808";
110*4882a593Smuzhiyun		reg = <0x1b>;
111*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
112*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
113*4882a593Smuzhiyun		pinctrl-names = "default";
114*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
115*4882a593Smuzhiyun		rockchip,system-power-controller;
116*4882a593Smuzhiyun		wakeup-source;
117*4882a593Smuzhiyun		#clock-cells = <1>;
118*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		vcc1-supply = <&vcc3v3_sys>;
121*4882a593Smuzhiyun		vcc2-supply = <&vcc3v3_sys>;
122*4882a593Smuzhiyun		vcc3-supply = <&vcc3v3_sys>;
123*4882a593Smuzhiyun		vcc4-supply = <&vcc3v3_sys>;
124*4882a593Smuzhiyun		vcc6-supply = <&vcc3v3_sys>;
125*4882a593Smuzhiyun		vcc7-supply = <&vcc3v3_sys>;
126*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
127*4882a593Smuzhiyun		vcc9-supply = <&vcc3v3_sys>;
128*4882a593Smuzhiyun		vcc10-supply = <&vcc3v3_sys>;
129*4882a593Smuzhiyun		vcc11-supply = <&vcc3v3_sys>;
130*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
131*4882a593Smuzhiyun		vddio-supply = <&vcc1v8_pmu>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		regulators {
134*4882a593Smuzhiyun			vdd_cpu_b: DCDC_REG1 {
135*4882a593Smuzhiyun				regulator-always-on;
136*4882a593Smuzhiyun				regulator-boot-on;
137*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
138*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
139*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
140*4882a593Smuzhiyun				regulator-name = "vdd_cpu_b";
141*4882a593Smuzhiyun				regulator-state-mem {
142*4882a593Smuzhiyun					regulator-off-in-suspend;
143*4882a593Smuzhiyun				};
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
147*4882a593Smuzhiyun				regulator-always-on;
148*4882a593Smuzhiyun				regulator-boot-on;
149*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
150*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
151*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
152*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
153*4882a593Smuzhiyun				regulator-state-mem {
154*4882a593Smuzhiyun					regulator-off-in-suspend;
155*4882a593Smuzhiyun				};
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
159*4882a593Smuzhiyun				regulator-always-on;
160*4882a593Smuzhiyun				regulator-boot-on;
161*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
162*4882a593Smuzhiyun				regulator-state-mem {
163*4882a593Smuzhiyun					regulator-on-in-suspend;
164*4882a593Smuzhiyun				};
165*4882a593Smuzhiyun			};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
168*4882a593Smuzhiyun				regulator-always-on;
169*4882a593Smuzhiyun				regulator-boot-on;
170*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
171*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
172*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
173*4882a593Smuzhiyun				regulator-state-mem {
174*4882a593Smuzhiyun					regulator-on-in-suspend;
175*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
176*4882a593Smuzhiyun				};
177*4882a593Smuzhiyun			};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
180*4882a593Smuzhiyun				regulator-always-on;
181*4882a593Smuzhiyun				regulator-boot-on;
182*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
183*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
184*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
185*4882a593Smuzhiyun				regulator-state-mem {
186*4882a593Smuzhiyun					regulator-on-in-suspend;
187*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
188*4882a593Smuzhiyun				};
189*4882a593Smuzhiyun			};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun			vcc3v0_tp: LDO_REG2 {
192*4882a593Smuzhiyun				regulator-always-on;
193*4882a593Smuzhiyun				regulator-boot-on;
194*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
195*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
196*4882a593Smuzhiyun				regulator-name = "vcc3v0_tp";
197*4882a593Smuzhiyun				regulator-state-mem {
198*4882a593Smuzhiyun					regulator-off-in-suspend;
199*4882a593Smuzhiyun				};
200*4882a593Smuzhiyun			};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun			vcc1v8_pmu: LDO_REG3 {
203*4882a593Smuzhiyun				regulator-always-on;
204*4882a593Smuzhiyun				regulator-boot-on;
205*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
206*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
207*4882a593Smuzhiyun				regulator-name = "vcc1v8_pmu";
208*4882a593Smuzhiyun				regulator-state-mem {
209*4882a593Smuzhiyun					regulator-on-in-suspend;
210*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vcc_sd: LDO_REG4 {
215*4882a593Smuzhiyun				regulator-always-on;
216*4882a593Smuzhiyun				regulator-boot-on;
217*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
219*4882a593Smuzhiyun				regulator-name = "vcc_sd";
220*4882a593Smuzhiyun				regulator-state-mem {
221*4882a593Smuzhiyun					regulator-on-in-suspend;
222*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
223*4882a593Smuzhiyun				};
224*4882a593Smuzhiyun			};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
227*4882a593Smuzhiyun				regulator-always-on;
228*4882a593Smuzhiyun				regulator-boot-on;
229*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
230*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
231*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
232*4882a593Smuzhiyun				regulator-state-mem {
233*4882a593Smuzhiyun					regulator-on-in-suspend;
234*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
235*4882a593Smuzhiyun				};
236*4882a593Smuzhiyun			};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
239*4882a593Smuzhiyun				regulator-always-on;
240*4882a593Smuzhiyun				regulator-boot-on;
241*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
242*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
243*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
244*4882a593Smuzhiyun				regulator-state-mem {
245*4882a593Smuzhiyun					regulator-on-in-suspend;
246*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
247*4882a593Smuzhiyun				};
248*4882a593Smuzhiyun			};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun			vcca1v8_codec: LDO_REG7 {
251*4882a593Smuzhiyun				regulator-always-on;
252*4882a593Smuzhiyun				regulator-boot-on;
253*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
254*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
255*4882a593Smuzhiyun				regulator-name = "vcca1v8_codec";
256*4882a593Smuzhiyun				regulator-state-mem {
257*4882a593Smuzhiyun					regulator-on-in-suspend;
258*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
259*4882a593Smuzhiyun				};
260*4882a593Smuzhiyun			};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
263*4882a593Smuzhiyun				regulator-always-on;
264*4882a593Smuzhiyun				regulator-boot-on;
265*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
266*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
267*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
268*4882a593Smuzhiyun				regulator-state-mem {
269*4882a593Smuzhiyun					regulator-on-in-suspend;
270*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
271*4882a593Smuzhiyun				};
272*4882a593Smuzhiyun			};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun			vcc3v3_s3: SWITCH_REG1 {
275*4882a593Smuzhiyun				regulator-always-on;
276*4882a593Smuzhiyun				regulator-boot-on;
277*4882a593Smuzhiyun				regulator-name = "vcc3v3_s3";
278*4882a593Smuzhiyun				regulator-state-mem {
279*4882a593Smuzhiyun					regulator-on-in-suspend;
280*4882a593Smuzhiyun				};
281*4882a593Smuzhiyun			};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun			vcc3v3_s0: SWITCH_REG2 {
284*4882a593Smuzhiyun				regulator-always-on;
285*4882a593Smuzhiyun				regulator-boot-on;
286*4882a593Smuzhiyun				regulator-name = "vcc3v3_s0";
287*4882a593Smuzhiyun				regulator-state-mem {
288*4882a593Smuzhiyun					regulator-on-in-suspend;
289*4882a593Smuzhiyun				};
290*4882a593Smuzhiyun			};
291*4882a593Smuzhiyun		};
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&i2c4 {
296*4882a593Smuzhiyun	fusb1: fusb30x@22 {
297*4882a593Smuzhiyun		compatible = "fairchild,fusb302";
298*4882a593Smuzhiyun		reg = <0x22>;
299*4882a593Smuzhiyun		pinctrl-names = "default";
300*4882a593Smuzhiyun		pinctrl-0 = <&fusb1_int>;
301*4882a593Smuzhiyun		vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
302*4882a593Smuzhiyun		int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
303*4882a593Smuzhiyun	};
304*4882a593Smuzhiyun};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun&pwm2 {
307*4882a593Smuzhiyun	status = "okay";
308*4882a593Smuzhiyun};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun&pwm3 {
311*4882a593Smuzhiyun	status = "okay";
312*4882a593Smuzhiyun};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun&u2phy0_otg {
315*4882a593Smuzhiyun	rockchip,utmi-avalid;
316*4882a593Smuzhiyun};
317