xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "dt-bindings/pwm/pwm.h"
7*4882a593Smuzhiyun#include "rk3399.dtsi"
8*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
10*4882a593Smuzhiyun#include "rk3399-vop-clk-set.dtsi"
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	compatible = "rockchip,rk3399-evb-ind", "rockchip,rk3399";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	adc_keys {
18*4882a593Smuzhiyun		compatible = "adc-keys";
19*4882a593Smuzhiyun		io-channels = <&saradc 1>;
20*4882a593Smuzhiyun		io-channel-names = "buttons";
21*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
22*4882a593Smuzhiyun		poll-interval = <100>;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		vol-up-key {
25*4882a593Smuzhiyun			label = "volume up";
26*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
27*4882a593Smuzhiyun			press-threshold-microvolt = <1000>;
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		vol-down-key {
31*4882a593Smuzhiyun			label = "volume down";
32*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
33*4882a593Smuzhiyun			press-threshold-microvolt = <170000>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	backlight: backlight {
38*4882a593Smuzhiyun		status = "okay";
39*4882a593Smuzhiyun		compatible = "pwm-backlight";
40*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 0>;
41*4882a593Smuzhiyun		brightness-levels = <
42*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
43*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
44*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
45*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
46*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
47*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
48*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
49*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
50*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
51*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
52*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
53*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
54*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
55*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
56*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
57*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
58*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
59*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
60*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
61*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
62*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
63*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
64*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
65*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
66*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
67*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
68*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
69*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
70*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
71*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
72*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
73*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
74*4882a593Smuzhiyun		default-brightness-level = <200>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
78*4882a593Smuzhiyun		compatible = "fixed-clock";
79*4882a593Smuzhiyun		clock-frequency = <125000000>;
80*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
81*4882a593Smuzhiyun		#clock-cells = <0>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	dw_hdmi_audio: dw-hdmi-audio {
85*4882a593Smuzhiyun		status = "disabled";
86*4882a593Smuzhiyun		compatible = "rockchip,dw-hdmi-audio";
87*4882a593Smuzhiyun		#sound-dai-cells = <0>;
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun	rk809_sound: rk809-sound {
91*4882a593Smuzhiyun		compatible = "rockchip,multicodecs-card";
92*4882a593Smuzhiyun		rockchip,card-name = "rockchip-rk809";
93*4882a593Smuzhiyun		hp-det-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
94*4882a593Smuzhiyun		io-channels = <&saradc 2>;
95*4882a593Smuzhiyun		io-channel-names = "adc-detect";
96*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
97*4882a593Smuzhiyun		poll-interval = <100>;
98*4882a593Smuzhiyun		rockchip,format = "i2s";
99*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
100*4882a593Smuzhiyun		rockchip,cpu = <&i2s1>;
101*4882a593Smuzhiyun		rockchip,codec = <&rk809_codec>;
102*4882a593Smuzhiyun		pinctrl-names = "default";
103*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
104*4882a593Smuzhiyun		play-pause-key {
105*4882a593Smuzhiyun			label = "playpause";
106*4882a593Smuzhiyun			linux,code = <KEY_PLAYPAUSE>;
107*4882a593Smuzhiyun			press-threshold-microvolt = <2000>;
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	dp_sound: dp-sound {
112*4882a593Smuzhiyun		status = "disabled";
113*4882a593Smuzhiyun		compatible = "rockchip,cdndp-sound";
114*4882a593Smuzhiyun		rockchip,cpu = <&spdif>;
115*4882a593Smuzhiyun		rockchip,codec = <&cdn_dp 1>;
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	hdmi_sound: hdmi-sound {
119*4882a593Smuzhiyun		status = "disabled";
120*4882a593Smuzhiyun		compatible = "rockchip,hdmi";
121*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
122*4882a593Smuzhiyun		rockchip,card-name = "rockchip-hdmi0";
123*4882a593Smuzhiyun		rockchip,cpu = <&i2s2>;
124*4882a593Smuzhiyun		rockchip,codec = <&hdmi>;
125*4882a593Smuzhiyun		rockchip,jack-det;
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	rk_headset: rk-headset {
129*4882a593Smuzhiyun		status = "disabled";
130*4882a593Smuzhiyun		compatible = "rockchip_headset";
131*4882a593Smuzhiyun		headset_gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
132*4882a593Smuzhiyun		pinctrl-names = "default";
133*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
134*4882a593Smuzhiyun		io-channels = <&saradc 2>;
135*4882a593Smuzhiyun	};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun	spdif_sound: spdif-sound {
138*4882a593Smuzhiyun		status = "okay";
139*4882a593Smuzhiyun		compatible = "simple-audio-card";
140*4882a593Smuzhiyun		simple-audio-card,name = "ROCKCHIP,SPDIF";
141*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
142*4882a593Smuzhiyun		simple-audio-card,cpu {
143*4882a593Smuzhiyun			sound-dai = <&spdif>;
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun		simple-audio-card,codec {
146*4882a593Smuzhiyun			sound-dai = <&spdif_out>;
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	spdif_out: spdif-out {
151*4882a593Smuzhiyun		status = "okay";
152*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
153*4882a593Smuzhiyun		#sound-dai-cells = <0>;
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
157*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
158*4882a593Smuzhiyun		clocks = <&rk809 1>;
159*4882a593Smuzhiyun		clock-names = "ext_clock";
160*4882a593Smuzhiyun		pinctrl-names = "default";
161*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		/*
164*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
165*4882a593Smuzhiyun		 * on the actual card populated):
166*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
167*4882a593Smuzhiyun		 * - PDN (power down when low)
168*4882a593Smuzhiyun		 */
169*4882a593Smuzhiyun		reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun	wireless-wlan {
173*4882a593Smuzhiyun		compatible = "wlan-platdata";
174*4882a593Smuzhiyun		rockchip,grf = <&grf>;
175*4882a593Smuzhiyun		wifi_chip_type = "ap6354";
176*4882a593Smuzhiyun		sdio_vref = <1800>;
177*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
178*4882a593Smuzhiyun		WIFI,poweren_gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
179*4882a593Smuzhiyun		status = "okay";
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun	wireless-bluetooth {
183*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
184*4882a593Smuzhiyun		clocks = <&rk809 1>;
185*4882a593Smuzhiyun		clock-names = "ext_clock";
186*4882a593Smuzhiyun		//wifi-bt-power-toggle;
187*4882a593Smuzhiyun		uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
188*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
189*4882a593Smuzhiyun		pinctrl-0 = <&uart0_rts>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
190*4882a593Smuzhiyun		pinctrl-1 = <&uart0_gpios>;
191*4882a593Smuzhiyun		//BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
192*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
193*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
194*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* GPIO2_D3 */
195*4882a593Smuzhiyun		status = "okay";
196*4882a593Smuzhiyun	};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	rk_modem: rk-modem {
199*4882a593Smuzhiyun		compatible="4g-modem-platdata";
200*4882a593Smuzhiyun		pinctrl-names = "default";
201*4882a593Smuzhiyun		pinctrl-0 = <&lte_vbat &lte_power_en &lte_reset>;
202*4882a593Smuzhiyun		4G,vbat-gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
203*4882a593Smuzhiyun		4G,power-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
204*4882a593Smuzhiyun		4G,reset-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
205*4882a593Smuzhiyun		status = "okay";
206*4882a593Smuzhiyun	};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	tc358749x_sound:tc358749x-sound {
209*4882a593Smuzhiyun		status = "okay";
210*4882a593Smuzhiyun		compatible = "simple-audio-card";
211*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
212*4882a593Smuzhiyun		simple-audio-card,name = "rk,hdmiin-tc358749x-codec";
213*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&sound0_master>;
214*4882a593Smuzhiyun		simple-audio-card,frame-master = <&sound0_master>;
215*4882a593Smuzhiyun		simple-audio-card,cpu {
216*4882a593Smuzhiyun				sound-dai = <&i2s0>;
217*4882a593Smuzhiyun		};
218*4882a593Smuzhiyun		sound0_master: simple-audio-card,codec {
219*4882a593Smuzhiyun				sound-dai = <&tc358749x>;
220*4882a593Smuzhiyun		};
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
224*4882a593Smuzhiyun		compatible = "regulator-fixed";
225*4882a593Smuzhiyun		enable-active-high;
226*4882a593Smuzhiyun		gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
227*4882a593Smuzhiyun		pinctrl-names = "default";
228*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
229*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
230*4882a593Smuzhiyun		regulator-always-on;
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	vcc5v0_usbnet: vcc5v0-usbnet {
234*4882a593Smuzhiyun		compatible = "regulator-fixed";
235*4882a593Smuzhiyun		enable-active-high;
236*4882a593Smuzhiyun		/*disabled r8152 usb net default*/
237*4882a593Smuzhiyun		//regulator-always-on;
238*4882a593Smuzhiyun		//regulator-boot-on;
239*4882a593Smuzhiyun		gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
240*4882a593Smuzhiyun		pinctrl-names = "default";
241*4882a593Smuzhiyun		pinctrl-0 = <&usbnet_pwr_drv>;
242*4882a593Smuzhiyun		regulator-name = "vcc5v0_usbnet";
243*4882a593Smuzhiyun		startup-delay-us = <20000>;
244*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
245*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
246*4882a593Smuzhiyun		status = "okay";
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
250*4882a593Smuzhiyun		compatible = "regulator-fixed";
251*4882a593Smuzhiyun		enable-active-high;
252*4882a593Smuzhiyun		gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
253*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
254*4882a593Smuzhiyun		regulator-always-on;
255*4882a593Smuzhiyun		regulator-boot-on;
256*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
257*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun	vbus_typec: vbus-typec-regulator {
261*4882a593Smuzhiyun		compatible = "regulator-fixed";
262*4882a593Smuzhiyun		enable-active-high;
263*4882a593Smuzhiyun		gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
264*4882a593Smuzhiyun		pinctrl-names = "default";
265*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_typec0_en>;
266*4882a593Smuzhiyun		regulator-name = "vbus_typec";
267*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
268*4882a593Smuzhiyun	};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
271*4882a593Smuzhiyun		compatible = "regulator-fixed";
272*4882a593Smuzhiyun		regulator-name = "vcc_phy";
273*4882a593Smuzhiyun		regulator-always-on;
274*4882a593Smuzhiyun		regulator-boot-on;
275*4882a593Smuzhiyun	};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun	vdd_log: vdd-log {
278*4882a593Smuzhiyun		compatible = "regulator-fixed";
279*4882a593Smuzhiyun		regulator-name = "vdd_log";
280*4882a593Smuzhiyun		regulator-min-microvolt = <950000>;
281*4882a593Smuzhiyun		regulator-max-microvolt = <950000>;
282*4882a593Smuzhiyun		regulator-always-on;
283*4882a593Smuzhiyun		regulator-boot-on;
284*4882a593Smuzhiyun	};
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun&cpu_l0 {
288*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
289*4882a593Smuzhiyun};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun&cpu_l1 {
292*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&cpu_l2 {
296*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&cpu_l3 {
300*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&cpu_b0 {
304*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&cpu_b1 {
308*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
309*4882a593Smuzhiyun};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun&cdn_dp {
312*4882a593Smuzhiyun	status = "okay";
313*4882a593Smuzhiyun	phys = <&tcphy0_dp>;
314*4882a593Smuzhiyun};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun&dp_in_vopb {
317*4882a593Smuzhiyun	status = "disabled";
318*4882a593Smuzhiyun};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun&dfi {
321*4882a593Smuzhiyun	status = "okay";
322*4882a593Smuzhiyun};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun&dmc {
325*4882a593Smuzhiyun	status = "okay";
326*4882a593Smuzhiyun	center-supply = <&vdd_center>;
327*4882a593Smuzhiyun	upthreshold = <40>;
328*4882a593Smuzhiyun	downdifferential = <20>;
329*4882a593Smuzhiyun	system-status-freq = <
330*4882a593Smuzhiyun		/*system status         freq(KHz)*/
331*4882a593Smuzhiyun		SYS_STATUS_NORMAL       856000
332*4882a593Smuzhiyun		SYS_STATUS_REBOOT       856000
333*4882a593Smuzhiyun		SYS_STATUS_SUSPEND      328000
334*4882a593Smuzhiyun		SYS_STATUS_VIDEO_1080P  666000
335*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K     856000
336*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K_10B 856000
337*4882a593Smuzhiyun		SYS_STATUS_PERFORMANCE  856000
338*4882a593Smuzhiyun		SYS_STATUS_BOOST        856000
339*4882a593Smuzhiyun		SYS_STATUS_DUALVIEW     856000
340*4882a593Smuzhiyun		SYS_STATUS_ISP          856000
341*4882a593Smuzhiyun	>;
342*4882a593Smuzhiyun	vop-bw-dmc-freq = <
343*4882a593Smuzhiyun	/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
344*4882a593Smuzhiyun		0       762      416000
345*4882a593Smuzhiyun		763     3012     666000
346*4882a593Smuzhiyun		3013    99999    856000
347*4882a593Smuzhiyun	>;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun	vop-pn-msch-readlatency = <
350*4882a593Smuzhiyun		0	0x20
351*4882a593Smuzhiyun		4	0x20
352*4882a593Smuzhiyun	>;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun	auto-min-freq = <328000>;
355*4882a593Smuzhiyun	auto-freq-en = <0>;
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&dmc_opp_table {
359*4882a593Smuzhiyun		compatible = "operating-points-v2";
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun		opp-200000000 {
362*4882a593Smuzhiyun			opp-hz = /bits/ 64 <200000000>;
363*4882a593Smuzhiyun			opp-microvolt = <900000>;
364*4882a593Smuzhiyun			status = "disabled";
365*4882a593Smuzhiyun		};
366*4882a593Smuzhiyun		opp-300000000 {
367*4882a593Smuzhiyun			opp-hz = /bits/ 64 <300000000>;
368*4882a593Smuzhiyun			opp-microvolt = <900000>;
369*4882a593Smuzhiyun			status = "disabled";
370*4882a593Smuzhiyun		};
371*4882a593Smuzhiyun		opp-328000000 {
372*4882a593Smuzhiyun			opp-hz = /bits/ 64 <328000000>;
373*4882a593Smuzhiyun			opp-microvolt = <900000>;
374*4882a593Smuzhiyun		};
375*4882a593Smuzhiyun		opp-400000000 {
376*4882a593Smuzhiyun			opp-hz = /bits/ 64 <400000000>;
377*4882a593Smuzhiyun			opp-microvolt = <900000>;
378*4882a593Smuzhiyun			status = "disabled";
379*4882a593Smuzhiyun		};
380*4882a593Smuzhiyun		opp-416000000 {
381*4882a593Smuzhiyun			opp-hz = /bits/ 64 <416000000>;
382*4882a593Smuzhiyun			opp-microvolt = <900000>;
383*4882a593Smuzhiyun		};
384*4882a593Smuzhiyun		opp-528000000 {
385*4882a593Smuzhiyun			opp-hz = /bits/ 64 <528000000>;
386*4882a593Smuzhiyun			opp-microvolt = <900000>;
387*4882a593Smuzhiyun			status = "disabled";
388*4882a593Smuzhiyun		};
389*4882a593Smuzhiyun		opp-600000000 {
390*4882a593Smuzhiyun			opp-hz = /bits/ 64 <600000000>;
391*4882a593Smuzhiyun			opp-microvolt = <900000>;
392*4882a593Smuzhiyun			status = "disabled";
393*4882a593Smuzhiyun		};
394*4882a593Smuzhiyun		opp-666000000 {
395*4882a593Smuzhiyun			opp-hz = /bits/ 64 <666000000>;
396*4882a593Smuzhiyun			opp-microvolt = <900000>;
397*4882a593Smuzhiyun		};
398*4882a593Smuzhiyun		opp-800000000 {
399*4882a593Smuzhiyun			opp-hz = /bits/ 64 <800000000>;
400*4882a593Smuzhiyun			opp-microvolt = <900000>;
401*4882a593Smuzhiyun			status = "disabled";
402*4882a593Smuzhiyun		};
403*4882a593Smuzhiyun		opp-856000000 {
404*4882a593Smuzhiyun			opp-hz = /bits/ 64 <856000000>;
405*4882a593Smuzhiyun			opp-microvolt = <900000>;
406*4882a593Smuzhiyun		};
407*4882a593Smuzhiyun		opp-928000000 {
408*4882a593Smuzhiyun			opp-hz = /bits/ 64 <928000000>;
409*4882a593Smuzhiyun			opp-microvolt = <900000>;
410*4882a593Smuzhiyun			status = "disabled";
411*4882a593Smuzhiyun		};
412*4882a593Smuzhiyun};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun&emmc_phy {
415*4882a593Smuzhiyun	status = "okay";
416*4882a593Smuzhiyun};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun&gmac {
419*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
420*4882a593Smuzhiyun	phy-mode = "rgmii";
421*4882a593Smuzhiyun	clock_in_out = "input";
422*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
423*4882a593Smuzhiyun	snps,reset-active-low;
424*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 150000>;
425*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
426*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
427*4882a593Smuzhiyun	pinctrl-names = "default";
428*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
429*4882a593Smuzhiyun	tx_delay = <0x22>;
430*4882a593Smuzhiyun	rx_delay = <0x23>;
431*4882a593Smuzhiyun	status = "okay";
432*4882a593Smuzhiyun};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun&gpu {
435*4882a593Smuzhiyun	status = "okay";
436*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
437*4882a593Smuzhiyun};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun&hdmi {
440*4882a593Smuzhiyun	status = "okay";
441*4882a593Smuzhiyun};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun&i2c0 {
444*4882a593Smuzhiyun	status = "okay";
445*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
446*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
447*4882a593Smuzhiyun	clock-frequency = <400000>;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun	vdd_cpu_b: tcs4525@1c {
450*4882a593Smuzhiyun		compatible = "tcs,tcs4525";
451*4882a593Smuzhiyun		reg = <0x1c>;
452*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
453*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
454*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_gpio>;
455*4882a593Smuzhiyun		vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
456*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
457*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
458*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
459*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
460*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
461*4882a593Smuzhiyun		regulator-always-on;
462*4882a593Smuzhiyun		regulator-boot-on;
463*4882a593Smuzhiyun		regulator-initial-state = <3>;
464*4882a593Smuzhiyun		regulator-state-mem {
465*4882a593Smuzhiyun			regulator-off-in-suspend;
466*4882a593Smuzhiyun		};
467*4882a593Smuzhiyun	};
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	vdd_gpu: tcs4526@10 {
470*4882a593Smuzhiyun		compatible = "tcs,tcs4526";
471*4882a593Smuzhiyun		reg = <0x10>;
472*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
473*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
474*4882a593Smuzhiyun		pinctrl-0 = <&vsel2_gpio>;
475*4882a593Smuzhiyun		vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
476*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
477*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
478*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
479*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
480*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
481*4882a593Smuzhiyun		regulator-always-on;
482*4882a593Smuzhiyun		regulator-boot-on;
483*4882a593Smuzhiyun		regulator-initial-state = <3>;
484*4882a593Smuzhiyun			regulator-state-mem {
485*4882a593Smuzhiyun			regulator-off-in-suspend;
486*4882a593Smuzhiyun		};
487*4882a593Smuzhiyun	};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun	rk809: pmic@20 {
490*4882a593Smuzhiyun		compatible = "rockchip,rk809";
491*4882a593Smuzhiyun		reg = <0x20>;
492*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
493*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
494*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-sleep",
495*4882a593Smuzhiyun						"pmic-power-off", "pmic-reset";
496*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
497*4882a593Smuzhiyun		pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>;
498*4882a593Smuzhiyun		pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>;
499*4882a593Smuzhiyun		pinctrl-3 = <&soc_slppin_gpio>,<&rk809_slppin_null>;
500*4882a593Smuzhiyun		rockchip,system-power-controller;
501*4882a593Smuzhiyun		#clock-cells = <1>;
502*4882a593Smuzhiyun		pmic-reset-func = <0>;
503*4882a593Smuzhiyun		wakeup-source;
504*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
507*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
508*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
509*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
510*4882a593Smuzhiyun		vcc5-supply = <&vcc_buck5>;
511*4882a593Smuzhiyun		vcc6-supply = <&vcc_buck5>;
512*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
513*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
514*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun		pwrkey {
517*4882a593Smuzhiyun				status = "okay";
518*4882a593Smuzhiyun		};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun		rtc {
521*4882a593Smuzhiyun				status = "okay";
522*4882a593Smuzhiyun		};
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun		pinctrl_rk8xx: pinctrl_rk8xx {
525*4882a593Smuzhiyun				gpio-controller;
526*4882a593Smuzhiyun				#gpio-cells = <2>;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun				rk809_slppin_null: rk809_slppin_null {
529*4882a593Smuzhiyun								pins = "gpio_slp";
530*4882a593Smuzhiyun								function = "pin_fun0";
531*4882a593Smuzhiyun				};
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun				rk809_slppin_slp: rk809_slppin_slp {
534*4882a593Smuzhiyun								pins = "gpio_slp";
535*4882a593Smuzhiyun								function = "pin_fun1";
536*4882a593Smuzhiyun				};
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun				rk809_slppin_pwrdn: rk809_slppin_pwrdn {
539*4882a593Smuzhiyun								pins = "gpio_slp";
540*4882a593Smuzhiyun								function = "pin_fun2";
541*4882a593Smuzhiyun				};
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun				rk809_slppin_rst: rk809_slppin_rst {
544*4882a593Smuzhiyun								pins = "gpio_slp";
545*4882a593Smuzhiyun								function = "pin_fun3";
546*4882a593Smuzhiyun				};
547*4882a593Smuzhiyun		};
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun		regulators {
550*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
551*4882a593Smuzhiyun				regulator-always-on;
552*4882a593Smuzhiyun				regulator-boot-on;
553*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
554*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
555*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
556*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
557*4882a593Smuzhiyun				regulator-name = "vdd_center";
558*4882a593Smuzhiyun				regulator-state-mem {
559*4882a593Smuzhiyun					regulator-off-in-suspend;
560*4882a593Smuzhiyun				};
561*4882a593Smuzhiyun			};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
564*4882a593Smuzhiyun				regulator-always-on;
565*4882a593Smuzhiyun				regulator-boot-on;
566*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
567*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
568*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
569*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
570*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
571*4882a593Smuzhiyun				regulator-state-mem {
572*4882a593Smuzhiyun					regulator-off-in-suspend;
573*4882a593Smuzhiyun				};
574*4882a593Smuzhiyun			};
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
577*4882a593Smuzhiyun				regulator-always-on;
578*4882a593Smuzhiyun				regulator-boot-on;
579*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
580*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
581*4882a593Smuzhiyun				regulator-state-mem {
582*4882a593Smuzhiyun					regulator-on-in-suspend;
583*4882a593Smuzhiyun				};
584*4882a593Smuzhiyun			};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun			vcc3v3_sys: DCDC_REG4 {
587*4882a593Smuzhiyun				regulator-always-on;
588*4882a593Smuzhiyun				regulator-boot-on;
589*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
590*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
591*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
592*4882a593Smuzhiyun				regulator-name = "vcc3v3_sys";
593*4882a593Smuzhiyun				regulator-state-mem {
594*4882a593Smuzhiyun					regulator-on-in-suspend;
595*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
596*4882a593Smuzhiyun				};
597*4882a593Smuzhiyun			};
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun			vcc_buck5: DCDC_REG5 {
600*4882a593Smuzhiyun				regulator-always-on;
601*4882a593Smuzhiyun				regulator-boot-on;
602*4882a593Smuzhiyun				regulator-min-microvolt = <2200000>;
603*4882a593Smuzhiyun				regulator-max-microvolt = <2200000>;
604*4882a593Smuzhiyun				regulator-name = "vcc_buck5";
605*4882a593Smuzhiyun				regulator-state-mem {
606*4882a593Smuzhiyun					regulator-on-in-suspend;
607*4882a593Smuzhiyun					regulator-suspend-microvolt = <2200000>;
608*4882a593Smuzhiyun				};
609*4882a593Smuzhiyun			};
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun			vcca_0v9: LDO_REG1 {
612*4882a593Smuzhiyun				regulator-always-on;
613*4882a593Smuzhiyun				regulator-boot-on;
614*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
615*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
616*4882a593Smuzhiyun				regulator-name = "vcca_0v9";
617*4882a593Smuzhiyun				regulator-state-mem {
618*4882a593Smuzhiyun					regulator-off-in-suspend;
619*4882a593Smuzhiyun				};
620*4882a593Smuzhiyun			};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun			vcc_1v8: LDO_REG2 {
623*4882a593Smuzhiyun				regulator-always-on;
624*4882a593Smuzhiyun				regulator-boot-on;
625*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
626*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
629*4882a593Smuzhiyun				regulator-state-mem {
630*4882a593Smuzhiyun					regulator-on-in-suspend;
631*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
632*4882a593Smuzhiyun				};
633*4882a593Smuzhiyun			};
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun			vcc0v9_soc: LDO_REG3 {
636*4882a593Smuzhiyun				regulator-always-on;
637*4882a593Smuzhiyun				regulator-boot-on;
638*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
639*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun				regulator-name = "vcc0v9_soc";
642*4882a593Smuzhiyun				regulator-state-mem {
643*4882a593Smuzhiyun					regulator-on-in-suspend;
644*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
645*4882a593Smuzhiyun				};
646*4882a593Smuzhiyun			};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun			vcca_1v8: LDO_REG4 {
649*4882a593Smuzhiyun				regulator-always-on;
650*4882a593Smuzhiyun				regulator-boot-on;
651*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
652*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
655*4882a593Smuzhiyun				regulator-state-mem {
656*4882a593Smuzhiyun					regulator-off-in-suspend;
657*4882a593Smuzhiyun				};
658*4882a593Smuzhiyun			};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun			vdd1v5_dvp: LDO_REG5 {
661*4882a593Smuzhiyun				regulator-always-on;
662*4882a593Smuzhiyun				regulator-boot-on;
663*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
664*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun				regulator-name = "vdd1v5_dvp";
667*4882a593Smuzhiyun				regulator-state-mem {
668*4882a593Smuzhiyun					regulator-off-in-suspend;
669*4882a593Smuzhiyun				};
670*4882a593Smuzhiyun			};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
673*4882a593Smuzhiyun				regulator-always-on;
674*4882a593Smuzhiyun				regulator-boot-on;
675*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
676*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
679*4882a593Smuzhiyun				regulator-state-mem {
680*4882a593Smuzhiyun					regulator-off-in-suspend;
681*4882a593Smuzhiyun				};
682*4882a593Smuzhiyun			};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun			vcc_3v0: LDO_REG7 {
685*4882a593Smuzhiyun				regulator-always-on;
686*4882a593Smuzhiyun				regulator-boot-on;
687*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
688*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
691*4882a593Smuzhiyun				regulator-state-mem {
692*4882a593Smuzhiyun					regulator-off-in-suspend;
693*4882a593Smuzhiyun				};
694*4882a593Smuzhiyun			};
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun			vccio_sd: LDO_REG8 {
697*4882a593Smuzhiyun				regulator-always-on;
698*4882a593Smuzhiyun				regulator-boot-on;
699*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
700*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun				regulator-name = "vccio_sd";
703*4882a593Smuzhiyun				regulator-state-mem {
704*4882a593Smuzhiyun					regulator-off-in-suspend;
705*4882a593Smuzhiyun				};
706*4882a593Smuzhiyun			};
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun			vcc_sd: LDO_REG9 {
709*4882a593Smuzhiyun				regulator-always-on;
710*4882a593Smuzhiyun				regulator-boot-on;
711*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
712*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun				regulator-name = "vcc_sd";
715*4882a593Smuzhiyun				regulator-state-mem {
716*4882a593Smuzhiyun					regulator-off-in-suspend;
717*4882a593Smuzhiyun				};
718*4882a593Smuzhiyun			};
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun			vcc5v0_usb: SWITCH_REG1 {
721*4882a593Smuzhiyun				regulator-always-on;
722*4882a593Smuzhiyun				regulator-boot-on;
723*4882a593Smuzhiyun				regulator-name = "vcc5v0_usb";
724*4882a593Smuzhiyun				regulator-state-mem {
725*4882a593Smuzhiyun					regulator-on-in-suspend;
726*4882a593Smuzhiyun				};
727*4882a593Smuzhiyun			};
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun			vccio_3v3: SWITCH_REG2 {
730*4882a593Smuzhiyun				regulator-always-on;
731*4882a593Smuzhiyun				regulator-boot-on;
732*4882a593Smuzhiyun				regulator-name = "vccio_3v3";
733*4882a593Smuzhiyun				regulator-state-mem {
734*4882a593Smuzhiyun					regulator-off-in-suspend;
735*4882a593Smuzhiyun				};
736*4882a593Smuzhiyun			};
737*4882a593Smuzhiyun		};
738*4882a593Smuzhiyun		/*
739*4882a593Smuzhiyun		battery {
740*4882a593Smuzhiyun			compatible = "rk817,battery";
741*4882a593Smuzhiyun			ocv_table = <7000 7250 7370 7384 7436 7470 7496
742*4882a593Smuzhiyun						7520 7548 7576 7604 7632 7668 7706
743*4882a593Smuzhiyun						7754 7816 7892 7950 8036 8142 8212>;
744*4882a593Smuzhiyun			design_capacity = <2500>;
745*4882a593Smuzhiyun			design_qmax = <2750>;
746*4882a593Smuzhiyun			bat_res = <100>;
747*4882a593Smuzhiyun			sleep_enter_current = <300>;
748*4882a593Smuzhiyun			sleep_exit_current = <300>;
749*4882a593Smuzhiyun			sleep_filter_current = <100>;
750*4882a593Smuzhiyun			power_off_thresd = <7000>;
751*4882a593Smuzhiyun			zero_algorithm_vol = <7700>;
752*4882a593Smuzhiyun			max_soc_offset = <60>;
753*4882a593Smuzhiyun			monitor_sec = <5>;
754*4882a593Smuzhiyun			sample_res = <10>;
755*4882a593Smuzhiyun			virtual_power = <0>;
756*4882a593Smuzhiyun			bat_res_up = <140>;
757*4882a593Smuzhiyun			bat_res_down = <20>;
758*4882a593Smuzhiyun		};
759*4882a593Smuzhiyun		*/
760*4882a593Smuzhiyun		rk809_codec: codec {
761*4882a593Smuzhiyun			#sound-dai-cells = <0>;
762*4882a593Smuzhiyun			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
763*4882a593Smuzhiyun			clocks = <&cru SCLK_I2S_8CH_OUT>;
764*4882a593Smuzhiyun			clock-names = "mclk";
765*4882a593Smuzhiyun			pinctrl-names = "default";
766*4882a593Smuzhiyun			pinctrl-0 = <&i2s_8ch_mclk>;
767*4882a593Smuzhiyun			assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
768*4882a593Smuzhiyun			assigned-clock-parents = <&cru SCLK_I2S1_8CH>;
769*4882a593Smuzhiyun			hp-volume = <20>;
770*4882a593Smuzhiyun			spk-volume = <3>;
771*4882a593Smuzhiyun			status = "okay";
772*4882a593Smuzhiyun		};
773*4882a593Smuzhiyun	};
774*4882a593Smuzhiyun};
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun&i2c1 {
777*4882a593Smuzhiyun	status = "okay";
778*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
779*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
780*4882a593Smuzhiyun	clock-frequency = <400000>;
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun	gsl3673: gsl3673@40 {
783*4882a593Smuzhiyun		compatible = "GSL,GSL3673";
784*4882a593Smuzhiyun		reg = <0x40>;
785*4882a593Smuzhiyun		screen_max_x = <1536>;
786*4882a593Smuzhiyun		screen_max_y = <2048>;
787*4882a593Smuzhiyun		irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
788*4882a593Smuzhiyun		rst_gpio_number = <&gpio1 1 GPIO_ACTIVE_HIGH>;
789*4882a593Smuzhiyun	};
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun	tc358749x: tc358749x@0f {
792*4882a593Smuzhiyun		#sound-dai-cells = <0>;
793*4882a593Smuzhiyun		compatible = "toshiba,tc358749x";
794*4882a593Smuzhiyun		reg = <0x0f>;
795*4882a593Smuzhiyun		power-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
796*4882a593Smuzhiyun		stanby-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
797*4882a593Smuzhiyun		reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
798*4882a593Smuzhiyun		int-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
799*4882a593Smuzhiyun		pinctrl-names = "default";
800*4882a593Smuzhiyun		pinctrl-0 = <&hdmiin_gpios>;
801*4882a593Smuzhiyun		status = "okay";
802*4882a593Smuzhiyun	};
803*4882a593Smuzhiyun};
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun&i2c4 {
806*4882a593Smuzhiyun	status = "okay";
807*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <475>;
808*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <26>;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun	mpu6500@68 {
811*4882a593Smuzhiyun		status = "disabled";
812*4882a593Smuzhiyun		compatible = "invensense,mpu6500";
813*4882a593Smuzhiyun		reg = <0x68>;
814*4882a593Smuzhiyun		irq-gpio = <&gpio1 22 IRQ_TYPE_EDGE_RISING>;
815*4882a593Smuzhiyun		pinctrl-names = "default";
816*4882a593Smuzhiyun		pinctrl-0 = <&mpu6500_irq_gpio>;
817*4882a593Smuzhiyun		mpu-int_config = <0x10>;
818*4882a593Smuzhiyun		mpu-level_shifter = <0>;
819*4882a593Smuzhiyun		mpu-orientation = <0 1 0 1 0 0 0 0 1>;
820*4882a593Smuzhiyun		orientation-x= <0>;
821*4882a593Smuzhiyun		orientation-y= <0>;
822*4882a593Smuzhiyun		orientation-z= <0>;
823*4882a593Smuzhiyun		mpu-debug = <1>;
824*4882a593Smuzhiyun	};
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun	mpu6500_acc: mpu_acc@68 {
827*4882a593Smuzhiyun		compatible = "mpu6500_acc";
828*4882a593Smuzhiyun		reg = <0x68>;
829*4882a593Smuzhiyun		irq-gpio = <&gpio1 22 IRQ_TYPE_EDGE_RISING>;
830*4882a593Smuzhiyun		irq_enable = <0>;
831*4882a593Smuzhiyun		poll_delay_ms = <30>;
832*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
833*4882a593Smuzhiyun		layout = <8>;
834*4882a593Smuzhiyun	};
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun	mpu6500_gyro: mpu_gyro@68 {
837*4882a593Smuzhiyun		compatible = "mpu6500_gyro";
838*4882a593Smuzhiyun		reg = <0x68>;
839*4882a593Smuzhiyun		irq_enable = <0>;
840*4882a593Smuzhiyun		poll_delay_ms = <30>;
841*4882a593Smuzhiyun		type = <SENSOR_TYPE_GYROSCOPE>;
842*4882a593Smuzhiyun		layout = <8>;
843*4882a593Smuzhiyun	};
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun	usbc0: fusb302@22 {
846*4882a593Smuzhiyun		compatible = "fcs,fusb302";
847*4882a593Smuzhiyun		reg = <0x22>;
848*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
849*4882a593Smuzhiyun		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
850*4882a593Smuzhiyun		pinctrl-names = "default";
851*4882a593Smuzhiyun		pinctrl-0 = <&usbc0_int>;
852*4882a593Smuzhiyun		vbus-supply = <&vbus_typec>;
853*4882a593Smuzhiyun		status = "okay";
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun		ports {
856*4882a593Smuzhiyun			#address-cells = <1>;
857*4882a593Smuzhiyun			#size-cells = <0>;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun			port@0 {
860*4882a593Smuzhiyun				reg = <0>;
861*4882a593Smuzhiyun				usbc0_role_sw: endpoint@0 {
862*4882a593Smuzhiyun					remote-endpoint = <&dwc3_0_role_switch>;
863*4882a593Smuzhiyun				};
864*4882a593Smuzhiyun			};
865*4882a593Smuzhiyun		};
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun		usb_con: connector {
868*4882a593Smuzhiyun			compatible = "usb-c-connector";
869*4882a593Smuzhiyun			label = "USB-C";
870*4882a593Smuzhiyun			data-role = "dual";
871*4882a593Smuzhiyun			power-role = "dual";
872*4882a593Smuzhiyun			try-power-role = "sink";
873*4882a593Smuzhiyun			op-sink-microwatt = <1000000>;
874*4882a593Smuzhiyun			sink-pdos =
875*4882a593Smuzhiyun				<PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
876*4882a593Smuzhiyun			source-pdos =
877*4882a593Smuzhiyun				<PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun			displayport = <&cdn_dp>;
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun			altmodes {
882*4882a593Smuzhiyun				#address-cells = <1>;
883*4882a593Smuzhiyun				#size-cells = <0>;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun				altmode@0 {
886*4882a593Smuzhiyun					reg = <0>;
887*4882a593Smuzhiyun					svid = <0xff01>;
888*4882a593Smuzhiyun					vdo = <0xffffffff>;
889*4882a593Smuzhiyun				};
890*4882a593Smuzhiyun			};
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun			ports {
893*4882a593Smuzhiyun				#address-cells = <1>;
894*4882a593Smuzhiyun				#size-cells = <0>;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun				port@0 {
897*4882a593Smuzhiyun					reg = <0>;
898*4882a593Smuzhiyun					usbc0_orien_sw: endpoint {
899*4882a593Smuzhiyun						remote-endpoint = <&tcphy0_orientation_switch>;
900*4882a593Smuzhiyun					};
901*4882a593Smuzhiyun				};
902*4882a593Smuzhiyun				port@1 {
903*4882a593Smuzhiyun					reg = <1>;
904*4882a593Smuzhiyun					dp_mode_sw: endpoint {
905*4882a593Smuzhiyun						remote-endpoint = <&tcphy_dp_altmode_switch>;
906*4882a593Smuzhiyun					};
907*4882a593Smuzhiyun				};
908*4882a593Smuzhiyun			};
909*4882a593Smuzhiyun		};
910*4882a593Smuzhiyun	};
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun	sensor@0d {
913*4882a593Smuzhiyun		status = "okay";
914*4882a593Smuzhiyun		compatible = "ak8963";
915*4882a593Smuzhiyun		pinctrl-names = "default";
916*4882a593Smuzhiyun		pinctrl-0 = <&ak8963_irq_gpio>;
917*4882a593Smuzhiyun		reg = <0x0d>;
918*4882a593Smuzhiyun		type = <SENSOR_TYPE_COMPASS>;
919*4882a593Smuzhiyun		irq-gpio = <&gpio1 0 IRQ_TYPE_EDGE_RISING>;
920*4882a593Smuzhiyun		irq_enable = <0>;
921*4882a593Smuzhiyun		poll_delay_ms = <30>;
922*4882a593Smuzhiyun		layout = <6>;
923*4882a593Smuzhiyun	};
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun	bq25700: bq25700@6b {//6a
926*4882a593Smuzhiyun		compatible = "ti,bq25703";
927*4882a593Smuzhiyun		reg = <0x6b>;
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
930*4882a593Smuzhiyun		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
931*4882a593Smuzhiyun		pinctrl-names = "default";
932*4882a593Smuzhiyun		pinctrl-0 = <&charger_ok>;
933*4882a593Smuzhiyun		ti,charge-current = <2500000>;
934*4882a593Smuzhiyun		ti,max-input-voltage = <20000000>;
935*4882a593Smuzhiyun		ti,max-input-current = <6000000>;
936*4882a593Smuzhiyun		ti,max-charge-voltage = <8750000>;
937*4882a593Smuzhiyun		ti,input-current = <500000>;
938*4882a593Smuzhiyun		ti,input-current-sdp = <500000>;
939*4882a593Smuzhiyun		ti,input-current-dcp = <2000000>;
940*4882a593Smuzhiyun		ti,input-current-cdp = <2000000>;
941*4882a593Smuzhiyun		ti,minimum-sys-voltage = <7400000>;
942*4882a593Smuzhiyun		ti,otg-voltage = <5000000>;
943*4882a593Smuzhiyun		ti,otg-current = <500000>;
944*4882a593Smuzhiyun		pd-charge-only = <0>;
945*4882a593Smuzhiyun		status = "disabled";
946*4882a593Smuzhiyun	};
947*4882a593Smuzhiyun};
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun&i2c6 {
950*4882a593Smuzhiyun	cw2015@62 {
951*4882a593Smuzhiyun		status = "disabled";
952*4882a593Smuzhiyun		compatible = "cw201x";
953*4882a593Smuzhiyun		reg = <0x62>;
954*4882a593Smuzhiyun		bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48
955*4882a593Smuzhiyun				   0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24
956*4882a593Smuzhiyun				   0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
957*4882a593Smuzhiyun				   0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E
958*4882a593Smuzhiyun				   0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D
959*4882a593Smuzhiyun				   0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52
960*4882a593Smuzhiyun				   0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB
961*4882a593Smuzhiyun				   0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
962*4882a593Smuzhiyun		monitor_sec = <5>;
963*4882a593Smuzhiyun		virtual_power = <0>;
964*4882a593Smuzhiyun	};
965*4882a593Smuzhiyun};
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun&i2s0 {
968*4882a593Smuzhiyun	status = "disabled";
969*4882a593Smuzhiyun	rockchip,i2s-broken-burst-len;
970*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
971*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
972*4882a593Smuzhiyun	#sound-dai-cells = <0>;
973*4882a593Smuzhiyun};
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun&i2s1 {
976*4882a593Smuzhiyun	#sound-dai-cells = <0>;
977*4882a593Smuzhiyun	status = "disabled";
978*4882a593Smuzhiyun};
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun&i2s2 {
981*4882a593Smuzhiyun	#sound-dai-cells = <0>;
982*4882a593Smuzhiyun	dmas = <&dmac_bus 4>;
983*4882a593Smuzhiyun	dma-names = "tx";
984*4882a593Smuzhiyun	status = "disabled";
985*4882a593Smuzhiyun};
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun&io_domains {
988*4882a593Smuzhiyun	status = "okay";
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun	bt656-supply = <&vcc_3v0>;		/* bt656_gpio2ab_ms */
991*4882a593Smuzhiyun	audio-supply = <&vcca_1v8>;	/* audio_gpio3d4a_ms */
992*4882a593Smuzhiyun	sdmmc-supply = <&vccio_sd>;		/* sdmmc_gpio4b_ms */
993*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;		/* gpio1833_gpio4cd_ms */
994*4882a593Smuzhiyun};
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun&isp0_mmu {
997*4882a593Smuzhiyun	status = "okay";
998*4882a593Smuzhiyun};
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun&isp1_mmu {
1001*4882a593Smuzhiyun	status = "okay";
1002*4882a593Smuzhiyun};
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun&pmu_io_domains {
1005*4882a593Smuzhiyun	status = "okay";
1006*4882a593Smuzhiyun	pmu1830-supply = <&vcc_1v8>;
1007*4882a593Smuzhiyun};
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun&pcie_phy {
1010*4882a593Smuzhiyun	status = "okay";
1011*4882a593Smuzhiyun};
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun&pcie0 {
1014*4882a593Smuzhiyun	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
1015*4882a593Smuzhiyun	num-lanes = <4>;
1016*4882a593Smuzhiyun	pinctrl-names = "default";
1017*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
1018*4882a593Smuzhiyun	status = "okay";
1019*4882a593Smuzhiyun};
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun&pwm0 {
1022*4882a593Smuzhiyun	status = "disabled";
1023*4882a593Smuzhiyun};
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun&pwm2 {
1026*4882a593Smuzhiyun	status = "okay";
1027*4882a593Smuzhiyun	pinctrl-names = "active";
1028*4882a593Smuzhiyun	pinctrl-0 = <&pwm2_pin_pull_down>;
1029*4882a593Smuzhiyun};
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun&pwm3 {
1032*4882a593Smuzhiyun	status = "okay";
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun	interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1035*4882a593Smuzhiyun	compatible = "rockchip,remotectl-pwm";
1036*4882a593Smuzhiyun	remote_pwm_id = <3>;
1037*4882a593Smuzhiyun	handle_cpu_id = <1>;
1038*4882a593Smuzhiyun	remote_support_psci = <4>;
1039*4882a593Smuzhiyun	pinctrl-names = "default";
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun	ir_key1 {
1042*4882a593Smuzhiyun		rockchip,usercode = <0x4040>;
1043*4882a593Smuzhiyun		rockchip,key_table =
1044*4882a593Smuzhiyun			<0xf2	KEY_REPLY>,
1045*4882a593Smuzhiyun			<0xba	KEY_BACK>,
1046*4882a593Smuzhiyun			<0xf4	KEY_UP>,
1047*4882a593Smuzhiyun			<0xf1	KEY_DOWN>,
1048*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
1049*4882a593Smuzhiyun			<0xee	KEY_RIGHT>,
1050*4882a593Smuzhiyun			<0xbd	KEY_HOME>,
1051*4882a593Smuzhiyun			<0xea	KEY_VOLUMEUP>,
1052*4882a593Smuzhiyun			<0xe3	KEY_VOLUMEDOWN>,
1053*4882a593Smuzhiyun			<0xe2	KEY_SEARCH>,
1054*4882a593Smuzhiyun			<0xb2	KEY_POWER>,
1055*4882a593Smuzhiyun			<0xbc	KEY_MUTE>,
1056*4882a593Smuzhiyun			<0xec	KEY_MENU>,
1057*4882a593Smuzhiyun			<0xbf	0x190>,
1058*4882a593Smuzhiyun			<0xe0	0x191>,
1059*4882a593Smuzhiyun			<0xe1	0x192>,
1060*4882a593Smuzhiyun			<0xe9	183>,
1061*4882a593Smuzhiyun			<0xe6	248>,
1062*4882a593Smuzhiyun			<0xe8	185>,
1063*4882a593Smuzhiyun			<0xe7	186>,
1064*4882a593Smuzhiyun			<0xf0	388>,
1065*4882a593Smuzhiyun			<0xbe	0x175>;
1066*4882a593Smuzhiyun	};
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun	ir_key2 {
1069*4882a593Smuzhiyun		rockchip,usercode = <0xff00>;
1070*4882a593Smuzhiyun		rockchip,key_table =
1071*4882a593Smuzhiyun			<0xf9	KEY_HOME>,
1072*4882a593Smuzhiyun			<0xbf	KEY_BACK>,
1073*4882a593Smuzhiyun			<0xfb	KEY_MENU>,
1074*4882a593Smuzhiyun			<0xaa	KEY_REPLY>,
1075*4882a593Smuzhiyun			<0xb9	KEY_UP>,
1076*4882a593Smuzhiyun			<0xe9	KEY_DOWN>,
1077*4882a593Smuzhiyun			<0xb8	KEY_LEFT>,
1078*4882a593Smuzhiyun			<0xea	KEY_RIGHT>,
1079*4882a593Smuzhiyun			<0xeb	KEY_VOLUMEDOWN>,
1080*4882a593Smuzhiyun			<0xef	KEY_VOLUMEUP>,
1081*4882a593Smuzhiyun			<0xf7	KEY_MUTE>,
1082*4882a593Smuzhiyun			<0xe7	KEY_POWER>,
1083*4882a593Smuzhiyun			<0xfc	KEY_POWER>,
1084*4882a593Smuzhiyun			<0xa9	KEY_VOLUMEDOWN>,
1085*4882a593Smuzhiyun			<0xa8	KEY_VOLUMEDOWN>,
1086*4882a593Smuzhiyun			<0xe0	KEY_VOLUMEDOWN>,
1087*4882a593Smuzhiyun			<0xa5	KEY_VOLUMEDOWN>,
1088*4882a593Smuzhiyun			<0xab	183>,
1089*4882a593Smuzhiyun			<0xb7	388>,
1090*4882a593Smuzhiyun			<0xe8	388>,
1091*4882a593Smuzhiyun			<0xf8	184>,
1092*4882a593Smuzhiyun			<0xaf	185>,
1093*4882a593Smuzhiyun			<0xed	KEY_VOLUMEDOWN>,
1094*4882a593Smuzhiyun			<0xee	186>,
1095*4882a593Smuzhiyun			<0xb3	KEY_VOLUMEDOWN>,
1096*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEDOWN>,
1097*4882a593Smuzhiyun			<0xf2	KEY_VOLUMEDOWN>,
1098*4882a593Smuzhiyun			<0xf3	KEY_SEARCH>,
1099*4882a593Smuzhiyun			<0xb4	KEY_VOLUMEDOWN>,
1100*4882a593Smuzhiyun			<0xbe	KEY_SEARCH>;
1101*4882a593Smuzhiyun	};
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun	ir_key3 {
1104*4882a593Smuzhiyun		rockchip,usercode = <0x1dcc>;
1105*4882a593Smuzhiyun		rockchip,key_table =
1106*4882a593Smuzhiyun			<0xee	KEY_REPLY>,
1107*4882a593Smuzhiyun			<0xf0	KEY_BACK>,
1108*4882a593Smuzhiyun			<0xf8	KEY_UP>,
1109*4882a593Smuzhiyun			<0xbb	KEY_DOWN>,
1110*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
1111*4882a593Smuzhiyun			<0xed	KEY_RIGHT>,
1112*4882a593Smuzhiyun			<0xfc	KEY_HOME>,
1113*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEUP>,
1114*4882a593Smuzhiyun			<0xfd	KEY_VOLUMEDOWN>,
1115*4882a593Smuzhiyun			<0xb7	KEY_SEARCH>,
1116*4882a593Smuzhiyun			<0xff	KEY_POWER>,
1117*4882a593Smuzhiyun			<0xf3	KEY_MUTE>,
1118*4882a593Smuzhiyun			<0xbf	KEY_MENU>,
1119*4882a593Smuzhiyun			<0xf9	0x191>,
1120*4882a593Smuzhiyun			<0xf5	0x192>,
1121*4882a593Smuzhiyun			<0xb3	388>,
1122*4882a593Smuzhiyun			<0xbe	KEY_1>,
1123*4882a593Smuzhiyun			<0xba	KEY_2>,
1124*4882a593Smuzhiyun			<0xb2	KEY_3>,
1125*4882a593Smuzhiyun			<0xbd	KEY_4>,
1126*4882a593Smuzhiyun			<0xf9	KEY_5>,
1127*4882a593Smuzhiyun			<0xb1	KEY_6>,
1128*4882a593Smuzhiyun			<0xfc	KEY_7>,
1129*4882a593Smuzhiyun			<0xf8	KEY_8>,
1130*4882a593Smuzhiyun			<0xb0	KEY_9>,
1131*4882a593Smuzhiyun			<0xb6	KEY_0>,
1132*4882a593Smuzhiyun			<0xb5	KEY_BACKSPACE>;
1133*4882a593Smuzhiyun	};
1134*4882a593Smuzhiyun};
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun&rockchip_suspend {
1137*4882a593Smuzhiyun	status = "okay";
1138*4882a593Smuzhiyun	rockchip,sleep-debug-en = <1>;
1139*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
1140*4882a593Smuzhiyun		(0
1141*4882a593Smuzhiyun		| RKPM_SLP_ARMPD
1142*4882a593Smuzhiyun		| RKPM_SLP_PERILPPD
1143*4882a593Smuzhiyun		| RKPM_SLP_DDR_RET
1144*4882a593Smuzhiyun		| RKPM_SLP_PLLPD
1145*4882a593Smuzhiyun		| RKPM_SLP_CENTER_PD
1146*4882a593Smuzhiyun		| RKPM_SLP_AP_PWROFF
1147*4882a593Smuzhiyun		)
1148*4882a593Smuzhiyun		>;
1149*4882a593Smuzhiyun	rockchip,wakeup-config = <
1150*4882a593Smuzhiyun		(0
1151*4882a593Smuzhiyun		| RKPM_GPIO_WKUP_EN
1152*4882a593Smuzhiyun		| RKPM_PWM_WKUP_EN
1153*4882a593Smuzhiyun		)
1154*4882a593Smuzhiyun		>;
1155*4882a593Smuzhiyun		rockchip,pwm-regulator-config = <
1156*4882a593Smuzhiyun		(0
1157*4882a593Smuzhiyun		| PWM2_REGULATOR_EN
1158*4882a593Smuzhiyun		)
1159*4882a593Smuzhiyun		>;
1160*4882a593Smuzhiyun		rockchip,power-ctrl =
1161*4882a593Smuzhiyun		<&gpio1 17 GPIO_ACTIVE_HIGH>,
1162*4882a593Smuzhiyun		<&gpio1 14 GPIO_ACTIVE_HIGH>;
1163*4882a593Smuzhiyun};
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun&saradc {
1166*4882a593Smuzhiyun	status = "okay";
1167*4882a593Smuzhiyun};
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun&spdif {
1170*4882a593Smuzhiyun	status = "okay";
1171*4882a593Smuzhiyun	pinctrl-0 = <&spdif_bus>;
1172*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
1173*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
1174*4882a593Smuzhiyun	#sound-dai-cells = <0>;
1175*4882a593Smuzhiyun};
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun&sdio0 {
1178*4882a593Smuzhiyun	clock-frequency = <150000000>;
1179*4882a593Smuzhiyun	clock-freq-min-max = <200000 150000000>;
1180*4882a593Smuzhiyun	no-sd;
1181*4882a593Smuzhiyun	no-mmc;
1182*4882a593Smuzhiyun	bus-width = <4>;
1183*4882a593Smuzhiyun	disable-wp;
1184*4882a593Smuzhiyun	cap-sd-highspeed;
1185*4882a593Smuzhiyun	cap-sdio-irq;
1186*4882a593Smuzhiyun	keep-power-in-suspend;
1187*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
1188*4882a593Smuzhiyun	non-removable;
1189*4882a593Smuzhiyun	num-slots = <1>;
1190*4882a593Smuzhiyun	pinctrl-names = "default";
1191*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
1192*4882a593Smuzhiyun	sd-uhs-sdr104;
1193*4882a593Smuzhiyun	status = "okay";
1194*4882a593Smuzhiyun};
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun&sdmmc {
1197*4882a593Smuzhiyun	clock-frequency = <150000000>;
1198*4882a593Smuzhiyun	clock-freq-min-max = <100000 150000000>;
1199*4882a593Smuzhiyun	no-sdio;
1200*4882a593Smuzhiyun	no-mmc;
1201*4882a593Smuzhiyun	bus-width = <4>;
1202*4882a593Smuzhiyun	cap-mmc-highspeed;
1203*4882a593Smuzhiyun	cap-sd-highspeed;
1204*4882a593Smuzhiyun	disable-wp;
1205*4882a593Smuzhiyun	num-slots = <1>;
1206*4882a593Smuzhiyun	sd-uhs-sdr104;
1207*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
1208*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
1209*4882a593Smuzhiyun	pinctrl-names = "default";
1210*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
1211*4882a593Smuzhiyun	status = "okay";
1212*4882a593Smuzhiyun};
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun&sdhci {
1215*4882a593Smuzhiyun	bus-width = <8>;
1216*4882a593Smuzhiyun	mmc-hs400-1_8v;
1217*4882a593Smuzhiyun	no-sdio;
1218*4882a593Smuzhiyun	no-sd;
1219*4882a593Smuzhiyun	non-removable;
1220*4882a593Smuzhiyun	keep-power-in-suspend;
1221*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
1222*4882a593Smuzhiyun	status = "okay";
1223*4882a593Smuzhiyun};
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun&saradc {
1226*4882a593Smuzhiyun	status = "okay";
1227*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
1228*4882a593Smuzhiyun};
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun&tcphy0 {
1231*4882a593Smuzhiyun	status = "okay";
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun	svid = <0xff01>;
1234*4882a593Smuzhiyun	orientation-switch;
1235*4882a593Smuzhiyun	port {
1236*4882a593Smuzhiyun		#address-cells = <1>;
1237*4882a593Smuzhiyun		#size-cells = <0>;
1238*4882a593Smuzhiyun		tcphy0_orientation_switch: endpoint@0 {
1239*4882a593Smuzhiyun			reg = <0>;
1240*4882a593Smuzhiyun			remote-endpoint = <&usbc0_orien_sw>;
1241*4882a593Smuzhiyun		};
1242*4882a593Smuzhiyun		tcphy_dp_altmode_switch: endpoint@1 {
1243*4882a593Smuzhiyun			reg = <1>;
1244*4882a593Smuzhiyun			remote-endpoint = <&dp_mode_sw>;
1245*4882a593Smuzhiyun		};
1246*4882a593Smuzhiyun	};
1247*4882a593Smuzhiyun};
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun&tcphy1 {
1250*4882a593Smuzhiyun	status = "okay";
1251*4882a593Smuzhiyun};
1252*4882a593Smuzhiyun
1253*4882a593Smuzhiyun&tsadc {
1254*4882a593Smuzhiyun	/* tshut mode 0:CRU 1:GPIO */
1255*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
1256*4882a593Smuzhiyun	/* tshut polarity 0:LOW 1:HIGH */
1257*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
1258*4882a593Smuzhiyun	status = "okay";
1259*4882a593Smuzhiyun};
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun&uart0 {
1262*4882a593Smuzhiyun	pinctrl-names = "default";
1263*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
1264*4882a593Smuzhiyun	status = "okay";
1265*4882a593Smuzhiyun};
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun&uart2 {
1268*4882a593Smuzhiyun	status = "disabled";
1269*4882a593Smuzhiyun};
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun&u2phy0 {
1272*4882a593Smuzhiyun	status = "okay";
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun	u2phy0_otg: otg-port {
1275*4882a593Smuzhiyun		status = "okay";
1276*4882a593Smuzhiyun	};
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun	u2phy0_host: host-port {
1279*4882a593Smuzhiyun		phy-supply = <&vcc5v0_usb>;
1280*4882a593Smuzhiyun		status = "okay";
1281*4882a593Smuzhiyun	};
1282*4882a593Smuzhiyun};
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun&u2phy1 {
1285*4882a593Smuzhiyun	status = "okay";
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun	u2phy1_otg: otg-port {
1288*4882a593Smuzhiyun		status = "okay";
1289*4882a593Smuzhiyun	};
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun	u2phy1_host: host-port {
1292*4882a593Smuzhiyun		status = "okay";
1293*4882a593Smuzhiyun	};
1294*4882a593Smuzhiyun};
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun&usbdrd3_0 {
1297*4882a593Smuzhiyun	status = "okay";
1298*4882a593Smuzhiyun};
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun&usbdrd3_1 {
1301*4882a593Smuzhiyun	status = "okay";
1302*4882a593Smuzhiyun};
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun&usbdrd_dwc3_0 {
1305*4882a593Smuzhiyun	status = "okay";
1306*4882a593Smuzhiyun	usb-role-switch;
1307*4882a593Smuzhiyun	port {
1308*4882a593Smuzhiyun		#address-cells = <1>;
1309*4882a593Smuzhiyun		#size-cells = <0>;
1310*4882a593Smuzhiyun		dwc3_0_role_switch: endpoint@0 {
1311*4882a593Smuzhiyun			reg = <0>;
1312*4882a593Smuzhiyun			remote-endpoint = <&usbc0_role_sw>;
1313*4882a593Smuzhiyun		};
1314*4882a593Smuzhiyun	};
1315*4882a593Smuzhiyun};
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun&usbdrd_dwc3_1 {
1318*4882a593Smuzhiyun	status = "okay";
1319*4882a593Smuzhiyun	dr_mode = "host";
1320*4882a593Smuzhiyun};
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun&usb_host0_ehci {
1323*4882a593Smuzhiyun	status = "okay";
1324*4882a593Smuzhiyun};
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun&usb_host0_ohci {
1327*4882a593Smuzhiyun	status = "okay";
1328*4882a593Smuzhiyun};
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun&usb_host1_ehci {
1331*4882a593Smuzhiyun	status = "okay";
1332*4882a593Smuzhiyun};
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun&usb_host1_ohci {
1335*4882a593Smuzhiyun	status = "okay";
1336*4882a593Smuzhiyun};
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun&vopb {
1339*4882a593Smuzhiyun	assigned-clocks = <&cru DCLK_VOP0_DIV>;
1340*4882a593Smuzhiyun	assigned-clock-parents = <&cru PLL_CPLL>;
1341*4882a593Smuzhiyun};
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun&vopl {
1344*4882a593Smuzhiyun	assigned-clocks = <&cru DCLK_VOP1_DIV>;
1345*4882a593Smuzhiyun	assigned-clock-parents = <&cru PLL_VPLL>;
1346*4882a593Smuzhiyun};
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun&pinctrl {
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun	ak8963 {
1351*4882a593Smuzhiyun		ak8963_irq_gpio: ak8963-irq-gpio {
1352*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
1353*4882a593Smuzhiyun		};
1354*4882a593Smuzhiyun	};
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun	charger {
1357*4882a593Smuzhiyun		charger_ok: charge-ok {
1358*4882a593Smuzhiyun			rockchip,pins =
1359*4882a593Smuzhiyun				<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
1360*4882a593Smuzhiyun		};
1361*4882a593Smuzhiyun	};
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun	i2s0 {
1364*4882a593Smuzhiyun		i2s0_8ch_bus: i2s0-8ch-bus {
1365*4882a593Smuzhiyun			rockchip,pins =
1366*4882a593Smuzhiyun				<3 RK_PD0 1 &pcfg_pull_none>,
1367*4882a593Smuzhiyun				<3 RK_PD2 1 &pcfg_pull_none>,
1368*4882a593Smuzhiyun				<3 RK_PD3 1 &pcfg_pull_none>,
1369*4882a593Smuzhiyun				<3 RK_PD4 1 &pcfg_pull_none>,
1370*4882a593Smuzhiyun				<3 RK_PD5 1 &pcfg_pull_none>,
1371*4882a593Smuzhiyun				<3 RK_PD6 1 &pcfg_pull_none>,
1372*4882a593Smuzhiyun				<3 RK_PD7 1 &pcfg_pull_none>;
1373*4882a593Smuzhiyun			};
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun		i2s_8ch_mclk: i2s-8ch-mclk {
1376*4882a593Smuzhiyun				rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
1377*4882a593Smuzhiyun		};
1378*4882a593Smuzhiyun	};
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun	i2s1 {
1381*4882a593Smuzhiyun		i2s1_2ch_bus: i2s1-2ch-bus {
1382*4882a593Smuzhiyun			rockchip,pins =
1383*4882a593Smuzhiyun				<4 RK_PA3 1 &pcfg_pull_none>,
1384*4882a593Smuzhiyun				<4 RK_PA5 1 &pcfg_pull_none>,
1385*4882a593Smuzhiyun				<4 RK_PA6 1 &pcfg_pull_none>,
1386*4882a593Smuzhiyun				<4 RK_PA7 1 &pcfg_pull_none>;
1387*4882a593Smuzhiyun		};
1388*4882a593Smuzhiyun	};
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun	headphone {
1391*4882a593Smuzhiyun		hp_det: hp-det {
1392*4882a593Smuzhiyun			rockchip,pins =
1393*4882a593Smuzhiyun				<0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
1394*4882a593Smuzhiyun		};
1395*4882a593Smuzhiyun	};
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun	hdmiin {
1398*4882a593Smuzhiyun		hdmiin_gpios: hdmiin_gpios {
1399*4882a593Smuzhiyun		rockchip,pins =
1400*4882a593Smuzhiyun				<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
1401*4882a593Smuzhiyun				<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
1402*4882a593Smuzhiyun				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
1403*4882a593Smuzhiyun				<4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
1404*4882a593Smuzhiyun		};
1405*4882a593Smuzhiyun	};
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun	mpu6500 {
1408*4882a593Smuzhiyun		mpu6500_irq_gpio: mpu6500-irq-gpio {
1409*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
1410*4882a593Smuzhiyun		};
1411*4882a593Smuzhiyun	};
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun	pmic {
1414*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
1415*4882a593Smuzhiyun			rockchip,pins =
1416*4882a593Smuzhiyun				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
1417*4882a593Smuzhiyun		};
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun		vsel1_gpio: vsel1-gpio {
1420*4882a593Smuzhiyun			rockchip,pins =
1421*4882a593Smuzhiyun				<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
1422*4882a593Smuzhiyun		};
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun		vsel2_gpio: vsel2-gpio {
1425*4882a593Smuzhiyun			rockchip,pins =
1426*4882a593Smuzhiyun				<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
1427*4882a593Smuzhiyun		};
1428*4882a593Smuzhiyun
1429*4882a593Smuzhiyun		soc_slppin_gpio: soc-slppin-gpio {
1430*4882a593Smuzhiyun			rockchip,pins =
1431*4882a593Smuzhiyun				<1 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>;
1432*4882a593Smuzhiyun		};
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun		soc_slppin_slp: soc-slppin-slp {
1435*4882a593Smuzhiyun			rockchip,pins =
1436*4882a593Smuzhiyun				<1 RK_PA5 1 &pcfg_pull_none>;
1437*4882a593Smuzhiyun		};
1438*4882a593Smuzhiyun	};
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun	sdio-pwrseq {
1441*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
1442*4882a593Smuzhiyun			rockchip,pins =
1443*4882a593Smuzhiyun				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
1444*4882a593Smuzhiyun		};
1445*4882a593Smuzhiyun	};
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun	wireless-bluetooth {
1448*4882a593Smuzhiyun		uart0_gpios: uart0-gpios {
1449*4882a593Smuzhiyun			rockchip,pins =
1450*4882a593Smuzhiyun				<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
1451*4882a593Smuzhiyun		};
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun		bt_reset_gpio: bt-reset-gpio {
1454*4882a593Smuzhiyun			rockchip,pins =
1455*4882a593Smuzhiyun				<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
1456*4882a593Smuzhiyun		};
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun		bt_wake_gpio: bt-wake-gpio {
1459*4882a593Smuzhiyun			rockchip,pins =
1460*4882a593Smuzhiyun				<0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
1461*4882a593Smuzhiyun		};
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun		bt_irq_gpio: bt-irq-gpio {
1464*4882a593Smuzhiyun			rockchip,pins =
1465*4882a593Smuzhiyun				<2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
1466*4882a593Smuzhiyun		};
1467*4882a593Smuzhiyun	};
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun	rk-modem {
1470*4882a593Smuzhiyun		lte_vbat: lte-vbat {
1471*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
1472*4882a593Smuzhiyun		};
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun		lte_power_en: lte-power-en {
1475*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
1476*4882a593Smuzhiyun		};
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun		lte_reset: lte-reset {
1479*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
1480*4882a593Smuzhiyun		};
1481*4882a593Smuzhiyun	};
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun	usb2 {
1484*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
1485*4882a593Smuzhiyun			rockchip,pins =
1486*4882a593Smuzhiyun				<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
1487*4882a593Smuzhiyun		};
1488*4882a593Smuzhiyun	};
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun	usb-typec {
1491*4882a593Smuzhiyun		usbc0_int: usbc0-int {
1492*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
1493*4882a593Smuzhiyun		};
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun		vcc5v0_typec0_en: vcc5v0-typec0-en {
1496*4882a593Smuzhiyun			rockchip,pins =
1497*4882a593Smuzhiyun				<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
1498*4882a593Smuzhiyun		};
1499*4882a593Smuzhiyun	};
1500*4882a593Smuzhiyun
1501*4882a593Smuzhiyun	vcc_sd {
1502*4882a593Smuzhiyun		vcc_sd_h: vcc-sd-h {
1503*4882a593Smuzhiyun			rockchip,pins =
1504*4882a593Smuzhiyun				<0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
1505*4882a593Smuzhiyun		};
1506*4882a593Smuzhiyun	};
1507*4882a593Smuzhiyun
1508*4882a593Smuzhiyun	usbnet {
1509*4882a593Smuzhiyun		usbnet_pwr_drv: usbnet-pwr-drv {
1510*4882a593Smuzhiyun			rockchip,pins =
1511*4882a593Smuzhiyun				<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
1512*4882a593Smuzhiyun		};
1513*4882a593Smuzhiyun	};
1514*4882a593Smuzhiyun};
1515