xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-android.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "rk3399-evb-ind.dtsi"
9*4882a593Smuzhiyun#include "rk3399-android.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Rockchip RK3399 EVB IND LPDDR4 Board edp (Android)";
13*4882a593Smuzhiyun	compatible = "rockchip,android", "rockchip,rk3399-evb-ind-lpddr4-android", "rockchip,rk3399";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	iram: sram@ff8d0000 {
16*4882a593Smuzhiyun		compatible = "mmio-sram";
17*4882a593Smuzhiyun		reg = <0x0 0xff8d0000 0x0 0x20000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	vcc_lcd: vcc-lcd {
21*4882a593Smuzhiyun		compatible = "regulator-fixed";
22*4882a593Smuzhiyun		regulator-name = "vcc_lcd";
23*4882a593Smuzhiyun		startup-delay-us = <20000>;
24*4882a593Smuzhiyun		enable-active-high;
25*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
26*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
27*4882a593Smuzhiyun		regulator-boot-on;
28*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	panel: panel {
32*4882a593Smuzhiyun		compatible = "simple-panel";
33*4882a593Smuzhiyun		backlight = <&backlight>;
34*4882a593Smuzhiyun		power-supply = <&vcc_lcd>;
35*4882a593Smuzhiyun		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
36*4882a593Smuzhiyun		reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
37*4882a593Smuzhiyun		prepare-delay-ms = <20>;
38*4882a593Smuzhiyun		enable-delay-ms = <20>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		display-timings {
41*4882a593Smuzhiyun			native-mode = <&timing0>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun			timing0: timing0 {
44*4882a593Smuzhiyun				clock-frequency = <200000000>;
45*4882a593Smuzhiyun				hactive = <1536>;
46*4882a593Smuzhiyun				vactive = <2048>;
47*4882a593Smuzhiyun				hfront-porch = <12>;
48*4882a593Smuzhiyun				hsync-len = <16>;
49*4882a593Smuzhiyun				hback-porch = <48>;
50*4882a593Smuzhiyun				vfront-porch = <8>;
51*4882a593Smuzhiyun				vsync-len = <4>;
52*4882a593Smuzhiyun				vback-porch = <8>;
53*4882a593Smuzhiyun				hsync-active = <0>;
54*4882a593Smuzhiyun				vsync-active = <0>;
55*4882a593Smuzhiyun				de-active = <0>;
56*4882a593Smuzhiyun				pixelclk-active = <0>;
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		ports {
61*4882a593Smuzhiyun			panel_in: endpoint {
62*4882a593Smuzhiyun				remote-endpoint = <&edp_out>;
63*4882a593Smuzhiyun			};
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	test-power {
68*4882a593Smuzhiyun		status = "okay";
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&backlight {
73*4882a593Smuzhiyun	enable-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&dmac_bus {
77*4882a593Smuzhiyun	iram = <&iram>;
78*4882a593Smuzhiyun	rockchip,force-iram;
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&dp_sound {
82*4882a593Smuzhiyun	status = "disabled";
83*4882a593Smuzhiyun};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun&edp {
86*4882a593Smuzhiyun	status = "okay";
87*4882a593Smuzhiyun	force-hpd;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	ports {
90*4882a593Smuzhiyun		port@1 {
91*4882a593Smuzhiyun			reg = <1>;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun			edp_out: endpoint {
94*4882a593Smuzhiyun				remote-endpoint = <&panel_in>;
95*4882a593Smuzhiyun			};
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&edp_in_vopl {
101*4882a593Smuzhiyun	status = "disabled";
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&i2s2 {
105*4882a593Smuzhiyun	#sound-dai-cells = <0>;
106*4882a593Smuzhiyun	status = "okay";
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&hdmi_sound {
110*4882a593Smuzhiyun	status = "okay";
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&route_edp {
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&i2s1 {
118*4882a593Smuzhiyun	#sound-dai-cells = <0>;
119*4882a593Smuzhiyun	status = "okay";
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&rk809_sound {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&hdmi_in_vopb {
127*4882a593Smuzhiyun	status = "disabled";
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun/*
131*4882a593Smuzhiyun * if enable dp_sound, should disable spdif_sound and spdif_out
132*4882a593Smuzhiyun */
133*4882a593Smuzhiyun&spdif_out {
134*4882a593Smuzhiyun	status = "disabled";
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&spdif_sound {
138*4882a593Smuzhiyun	status = "disabled";
139*4882a593Smuzhiyun};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun&i2s0 {
142*4882a593Smuzhiyun	#sound-dai-cells = <0>;
143*4882a593Smuzhiyun	status = "disabled";
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&tc358749x_sound {
147*4882a593Smuzhiyun	status = "disabled";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&pinctrl {
151*4882a593Smuzhiyun	lcd-panel {
152*4882a593Smuzhiyun		lcd_panel_reset: lcd-panel-reset {
153*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158