xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3368-xikp.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
10*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
11*4882a593Smuzhiyun#include "rk3368.dtsi"
12*4882a593Smuzhiyun#include "rk3368-android.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	es8316-sound {
16*4882a593Smuzhiyun		compatible = "simple-audio-card";
17*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
18*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rk-es8316-codec";
19*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
20*4882a593Smuzhiyun		simple-audio-card,widgets =
21*4882a593Smuzhiyun			"Microphone", "Mic Jack",
22*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
23*4882a593Smuzhiyun		simple-audio-card,routing =
24*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
25*4882a593Smuzhiyun			"IN1P", "Mic Jack",
26*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
27*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
28*4882a593Smuzhiyun		simple-audio-card,cpu {
29*4882a593Smuzhiyun			sound-dai = <&i2s_8ch>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun		simple-audio-card,codec {
32*4882a593Smuzhiyun			sound-dai = <&es8316>;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
37*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
38*4882a593Smuzhiyun		clocks = <&rk818 1>;
39*4882a593Smuzhiyun		clock-names = "ext_clock";
40*4882a593Smuzhiyun		pinctrl-names = "default";
41*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		/*
44*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
45*4882a593Smuzhiyun		 * on the actual card populated):
46*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
47*4882a593Smuzhiyun		 * - PDN (power down when low)
48*4882a593Smuzhiyun		 */
49*4882a593Smuzhiyun		reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	backlight: backlight {
53*4882a593Smuzhiyun		compatible = "pwm-backlight";
54*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
55*4882a593Smuzhiyun		brightness-levels = <
56*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
57*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
58*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
59*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
60*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
61*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
62*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
63*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
64*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
65*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
66*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
67*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
68*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
69*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
70*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
71*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
72*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
73*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
74*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
75*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
76*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
77*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
78*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
79*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
80*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
81*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
82*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
83*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
84*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
85*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
86*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
87*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
88*4882a593Smuzhiyun		default-brightness-level = <200>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	charge-animation {
92*4882a593Smuzhiyun		compatible = "rockchip,uboot-charge";
93*4882a593Smuzhiyun		rockchip,uboot-charge-on = <1>;
94*4882a593Smuzhiyun		rockchip,android-charge-on = <0>;
95*4882a593Smuzhiyun		rockchip,uboot-low-power-voltage = <3500>;
96*4882a593Smuzhiyun		rockchip,screen-on-voltage = <3600>;
97*4882a593Smuzhiyun		status = "okay";
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	gpio_keys: gpio-keys {
101*4882a593Smuzhiyun		compatible = "gpio-keys";
102*4882a593Smuzhiyun		autorepeat;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		power {
105*4882a593Smuzhiyun			debounce-interval = <100>;
106*4882a593Smuzhiyun			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
107*4882a593Smuzhiyun			label = "GPIO Key Power";
108*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
109*4882a593Smuzhiyun			wakeup-source;
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	adc_keys: adc-keys {
114*4882a593Smuzhiyun		compatible = "adc-keys";
115*4882a593Smuzhiyun		io-channels = <&saradc 1>;
116*4882a593Smuzhiyun		io-channel-names = "buttons";
117*4882a593Smuzhiyun		keyup-threshold-microvolt = <1024000>;
118*4882a593Smuzhiyun		poll-interval = <100>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		vol-up-key {
121*4882a593Smuzhiyun			label = "volume up";
122*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
123*4882a593Smuzhiyun			press-threshold-microvolt = <1000>;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		vol-down-key {
127*4882a593Smuzhiyun			label = "volume down";
128*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
129*4882a593Smuzhiyun			press-threshold-microvolt = <170000>;
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	wireless-wlan {
134*4882a593Smuzhiyun		compatible = "wlan-platdata";
135*4882a593Smuzhiyun		rockchip,grf = <&grf>;
136*4882a593Smuzhiyun		/* wifi_chip_type - wifi chip define
137*4882a593Smuzhiyun		* ap6210, ap6330, ap6335
138*4882a593Smuzhiyun		* rtl8188eu, rtl8723bs, rtl8723bu
139*4882a593Smuzhiyun		* esp8089
140*4882a593Smuzhiyun		*/
141*4882a593Smuzhiyun		wifi_chip_type = "ap6255";
142*4882a593Smuzhiyun		sdio_vref = <1800>; //1800mv or 3300mv
143*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>;
144*4882a593Smuzhiyun		status = "okay";
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun	wireless-bluetooth {
148*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
149*4882a593Smuzhiyun		clocks = <&rk818 1>;
150*4882a593Smuzhiyun		clock-names = "ext_clock";
151*4882a593Smuzhiyun		uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
152*4882a593Smuzhiyun		pinctrl-names = "default","rts_gpio";
153*4882a593Smuzhiyun		pinctrl-0 = <&uart0_rts>;
154*4882a593Smuzhiyun		pinctrl-1 = <&uart0_rts_gpio>;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		//BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
157*4882a593Smuzhiyun		BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
158*4882a593Smuzhiyun		BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
159*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		status = "okay";
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	vcc_sys: vcc-sys {
165*4882a593Smuzhiyun		compatible = "regulator-fixed";
166*4882a593Smuzhiyun		regulator-name = "vcc_sys";
167*4882a593Smuzhiyun		regulator-always-on;
168*4882a593Smuzhiyun		regulator-boot-on;
169*4882a593Smuzhiyun		regulator-min-microvolt = <3800000>;
170*4882a593Smuzhiyun		regulator-max-microvolt = <3800000>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	vcc_host: vcc-host {
174*4882a593Smuzhiyun		compatible = "regulator-fixed";
175*4882a593Smuzhiyun		enable-active-high;
176*4882a593Smuzhiyun		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
177*4882a593Smuzhiyun		pinctrl-names = "default";
178*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
179*4882a593Smuzhiyun		regulator-name = "vcc_host";
180*4882a593Smuzhiyun		regulator-always-on;
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	xin32k: xin32k {
184*4882a593Smuzhiyun		compatible = "fixed-clock";
185*4882a593Smuzhiyun		clock-frequency = <32768>;
186*4882a593Smuzhiyun		clock-output-names = "xin32k";
187*4882a593Smuzhiyun		#clock-cells = <0>;
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&cpu_l0 {
192*4882a593Smuzhiyun	cpu-supply = <&syr827>;
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&cpu_l1 {
196*4882a593Smuzhiyun	cpu-supply = <&syr827>;
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&cpu_l2 {
200*4882a593Smuzhiyun	cpu-supply = <&syr827>;
201*4882a593Smuzhiyun};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun&cpu_l3 {
204*4882a593Smuzhiyun	cpu-supply = <&syr827>;
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&cpu_b0 {
208*4882a593Smuzhiyun	cpu-supply = <&syr827>;
209*4882a593Smuzhiyun};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&cpu_b1 {
212*4882a593Smuzhiyun	cpu-supply = <&syr827>;
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&cpu_b2 {
216*4882a593Smuzhiyun	cpu-supply = <&syr827>;
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&cpu_b3 {
220*4882a593Smuzhiyun	cpu-supply = <&syr827>;
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&gpu {
224*4882a593Smuzhiyun	logic-supply = <&vdd_logic>;
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&dfi {
228*4882a593Smuzhiyun	status = "okay";
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun&dmc {
232*4882a593Smuzhiyun	status = "okay";
233*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
234*4882a593Smuzhiyun	devfreq-events = <&dfi>;
235*4882a593Smuzhiyun	upthreshold = <60>;
236*4882a593Smuzhiyun	downdifferential = <20>;
237*4882a593Smuzhiyun	system-status-freq = <
238*4882a593Smuzhiyun		/*system status		freq(KHz)*/
239*4882a593Smuzhiyun		SYS_STATUS_NORMAL	600000
240*4882a593Smuzhiyun		SYS_STATUS_REBOOT	600000
241*4882a593Smuzhiyun		SYS_STATUS_SUSPEND	240000
242*4882a593Smuzhiyun		SYS_STATUS_VIDEO_1080P	396000
243*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K	600000
244*4882a593Smuzhiyun		SYS_STATUS_PERFORMANCE	600000
245*4882a593Smuzhiyun		SYS_STATUS_BOOST	396000
246*4882a593Smuzhiyun		SYS_STATUS_DUALVIEW	600000
247*4882a593Smuzhiyun		SYS_STATUS_ISP		528000
248*4882a593Smuzhiyun	>;
249*4882a593Smuzhiyun	vop-bw-dmc-freq = <
250*4882a593Smuzhiyun	/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
251*4882a593Smuzhiyun		0       582      240000
252*4882a593Smuzhiyun		583     99999    396000
253*4882a593Smuzhiyun	>;
254*4882a593Smuzhiyun	auto-min-freq = <240000>;
255*4882a593Smuzhiyun	auto-freq-en = <1>;
256*4882a593Smuzhiyun};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun&rockchip_suspend {
259*4882a593Smuzhiyun	status = "okay";
260*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
261*4882a593Smuzhiyun		(0
262*4882a593Smuzhiyun		| RKPM_SLP_ARMOFF
263*4882a593Smuzhiyun		| RKPM_SLP_PMU_PLLS_PWRDN
264*4882a593Smuzhiyun		| RKPM_SLP_PMU_PMUALIVE_32K
265*4882a593Smuzhiyun		| RKPM_SLP_SFT_PLLS_DEEP
266*4882a593Smuzhiyun		| RKPM_SLP_PMU_DIS_OSC
267*4882a593Smuzhiyun		| RKPM_SLP_SFT_PD_NBSCUS
268*4882a593Smuzhiyun		)
269*4882a593Smuzhiyun	>;
270*4882a593Smuzhiyun	rockchip,wakeup-config = <
271*4882a593Smuzhiyun		(0
272*4882a593Smuzhiyun		| RKPM_GPIO_WKUP_EN
273*4882a593Smuzhiyun		| RKPM_USB_WKUP_EN
274*4882a593Smuzhiyun		| RKPM_CLUSTER_L_WKUP_EN
275*4882a593Smuzhiyun		)
276*4882a593Smuzhiyun	>;
277*4882a593Smuzhiyun};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun&emmc {
280*4882a593Smuzhiyun	bus-width = <8>;
281*4882a593Smuzhiyun	cap-mmc-highspeed;
282*4882a593Smuzhiyun	mmc-hs200-1_8v;
283*4882a593Smuzhiyun	no-sdio;
284*4882a593Smuzhiyun	no-sd;
285*4882a593Smuzhiyun	disable-wp;
286*4882a593Smuzhiyun	non-removable;
287*4882a593Smuzhiyun	num-slots = <1>;
288*4882a593Smuzhiyun	status = "okay";
289*4882a593Smuzhiyun};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun&nandc0 {
292*4882a593Smuzhiyun	status = "okay";
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&sdmmc {
296*4882a593Smuzhiyun	clock-frequency = <37500000>;
297*4882a593Smuzhiyun	clock-freq-min-max = <400000 37500000>;
298*4882a593Smuzhiyun	no-sdio;
299*4882a593Smuzhiyun	no-mmc;
300*4882a593Smuzhiyun	cap-mmc-highspeed;
301*4882a593Smuzhiyun	cap-sd-highspeed;
302*4882a593Smuzhiyun	card-detect-delay = <200>;
303*4882a593Smuzhiyun	disable-wp;
304*4882a593Smuzhiyun	num-slots = <1>;
305*4882a593Smuzhiyun	pinctrl-names = "default";
306*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
307*4882a593Smuzhiyun	status = "disabled";
308*4882a593Smuzhiyun};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun&sdio0 {
311*4882a593Smuzhiyun	clock-frequency = <100000000>;
312*4882a593Smuzhiyun	clock-freq-min-max = <200000 100000000>;
313*4882a593Smuzhiyun	no-sd;
314*4882a593Smuzhiyun	no-mmc;
315*4882a593Smuzhiyun	bus-width = <4>;
316*4882a593Smuzhiyun	disable-wp;
317*4882a593Smuzhiyun	cap-sd-highspeed;
318*4882a593Smuzhiyun	cap-sdio-irq;
319*4882a593Smuzhiyun	keep-power-in-suspend;
320*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
321*4882a593Smuzhiyun	non-removable;
322*4882a593Smuzhiyun	num-slots = <1>;
323*4882a593Smuzhiyun	pinctrl-names = "default";
324*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
325*4882a593Smuzhiyun	sd-uhs-sdr104;
326*4882a593Smuzhiyun	status = "okay";
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&i2c0 {
330*4882a593Smuzhiyun	status = "okay";
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun	syr827: syr827@40 {
333*4882a593Smuzhiyun		compatible = "silergy,syr827";
334*4882a593Smuzhiyun		status = "okay";
335*4882a593Smuzhiyun		reg = <0x40>;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
338*4882a593Smuzhiyun		regulator-name = "vdd_arm";
339*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
340*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
341*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
342*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
343*4882a593Smuzhiyun		pinctrl-0 = <&vsel_gpio>;
344*4882a593Smuzhiyun		vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
345*4882a593Smuzhiyun		regulator-always-on;
346*4882a593Smuzhiyun		regulator-boot-on;
347*4882a593Smuzhiyun		regulator-initial-state = <3>;
348*4882a593Smuzhiyun		regulator-state-mem {
349*4882a593Smuzhiyun			regulator-off-in-suspend;
350*4882a593Smuzhiyun			regulator-suspend-microvolt = <900000>;
351*4882a593Smuzhiyun		};
352*4882a593Smuzhiyun	};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun	rk818: pmic@1c {
355*4882a593Smuzhiyun		compatible = "rockchip,rk818";
356*4882a593Smuzhiyun		status = "okay";
357*4882a593Smuzhiyun		reg = <0x1c>;
358*4882a593Smuzhiyun		clock-output-names = "rk818-clkout1", "wifibt_32kin";
359*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
360*4882a593Smuzhiyun		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
361*4882a593Smuzhiyun		pinctrl-names = "default";
362*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
363*4882a593Smuzhiyun		rockchip,system-power-controller;
364*4882a593Smuzhiyun		wakeup-source;
365*4882a593Smuzhiyun		extcon = <&u2phy>;
366*4882a593Smuzhiyun		#clock-cells = <1>;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
369*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
370*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
371*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
372*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
373*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
374*4882a593Smuzhiyun		vcc8-supply = <&vcc_sys>;
375*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun		regulators {
378*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
379*4882a593Smuzhiyun				regulator-name = "vdd_logic";
380*4882a593Smuzhiyun				regulator-always-on;
381*4882a593Smuzhiyun				regulator-boot-on;
382*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
383*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
384*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
385*4882a593Smuzhiyun				regulator-state-mem {
386*4882a593Smuzhiyun					regulator-on-in-suspend;
387*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
388*4882a593Smuzhiyun				};
389*4882a593Smuzhiyun			};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
392*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
393*4882a593Smuzhiyun				regulator-always-on;
394*4882a593Smuzhiyun				regulator-boot-on;
395*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
396*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
397*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
398*4882a593Smuzhiyun				regulator-state-mem {
399*4882a593Smuzhiyun					regulator-on-in-suspend;
400*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
401*4882a593Smuzhiyun				};
402*4882a593Smuzhiyun			};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
405*4882a593Smuzhiyun				regulator-always-on;
406*4882a593Smuzhiyun				regulator-boot-on;
407*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
408*4882a593Smuzhiyun				regulator-state-mem {
409*4882a593Smuzhiyun					regulator-on-in-suspend;
410*4882a593Smuzhiyun				};
411*4882a593Smuzhiyun			};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
414*4882a593Smuzhiyun				regulator-always-on;
415*4882a593Smuzhiyun				regulator-boot-on;
416*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
417*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
418*4882a593Smuzhiyun				regulator-name = "vcc_io";
419*4882a593Smuzhiyun				regulator-state-mem {
420*4882a593Smuzhiyun					regulator-on-in-suspend;
421*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
422*4882a593Smuzhiyun				};
423*4882a593Smuzhiyun			};
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun			vcca_codec: LDO_REG1 {
426*4882a593Smuzhiyun				regulator-always-on;
427*4882a593Smuzhiyun				regulator-boot-on;
428*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
429*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
430*4882a593Smuzhiyun				regulator-name = "vcca_codec";
431*4882a593Smuzhiyun				regulator-state-mem {
432*4882a593Smuzhiyun					regulator-on-in-suspend;
433*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
434*4882a593Smuzhiyun				};
435*4882a593Smuzhiyun			};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun			vcc_tp: LDO_REG2 {
438*4882a593Smuzhiyun				regulator-boot-on;
439*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
440*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
441*4882a593Smuzhiyun				regulator-name = "vcc_tp";
442*4882a593Smuzhiyun				regulator-state-mem {
443*4882a593Smuzhiyun					regulator-off-in-suspend;
444*4882a593Smuzhiyun				};
445*4882a593Smuzhiyun			};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
448*4882a593Smuzhiyun				regulator-always-on;
449*4882a593Smuzhiyun				regulator-boot-on;
450*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
451*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
452*4882a593Smuzhiyun				regulator-name = "vdd_10";
453*4882a593Smuzhiyun				regulator-state-mem {
454*4882a593Smuzhiyun					regulator-on-in-suspend;
455*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
456*4882a593Smuzhiyun				};
457*4882a593Smuzhiyun			};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
460*4882a593Smuzhiyun				regulator-always-on;
461*4882a593Smuzhiyun				regulator-boot-on;
462*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
463*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
464*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
465*4882a593Smuzhiyun				regulator-state-mem {
466*4882a593Smuzhiyun					regulator-on-in-suspend;
467*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
468*4882a593Smuzhiyun				};
469*4882a593Smuzhiyun			};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun			vccio_pmu: LDO_REG5 {
472*4882a593Smuzhiyun				regulator-always-on;
473*4882a593Smuzhiyun				regulator-boot-on;
474*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
475*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
476*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
477*4882a593Smuzhiyun				regulator-state-mem {
478*4882a593Smuzhiyun					regulator-on-in-suspend;
479*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
480*4882a593Smuzhiyun				};
481*4882a593Smuzhiyun			};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
484*4882a593Smuzhiyun				regulator-always-on;
485*4882a593Smuzhiyun				regulator-boot-on;
486*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
487*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
488*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
489*4882a593Smuzhiyun				regulator-state-mem {
490*4882a593Smuzhiyun					regulator-on-in-suspend;
491*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
492*4882a593Smuzhiyun				};
493*4882a593Smuzhiyun			};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
496*4882a593Smuzhiyun				regulator-always-on;
497*4882a593Smuzhiyun				regulator-boot-on;
498*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
499*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
500*4882a593Smuzhiyun				regulator-name = "vcc_18";
501*4882a593Smuzhiyun				regulator-state-mem {
502*4882a593Smuzhiyun					regulator-on-in-suspend;
503*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
504*4882a593Smuzhiyun				};
505*4882a593Smuzhiyun			};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun			vccio_wl: LDO_REG8 {
508*4882a593Smuzhiyun				regulator-always-on;
509*4882a593Smuzhiyun				regulator-boot-on;
510*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
511*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
512*4882a593Smuzhiyun				regulator-name = "vccio_wl";
513*4882a593Smuzhiyun				regulator-state-mem {
514*4882a593Smuzhiyun					regulator-on-in-suspend;
515*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
516*4882a593Smuzhiyun				};
517*4882a593Smuzhiyun			};
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun			vccio_sd: LDO_REG9 {
520*4882a593Smuzhiyun				regulator-always-on;
521*4882a593Smuzhiyun				regulator-boot-on;
522*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
523*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
524*4882a593Smuzhiyun				regulator-name = "vccio_sd";
525*4882a593Smuzhiyun				regulator-state-mem {
526*4882a593Smuzhiyun					regulator-on-in-suspend;
527*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
528*4882a593Smuzhiyun				};
529*4882a593Smuzhiyun			};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun			vcc_sd: SWITCH_REG {
532*4882a593Smuzhiyun				regulator-always-on;
533*4882a593Smuzhiyun				regulator-boot-on;
534*4882a593Smuzhiyun				regulator-name = "vcc_sd";
535*4882a593Smuzhiyun				regulator-state-mem {
536*4882a593Smuzhiyun					regulator-on-in-suspend;
537*4882a593Smuzhiyun				};
538*4882a593Smuzhiyun			};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun			boost_otg: DCDC_BOOST {
541*4882a593Smuzhiyun				regulator-name = "boost_otg";
542*4882a593Smuzhiyun				regulator-always-on;
543*4882a593Smuzhiyun				regulator-boot-on;
544*4882a593Smuzhiyun				regulator-min-microvolt = <5000000>;
545*4882a593Smuzhiyun				regulator-max-microvolt = <5000000>;
546*4882a593Smuzhiyun				regulator-state-mem {
547*4882a593Smuzhiyun					regulator-on-in-suspend;
548*4882a593Smuzhiyun					regulator-suspend-microvolt = <5000000>;
549*4882a593Smuzhiyun				};
550*4882a593Smuzhiyun			};
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun			otg_switch: OTG_SWITCH {
553*4882a593Smuzhiyun				regulator-name = "otg_switch";
554*4882a593Smuzhiyun			};
555*4882a593Smuzhiyun		};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun		battery {
558*4882a593Smuzhiyun			compatible = "rk818-battery";
559*4882a593Smuzhiyun			pinctrl-names = "default";
560*4882a593Smuzhiyun			pinctrl-0 = <&dc_irq_gpio>;
561*4882a593Smuzhiyun			ocv_table = <
562*4882a593Smuzhiyun				3400 3652 3680 3707 3730 3747 3764
563*4882a593Smuzhiyun				3772 3781 3792 3807 3828 3861 3899
564*4882a593Smuzhiyun				3929 3958 3987 4038 4079 4127 4186>;
565*4882a593Smuzhiyun			design_capacity = <7536>;
566*4882a593Smuzhiyun			design_qmax = <8290>;
567*4882a593Smuzhiyun			bat_res = <100>;
568*4882a593Smuzhiyun			max_input_current = <1750>;
569*4882a593Smuzhiyun			max_chrg_current = <2000>;
570*4882a593Smuzhiyun			max_chrg_voltage = <4200>;
571*4882a593Smuzhiyun			sleep_enter_current = <600>;
572*4882a593Smuzhiyun			sleep_exit_current = <600>;
573*4882a593Smuzhiyun			power_off_thresd = <3400>;
574*4882a593Smuzhiyun			zero_algorithm_vol = <3850>;
575*4882a593Smuzhiyun			fb_temperature = <115>;
576*4882a593Smuzhiyun			sample_res = <20>;
577*4882a593Smuzhiyun			max_soc_offset = <60>;
578*4882a593Smuzhiyun			energy_mode = <0>;
579*4882a593Smuzhiyun			monitor_sec = <5>;
580*4882a593Smuzhiyun			virtual_power = <0>;
581*4882a593Smuzhiyun			power_dc2otg = <0>;
582*4882a593Smuzhiyun			support_usb_adp = <1>;
583*4882a593Smuzhiyun			support_dc_adp = <1>;
584*4882a593Smuzhiyun			dc_det_gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
585*4882a593Smuzhiyun		};
586*4882a593Smuzhiyun	};
587*4882a593Smuzhiyun};
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun&i2c1 {
590*4882a593Smuzhiyun	status = "okay";
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun	es8316: es8316@10 {
593*4882a593Smuzhiyun		status = "okay";
594*4882a593Smuzhiyun		#sound-dai-cells = <0>;
595*4882a593Smuzhiyun		compatible = "everest,es8316";
596*4882a593Smuzhiyun		reg = <0x10>;
597*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S_8CH_OUT>;
598*4882a593Smuzhiyun		clock-names = "mclk";
599*4882a593Smuzhiyun		spk-con-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
600*4882a593Smuzhiyun		hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>;
601*4882a593Smuzhiyun		pinctrl-names = "default";
602*4882a593Smuzhiyun		pinctrl-0 = <&i2s_8ch_mclk>;
603*4882a593Smuzhiyun	};
604*4882a593Smuzhiyun};
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun&i2c2 {
607*4882a593Smuzhiyun	status = "okay";
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun	gt9xx: gt9xx@14 {
610*4882a593Smuzhiyun		compatible = "goodix,gt9xx";
611*4882a593Smuzhiyun		reg = <0x14>;
612*4882a593Smuzhiyun		touch-gpio = <&gpio0 12 IRQ_TYPE_LEVEL_HIGH>;
613*4882a593Smuzhiyun		reset-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
614*4882a593Smuzhiyun		max-x = <1920>;
615*4882a593Smuzhiyun		max-y = <1200>;
616*4882a593Smuzhiyun		tp-size = <89>;
617*4882a593Smuzhiyun		configfile-num = <1>;
618*4882a593Smuzhiyun		status = "okay";
619*4882a593Smuzhiyun		tp-supply = <&vcc_tp>;
620*4882a593Smuzhiyun	};
621*4882a593Smuzhiyun};
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun&i2c3 {
624*4882a593Smuzhiyun	status = "okay";
625*4882a593Smuzhiyun};
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun&i2c4 {
628*4882a593Smuzhiyun	status = "okay";
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun	mpu6500@68 {
631*4882a593Smuzhiyun		status = "disabled";
632*4882a593Smuzhiyun		compatible = "invensense,mpu6500";
633*4882a593Smuzhiyun		pinctrl-names = "default";
634*4882a593Smuzhiyun		pinctrl-0 = <&mpu6500_irq_gpio>;
635*4882a593Smuzhiyun		reg = <0x68>;
636*4882a593Smuzhiyun		irq-gpio = <&gpio3 14 IRQ_TYPE_EDGE_RISING>;
637*4882a593Smuzhiyun		mpu-int_config = <0x10>;
638*4882a593Smuzhiyun		mpu-level_shifter = <0>;
639*4882a593Smuzhiyun		mpu-orientation = <1 0 0 0 1 0 0 0 1>;
640*4882a593Smuzhiyun		orientation-x= <1>;
641*4882a593Smuzhiyun		orientation-y= <0>;
642*4882a593Smuzhiyun		orientation-z= <1>;
643*4882a593Smuzhiyun		support-hw-poweroff = <1>;
644*4882a593Smuzhiyun		mpu-debug = <1>;
645*4882a593Smuzhiyun	};
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun	sensor@4c {
648*4882a593Smuzhiyun		status = "okay";
649*4882a593Smuzhiyun		compatible = "gs_mc3230";
650*4882a593Smuzhiyun		reg = <0x4c>;
651*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
652*4882a593Smuzhiyun		irq_enable = <0>;
653*4882a593Smuzhiyun		poll_delay_ms = <30>;
654*4882a593Smuzhiyun		layout = <4>;
655*4882a593Smuzhiyun		reprobe_en = <1>;
656*4882a593Smuzhiyun	};
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun	sensor@19 {
659*4882a593Smuzhiyun		status = "okay";
660*4882a593Smuzhiyun		compatible = "gs_lis3dh";
661*4882a593Smuzhiyun		reg = <0x19>;
662*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
663*4882a593Smuzhiyun		irq-gpio = <&gpio3 14 IRQ_TYPE_LEVEL_LOW>;
664*4882a593Smuzhiyun		irq_enable = <0>;
665*4882a593Smuzhiyun		poll_delay_ms = <30>;
666*4882a593Smuzhiyun		layout = <6>;
667*4882a593Smuzhiyun		reprobe_en = <1>;
668*4882a593Smuzhiyun	};
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun	sensor@10 {
671*4882a593Smuzhiyun		status = "okay";
672*4882a593Smuzhiyun		compatible = "light_cm3218";
673*4882a593Smuzhiyun		pinctrl-names = "default";
674*4882a593Smuzhiyun		pinctrl-0 = <&cm3218_irq_gpio>;
675*4882a593Smuzhiyun		reg = <0x10>;
676*4882a593Smuzhiyun		type = <SENSOR_TYPE_LIGHT>;
677*4882a593Smuzhiyun		irq-gpio = <&gpio3 15 IRQ_TYPE_EDGE_FALLING>;
678*4882a593Smuzhiyun		irq_enable = <1>;
679*4882a593Smuzhiyun		poll_delay_ms = <30>;
680*4882a593Smuzhiyun	};
681*4882a593Smuzhiyun};
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun&i2s_8ch {
684*4882a593Smuzhiyun	status = "okay";
685*4882a593Smuzhiyun	rockchip,i2s-broken-burst-len;
686*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
687*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
688*4882a593Smuzhiyun	#sound-dai-cells = <0>;
689*4882a593Smuzhiyun};
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun&io_domains {
692*4882a593Smuzhiyun	status = "okay";
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun	dvp-supply = <&vcc_18>;
695*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
696*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
697*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
698*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
699*4882a593Smuzhiyun	wifi-supply = <&vccio_wl>;
700*4882a593Smuzhiyun};
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun&pmu_io_domains {
703*4882a593Smuzhiyun	status = "okay";
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun	pmu-supply = <&vccio_pmu>;
706*4882a593Smuzhiyun	vop-supply = <&vccio_pmu>;
707*4882a593Smuzhiyun};
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun&pwm0 {
710*4882a593Smuzhiyun	status = "okay";
711*4882a593Smuzhiyun};
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun&uart0 {
714*4882a593Smuzhiyun	pinctrl-names = "default";
715*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
716*4882a593Smuzhiyun	status = "okay";
717*4882a593Smuzhiyun};
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun&saradc {
720*4882a593Smuzhiyun	status = "okay";
721*4882a593Smuzhiyun};
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun&u2phy {
724*4882a593Smuzhiyun	status = "okay";
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun	u2phy_host: host-port {
727*4882a593Smuzhiyun		phy-supply = <&vcc_host>;
728*4882a593Smuzhiyun		status = "okay";
729*4882a593Smuzhiyun	};
730*4882a593Smuzhiyun};
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun&usb_host0_ehci {
733*4882a593Smuzhiyun	status = "okay";
734*4882a593Smuzhiyun};
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun&usb_host0_ohci {
737*4882a593Smuzhiyun	status = "okay";
738*4882a593Smuzhiyun};
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun&dsi {
741*4882a593Smuzhiyun	status = "okay";
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun	panel@0 {
744*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
745*4882a593Smuzhiyun		reg = <0>;
746*4882a593Smuzhiyun		backlight = <&backlight>;
747*4882a593Smuzhiyun		enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
748*4882a593Smuzhiyun		prepare-delay-ms = <120>;
749*4882a593Smuzhiyun		enable-delay-ms = <200>;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
752*4882a593Smuzhiyun			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
753*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
754*4882a593Smuzhiyun		dsi,lanes = <4>;
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun		display-timings {
757*4882a593Smuzhiyun			native-mode = <&timing0>;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun			timing0: timing0 {
760*4882a593Smuzhiyun				clock-frequency = <159000000>;
761*4882a593Smuzhiyun				hactive = <1200>;
762*4882a593Smuzhiyun				vactive = <1920>;
763*4882a593Smuzhiyun				hback-porch = <60>;
764*4882a593Smuzhiyun				hfront-porch = <80>;
765*4882a593Smuzhiyun				vback-porch = <25>;
766*4882a593Smuzhiyun				vfront-porch = <35>;
767*4882a593Smuzhiyun				hsync-len = <1>;
768*4882a593Smuzhiyun				vsync-len = <1>;
769*4882a593Smuzhiyun				hsync-active = <0>;
770*4882a593Smuzhiyun				vsync-active = <0>;
771*4882a593Smuzhiyun				de-active = <0>;
772*4882a593Smuzhiyun				pixelclk-active = <0>;
773*4882a593Smuzhiyun			};
774*4882a593Smuzhiyun		};
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun		ports {
777*4882a593Smuzhiyun			#address-cells = <1>;
778*4882a593Smuzhiyun			#size-cells = <0>;
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun			port@0 {
781*4882a593Smuzhiyun				reg = <0>;
782*4882a593Smuzhiyun				panel_in_dsi: endpoint {
783*4882a593Smuzhiyun					remote-endpoint = <&dsi_out_panel>;
784*4882a593Smuzhiyun				};
785*4882a593Smuzhiyun			};
786*4882a593Smuzhiyun		};
787*4882a593Smuzhiyun	};
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun	ports {
790*4882a593Smuzhiyun		#address-cells = <1>;
791*4882a593Smuzhiyun		#size-cells = <0>;
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun		port@1 {
794*4882a593Smuzhiyun			reg = <1>;
795*4882a593Smuzhiyun			dsi_out_panel: endpoint {
796*4882a593Smuzhiyun				remote-endpoint = <&panel_in_dsi>;
797*4882a593Smuzhiyun			};
798*4882a593Smuzhiyun		};
799*4882a593Smuzhiyun	};
800*4882a593Smuzhiyun};
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun&route_dsi {
803*4882a593Smuzhiyun	status = "okay";
804*4882a593Smuzhiyun};
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun&tsadc {
807*4882a593Smuzhiyun	tsadc-supply = <&syr827>;
808*4882a593Smuzhiyun	status = "okay";
809*4882a593Smuzhiyun};
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun&pinctrl {
812*4882a593Smuzhiyun	pmic {
813*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
814*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
815*4882a593Smuzhiyun		};
816*4882a593Smuzhiyun		vsel_gpio: vsel-gpio {
817*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
818*4882a593Smuzhiyun		};
819*4882a593Smuzhiyun	};
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun	mpu6500 {
822*4882a593Smuzhiyun		mpu6500_irq_gpio: mpu6500-irq-gpio {
823*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
824*4882a593Smuzhiyun		};
825*4882a593Smuzhiyun	};
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun	cm3218 {
828*4882a593Smuzhiyun		cm3218_irq_gpio: cm3218-irq-gpio {
829*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
830*4882a593Smuzhiyun		};
831*4882a593Smuzhiyun	};
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun	dc_det {
834*4882a593Smuzhiyun		dc_irq_gpio: dc-irq-gpio {
835*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
836*4882a593Smuzhiyun		};
837*4882a593Smuzhiyun	};
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun	sdio-pwrseq {
840*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
841*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
842*4882a593Smuzhiyun		};
843*4882a593Smuzhiyun	};
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun	usb2 {
846*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
847*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
848*4882a593Smuzhiyun		};
849*4882a593Smuzhiyun	};
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun	wireless-bluetooth {
852*4882a593Smuzhiyun		uart0_rts_gpio: uart0-rts-gpio {
853*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
854*4882a593Smuzhiyun		};
855*4882a593Smuzhiyun	};
856*4882a593Smuzhiyun};
857*4882a593Smuzhiyun
858