xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3368.dtsi"
10*4882a593Smuzhiyun#include "rk3368-android.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Rockchip Sheep board";
14*4882a593Smuzhiyun	compatible = "rockchip,sheep", "rockchip,rk3368";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	sound {
17*4882a593Smuzhiyun		compatible = "simple-audio-card";
18*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
19*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rt5640-codec";
20*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
21*4882a593Smuzhiyun		simple-audio-card,widgets =
22*4882a593Smuzhiyun			"Microphone", "Mic Jack",
23*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
24*4882a593Smuzhiyun		simple-audio-card,routing =
25*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
26*4882a593Smuzhiyun			"IN1P", "Mic Jack",
27*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
28*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
29*4882a593Smuzhiyun		simple-audio-card,cpu {
30*4882a593Smuzhiyun			sound-dai = <&i2s_8ch>;
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun		simple-audio-card,codec {
33*4882a593Smuzhiyun			sound-dai = <&rt5640>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	backlight: backlight {
38*4882a593Smuzhiyun		compatible = "pwm-backlight";
39*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
40*4882a593Smuzhiyun		brightness-levels = <
41*4882a593Smuzhiyun			135 135 136 136 137 137 138 138
42*4882a593Smuzhiyun			139 139 140 140 141 141 142 142
43*4882a593Smuzhiyun			143 143 143 144 144 145 145 146
44*4882a593Smuzhiyun			146 147 147 148 148 149 149 150
45*4882a593Smuzhiyun			150 151 151 151 152 152 153 153
46*4882a593Smuzhiyun			154 154 155 155 156 156 157 157
47*4882a593Smuzhiyun			158 158 159 159 159 160 160 161
48*4882a593Smuzhiyun			161 162 162 163 163 164 164 165
49*4882a593Smuzhiyun			165 166 166 167 167 167 168 168
50*4882a593Smuzhiyun			169 169 170 170 171 171 172 172
51*4882a593Smuzhiyun			173 173 174 174 175 175 175 176
52*4882a593Smuzhiyun			176 177 177 178 178 179 179 180
53*4882a593Smuzhiyun			180 181 181 182 182 183 183 183
54*4882a593Smuzhiyun			184 184 185 185 186 186 187 187
55*4882a593Smuzhiyun			188 188 189 189 190 190 191 191
56*4882a593Smuzhiyun			191 192 192 193 193 194 194 195
57*4882a593Smuzhiyun			195 196 196 197 197 198 198 199
58*4882a593Smuzhiyun			199 199 200 200 201 201 202 202
59*4882a593Smuzhiyun			203 203 204 204 205 205 206 206
60*4882a593Smuzhiyun			207 207 207 208 208 209 209 210
61*4882a593Smuzhiyun			210 211 211 212 212 213 213 214
62*4882a593Smuzhiyun			214 215 215 215 216 216 217 217
63*4882a593Smuzhiyun			218 218 219 219 220 220 221 221
64*4882a593Smuzhiyun			222 222 223 223 223 224 224 225
65*4882a593Smuzhiyun			225 226 226 227 227 228 228 229
66*4882a593Smuzhiyun			229 230 230 231 231 231 232 232
67*4882a593Smuzhiyun			233 233 234 234 235 235 236 236
68*4882a593Smuzhiyun			237 237 238 238 239 239 239 240
69*4882a593Smuzhiyun			240 241 241 242 242 243 243 244
70*4882a593Smuzhiyun			244 245 245 246 246 247 247 247
71*4882a593Smuzhiyun			248 248 249 249 250 250 251 251
72*4882a593Smuzhiyun			252 252 253 253 254 254 255 255>;
73*4882a593Smuzhiyun		default-brightness-level = <200>;
74*4882a593Smuzhiyun		enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	rk_key: rockchip-key {
78*4882a593Smuzhiyun		compatible = "rockchip,key";
79*4882a593Smuzhiyun		status = "okay";
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		io-channels = <&saradc 1>;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		vol-up-key {
84*4882a593Smuzhiyun			linux,code = <115>;
85*4882a593Smuzhiyun			label = "volume up";
86*4882a593Smuzhiyun			rockchip,adc_value = <1>;
87*4882a593Smuzhiyun		};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		vol-down-key {
90*4882a593Smuzhiyun			linux,code = <114>;
91*4882a593Smuzhiyun			label = "volume down";
92*4882a593Smuzhiyun			rockchip,adc_value = <170>;
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		power-key {
96*4882a593Smuzhiyun			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
97*4882a593Smuzhiyun			linux,code = <116>;
98*4882a593Smuzhiyun			label = "power";
99*4882a593Smuzhiyun			gpio-key,wakeup;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		menu-key {
103*4882a593Smuzhiyun			linux,code = <59>;
104*4882a593Smuzhiyun			label = "menu";
105*4882a593Smuzhiyun			rockchip,adc_value = <355>;
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun		home-key {
109*4882a593Smuzhiyun			linux,code = <102>;
110*4882a593Smuzhiyun			label = "home";
111*4882a593Smuzhiyun			rockchip,adc_value = <746>;
112*4882a593Smuzhiyun		};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun		back-key {
115*4882a593Smuzhiyun			linux,code = <158>;
116*4882a593Smuzhiyun			label = "back";
117*4882a593Smuzhiyun			rockchip,adc_value = <560>;
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		camera-key {
121*4882a593Smuzhiyun			linux,code = <212>;
122*4882a593Smuzhiyun			label = "camera";
123*4882a593Smuzhiyun			rockchip,adc_value = <450>;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	vcc_sys: vcc-sys {
128*4882a593Smuzhiyun		compatible = "regulator-fixed";
129*4882a593Smuzhiyun		regulator-name = "vcc_sys";
130*4882a593Smuzhiyun		regulator-always-on;
131*4882a593Smuzhiyun		regulator-boot-on;
132*4882a593Smuzhiyun		regulator-min-microvolt = <3800000>;
133*4882a593Smuzhiyun		regulator-max-microvolt = <3800000>;
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	vcc_host: vcc-host {
137*4882a593Smuzhiyun		compatible = "regulator-fixed";
138*4882a593Smuzhiyun		enable-active-high;
139*4882a593Smuzhiyun		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
140*4882a593Smuzhiyun		pinctrl-names = "default";
141*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
142*4882a593Smuzhiyun		regulator-name = "vcc_host";
143*4882a593Smuzhiyun		regulator-always-on;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	vcc_otg_vbus: otg-vbus-regulator {
147*4882a593Smuzhiyun		compatible = "regulator-fixed";
148*4882a593Smuzhiyun		gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
149*4882a593Smuzhiyun		pinctrl-names = "default";
150*4882a593Smuzhiyun		pinctrl-0 = <&otg_vbus_drv>;
151*4882a593Smuzhiyun		regulator-name = "vcc_otg_vbus";
152*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
153*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
154*4882a593Smuzhiyun		enable-active-high;
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	xin32k: xin32k {
158*4882a593Smuzhiyun		compatible = "fixed-clock";
159*4882a593Smuzhiyun		clock-frequency = <32768>;
160*4882a593Smuzhiyun		clock-output-names = "xin32k";
161*4882a593Smuzhiyun		#clock-cells = <0>;
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun&firmware_android {
166*4882a593Smuzhiyun	compatible = "android,firmware";
167*4882a593Smuzhiyun	fstab {
168*4882a593Smuzhiyun		compatible = "android,fstab";
169*4882a593Smuzhiyun		system {
170*4882a593Smuzhiyun			compatible = "android,system";
171*4882a593Smuzhiyun			dev = "/dev/block/by-name/system";
172*4882a593Smuzhiyun			type = "ext4";
173*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
174*4882a593Smuzhiyun			fsmgr_flags = "wait,verify";
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun		vendor {
177*4882a593Smuzhiyun			compatible = "android,vendor";
178*4882a593Smuzhiyun			dev = "/dev/block/by-name/vendor";
179*4882a593Smuzhiyun			type = "ext4";
180*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
181*4882a593Smuzhiyun			fsmgr_flags = "wait,verify";
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun&emmc {
187*4882a593Smuzhiyun	status = "okay";
188*4882a593Smuzhiyun	bus-width = <8>;
189*4882a593Smuzhiyun	cap-mmc-highspeed;
190*4882a593Smuzhiyun	mmc-hs200-1_8v;
191*4882a593Smuzhiyun	no-sdio;
192*4882a593Smuzhiyun	no-sd;
193*4882a593Smuzhiyun	disable-wp;
194*4882a593Smuzhiyun	non-removable;
195*4882a593Smuzhiyun	num-slots = <1>;
196*4882a593Smuzhiyun	pinctrl-names = "default";
197*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&sdmmc {
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun	clock-frequency = <37500000>;
203*4882a593Smuzhiyun	clock-freq-min-max = <400000 37500000>;
204*4882a593Smuzhiyun	no-sdio;
205*4882a593Smuzhiyun	no-mmc;
206*4882a593Smuzhiyun	cap-mmc-highspeed;
207*4882a593Smuzhiyun	cap-sd-highspeed;
208*4882a593Smuzhiyun	card-detect-delay = <200>;
209*4882a593Smuzhiyun	disable-wp;
210*4882a593Smuzhiyun	num-slots = <1>;
211*4882a593Smuzhiyun	pinctrl-names = "default";
212*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&i2c0 {
216*4882a593Smuzhiyun	status = "okay";
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun	syr827: syr827@40 {
219*4882a593Smuzhiyun		compatible = "silergy,syr827";
220*4882a593Smuzhiyun		reg = <0x40>;
221*4882a593Smuzhiyun		status = "okay";
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
224*4882a593Smuzhiyun		regulator-name = "vdd_arm";
225*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
226*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
227*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
228*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
229*4882a593Smuzhiyun		pinctrl-0 = <&vsel_gpio>;
230*4882a593Smuzhiyun		vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
231*4882a593Smuzhiyun		regulator-always-on;
232*4882a593Smuzhiyun		regulator-boot-on;
233*4882a593Smuzhiyun		regulator-initial-state = <3>;
234*4882a593Smuzhiyun		regulator-state-mem {
235*4882a593Smuzhiyun			regulator-off-in-suspend;
236*4882a593Smuzhiyun			regulator-suspend-microvolt = <900000>;
237*4882a593Smuzhiyun		};
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	rk818: pmic@1c {
241*4882a593Smuzhiyun		compatible = "rockchip,rk818";
242*4882a593Smuzhiyun		reg = <0x1c>;
243*4882a593Smuzhiyun		status = "okay";
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun		clock-output-names = "rk818-clkout1", "wifibt_32kin";
246*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
247*4882a593Smuzhiyun		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
248*4882a593Smuzhiyun		pinctrl-names = "default";
249*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
250*4882a593Smuzhiyun		rockchip,system-power-controller;
251*4882a593Smuzhiyun		wakeup-source;
252*4882a593Smuzhiyun		#clock-cells = <1>;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
255*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
256*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
257*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
258*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
259*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
260*4882a593Smuzhiyun		vcc8-supply = <&vcc_sys>;
261*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun		regulators {
264*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
265*4882a593Smuzhiyun				regulator-name = "vdd_logic";
266*4882a593Smuzhiyun				regulator-always-on;
267*4882a593Smuzhiyun				regulator-boot-on;
268*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
269*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
270*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
271*4882a593Smuzhiyun				regulator-state-mem {
272*4882a593Smuzhiyun					regulator-on-in-suspend;
273*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
274*4882a593Smuzhiyun				};
275*4882a593Smuzhiyun			};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
278*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
279*4882a593Smuzhiyun				regulator-always-on;
280*4882a593Smuzhiyun				regulator-boot-on;
281*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
282*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
283*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
284*4882a593Smuzhiyun				regulator-state-mem {
285*4882a593Smuzhiyun					regulator-on-in-suspend;
286*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
287*4882a593Smuzhiyun				};
288*4882a593Smuzhiyun			};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
291*4882a593Smuzhiyun				regulator-always-on;
292*4882a593Smuzhiyun				regulator-boot-on;
293*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
294*4882a593Smuzhiyun				regulator-state-mem {
295*4882a593Smuzhiyun					regulator-on-in-suspend;
296*4882a593Smuzhiyun				};
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
300*4882a593Smuzhiyun				regulator-always-on;
301*4882a593Smuzhiyun				regulator-boot-on;
302*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
303*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
304*4882a593Smuzhiyun				regulator-name = "vcc_io";
305*4882a593Smuzhiyun				regulator-state-mem {
306*4882a593Smuzhiyun					regulator-on-in-suspend;
307*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
308*4882a593Smuzhiyun				};
309*4882a593Smuzhiyun			};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun			vcca_codec: LDO_REG1 {
312*4882a593Smuzhiyun				regulator-always-on;
313*4882a593Smuzhiyun				regulator-boot-on;
314*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
315*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
316*4882a593Smuzhiyun				regulator-name = "vcca_codec";
317*4882a593Smuzhiyun				regulator-state-mem {
318*4882a593Smuzhiyun					regulator-on-in-suspend;
319*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
320*4882a593Smuzhiyun				};
321*4882a593Smuzhiyun			};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun			vcc_tp: LDO_REG2 {
324*4882a593Smuzhiyun				regulator-boot-on;
325*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
326*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
327*4882a593Smuzhiyun				regulator-name = "vcc_tp";
328*4882a593Smuzhiyun				regulator-state-mem {
329*4882a593Smuzhiyun					regulator-off-in-suspend;
330*4882a593Smuzhiyun				};
331*4882a593Smuzhiyun			};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
334*4882a593Smuzhiyun				regulator-always-on;
335*4882a593Smuzhiyun				regulator-boot-on;
336*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
337*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
338*4882a593Smuzhiyun				regulator-name = "vdd_10";
339*4882a593Smuzhiyun				regulator-state-mem {
340*4882a593Smuzhiyun					regulator-on-in-suspend;
341*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
342*4882a593Smuzhiyun				};
343*4882a593Smuzhiyun			};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
346*4882a593Smuzhiyun				regulator-always-on;
347*4882a593Smuzhiyun				regulator-boot-on;
348*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
349*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
350*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
351*4882a593Smuzhiyun				regulator-state-mem {
352*4882a593Smuzhiyun					regulator-on-in-suspend;
353*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
354*4882a593Smuzhiyun				};
355*4882a593Smuzhiyun			};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun			vccio_pmu: LDO_REG5 {
358*4882a593Smuzhiyun				regulator-always-on;
359*4882a593Smuzhiyun				regulator-boot-on;
360*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
361*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
362*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
363*4882a593Smuzhiyun				regulator-state-mem {
364*4882a593Smuzhiyun					regulator-on-in-suspend;
365*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
366*4882a593Smuzhiyun				};
367*4882a593Smuzhiyun			};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
370*4882a593Smuzhiyun				regulator-always-on;
371*4882a593Smuzhiyun				regulator-boot-on;
372*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
373*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
374*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
375*4882a593Smuzhiyun				regulator-state-mem {
376*4882a593Smuzhiyun					regulator-on-in-suspend;
377*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
378*4882a593Smuzhiyun				};
379*4882a593Smuzhiyun			};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
382*4882a593Smuzhiyun				regulator-always-on;
383*4882a593Smuzhiyun				regulator-boot-on;
384*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
385*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
386*4882a593Smuzhiyun				regulator-name = "vcc_18";
387*4882a593Smuzhiyun				regulator-state-mem {
388*4882a593Smuzhiyun					regulator-on-in-suspend;
389*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
390*4882a593Smuzhiyun				};
391*4882a593Smuzhiyun			};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun			vccio_wl: LDO_REG8 {
394*4882a593Smuzhiyun				regulator-always-on;
395*4882a593Smuzhiyun				regulator-boot-on;
396*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
397*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
398*4882a593Smuzhiyun				regulator-name = "vccio_wl";
399*4882a593Smuzhiyun				regulator-state-mem {
400*4882a593Smuzhiyun					regulator-on-in-suspend;
401*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
402*4882a593Smuzhiyun				};
403*4882a593Smuzhiyun			};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun			vccio_sd: LDO_REG9 {
406*4882a593Smuzhiyun				regulator-always-on;
407*4882a593Smuzhiyun				regulator-boot-on;
408*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
409*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
410*4882a593Smuzhiyun				regulator-name = "vccio_sd";
411*4882a593Smuzhiyun				regulator-state-mem {
412*4882a593Smuzhiyun					regulator-on-in-suspend;
413*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
414*4882a593Smuzhiyun				};
415*4882a593Smuzhiyun			};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun			vcc_sd: SWITCH_REG {
418*4882a593Smuzhiyun				regulator-always-on;
419*4882a593Smuzhiyun				regulator-boot-on;
420*4882a593Smuzhiyun				regulator-name = "vcc_sd";
421*4882a593Smuzhiyun				regulator-state-mem {
422*4882a593Smuzhiyun					regulator-on-in-suspend;
423*4882a593Smuzhiyun				};
424*4882a593Smuzhiyun			};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun			boost_otg: DCDC_BOOST {
427*4882a593Smuzhiyun				regulator-name = "boost_otg";
428*4882a593Smuzhiyun				regulator-always-on;
429*4882a593Smuzhiyun				regulator-boot-on;
430*4882a593Smuzhiyun				regulator-min-microvolt = <5000000>;
431*4882a593Smuzhiyun				regulator-max-microvolt = <5000000>;
432*4882a593Smuzhiyun				regulator-state-mem {
433*4882a593Smuzhiyun					regulator-on-in-suspend;
434*4882a593Smuzhiyun					regulator-suspend-microvolt = <5000000>;
435*4882a593Smuzhiyun				};
436*4882a593Smuzhiyun			};
437*4882a593Smuzhiyun		};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun		battery {
440*4882a593Smuzhiyun			compatible = "rk818-battery";
441*4882a593Smuzhiyun			pinctrl-names = "default";
442*4882a593Smuzhiyun			pinctrl-0 = <&dc_irq_gpio>;
443*4882a593Smuzhiyun			ocv_table = <
444*4882a593Smuzhiyun				3400 3650 3693 3707 3731 3749 3760
445*4882a593Smuzhiyun				3770 3782 3796 3812 3829 3852 3882
446*4882a593Smuzhiyun				3915 3951 3981 4047 4086 4132 4182>;
447*4882a593Smuzhiyun			design_capacity = <8650>;
448*4882a593Smuzhiyun			design_qmax = <8800>;
449*4882a593Smuzhiyun			bat_res = <85>;
450*4882a593Smuzhiyun			max_input_current = <2000>;
451*4882a593Smuzhiyun			max_chrg_current = <1800>;
452*4882a593Smuzhiyun			max_chrg_voltage = <4200>;
453*4882a593Smuzhiyun			sleep_enter_current = <600>;
454*4882a593Smuzhiyun			sleep_exit_current = <600>;
455*4882a593Smuzhiyun			power_off_thresd = <3400>;
456*4882a593Smuzhiyun			zero_algorithm_vol = <3850>;
457*4882a593Smuzhiyun			fb_temperature = <115>;
458*4882a593Smuzhiyun			sample_res = <10>;
459*4882a593Smuzhiyun			max_soc_offset = <60>;
460*4882a593Smuzhiyun			energy_mode = <0>;
461*4882a593Smuzhiyun			monitor_sec = <5>;
462*4882a593Smuzhiyun			virtual_power = <0>;
463*4882a593Smuzhiyun			power_dc2otg = <1>;
464*4882a593Smuzhiyun			support_usb_adp = <1>;
465*4882a593Smuzhiyun			support_dc_adp = <1>;
466*4882a593Smuzhiyun			dc_det_gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
467*4882a593Smuzhiyun		};
468*4882a593Smuzhiyun	};
469*4882a593Smuzhiyun};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun&cpu_l0 {
472*4882a593Smuzhiyun	cpu-supply = <&syr827>;
473*4882a593Smuzhiyun};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun&cpu_l1 {
476*4882a593Smuzhiyun	cpu-supply = <&syr827>;
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&cpu_l2 {
480*4882a593Smuzhiyun	cpu-supply = <&syr827>;
481*4882a593Smuzhiyun};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun&cpu_l3 {
484*4882a593Smuzhiyun	cpu-supply = <&syr827>;
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&cpu_b0 {
488*4882a593Smuzhiyun	cpu-supply = <&syr827>;
489*4882a593Smuzhiyun};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun&cpu_b1 {
492*4882a593Smuzhiyun	cpu-supply = <&syr827>;
493*4882a593Smuzhiyun};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun&cpu_b2 {
496*4882a593Smuzhiyun	cpu-supply = <&syr827>;
497*4882a593Smuzhiyun};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun&cpu_b3 {
500*4882a593Smuzhiyun	cpu-supply = <&syr827>;
501*4882a593Smuzhiyun};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun&dfi {
504*4882a593Smuzhiyun	status = "okay";
505*4882a593Smuzhiyun};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun&dmc {
508*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
509*4882a593Smuzhiyun	status = "okay";
510*4882a593Smuzhiyun};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun&gpu {
513*4882a593Smuzhiyun	logic-supply = <&vdd_logic>;
514*4882a593Smuzhiyun};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun&rockchip_suspend {
517*4882a593Smuzhiyun	status = "okay";
518*4882a593Smuzhiyun};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun&i2c1 {
521*4882a593Smuzhiyun	status = "okay";
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun	rt5640: rt5640@1c {
524*4882a593Smuzhiyun		compatible = "realtek,rt5640";
525*4882a593Smuzhiyun		reg = <0x1c>;
526*4882a593Smuzhiyun		#sound-dai-cells = <0>;
527*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S_8CH_OUT>;
528*4882a593Smuzhiyun		clock-names = "mclk";
529*4882a593Smuzhiyun		pinctrl-names = "default";
530*4882a593Smuzhiyun		pinctrl-0 = <&i2s_8ch_mclk>;
531*4882a593Smuzhiyun		realtek,in1-differential;
532*4882a593Smuzhiyun		status = "okay";
533*4882a593Smuzhiyun	};
534*4882a593Smuzhiyun};
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun&i2c2 {
537*4882a593Smuzhiyun	status = "okay";
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun	gt9xx: gt9xx@14 {
540*4882a593Smuzhiyun		compatible = "goodix,gt9xx";
541*4882a593Smuzhiyun		reg = <0x14>;
542*4882a593Smuzhiyun		touch-gpio = <&gpio0 12 IRQ_TYPE_LEVEL_LOW>;
543*4882a593Smuzhiyun		reset-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
544*4882a593Smuzhiyun		max-x = <1200>;
545*4882a593Smuzhiyun		max-y = <1900>;
546*4882a593Smuzhiyun		tp-size = <911>;
547*4882a593Smuzhiyun		tp-supply = <&vcc_tp>;
548*4882a593Smuzhiyun		status = "okay";
549*4882a593Smuzhiyun	};
550*4882a593Smuzhiyun};
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun&i2s_8ch {
553*4882a593Smuzhiyun	status = "okay";
554*4882a593Smuzhiyun	rockchip,i2s-broken-burst-len;
555*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
556*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
557*4882a593Smuzhiyun	#sound-dai-cells = <0>;
558*4882a593Smuzhiyun};
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun&io_domains {
561*4882a593Smuzhiyun	status = "okay";
562*4882a593Smuzhiyun	dvp-supply = <&vcc_18>;
563*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
564*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
565*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
566*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
567*4882a593Smuzhiyun	wifi-supply = <&vccio_wl>;
568*4882a593Smuzhiyun};
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun&pmu_io_domains {
571*4882a593Smuzhiyun	status = "okay";
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun	pmu-supply = <&vcc_io>;
574*4882a593Smuzhiyun	vop-supply = <&vcc_io>;
575*4882a593Smuzhiyun};
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun&pwm0 {
578*4882a593Smuzhiyun	status = "okay";
579*4882a593Smuzhiyun};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun&u2phy {
582*4882a593Smuzhiyun	status = "okay";
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun	u2phy_host: host-port {
585*4882a593Smuzhiyun		phy-supply = <&vcc_host>;
586*4882a593Smuzhiyun		status = "okay";
587*4882a593Smuzhiyun	};
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun	u2phy_otg: otg-port {
590*4882a593Smuzhiyun		vbus-supply = <&vcc_otg_vbus>;
591*4882a593Smuzhiyun		status = "okay";
592*4882a593Smuzhiyun	};
593*4882a593Smuzhiyun};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun&usb_host0_ehci {
596*4882a593Smuzhiyun	status = "okay";
597*4882a593Smuzhiyun};
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun&usb_host0_ohci {
600*4882a593Smuzhiyun	status = "okay";
601*4882a593Smuzhiyun};
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun&mailbox {
604*4882a593Smuzhiyun	status = "okay";
605*4882a593Smuzhiyun};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun&mailbox_scpi {
608*4882a593Smuzhiyun	status = "okay";
609*4882a593Smuzhiyun};
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun&dsi {
612*4882a593Smuzhiyun	status = "okay";
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun	panel@0 {
615*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
616*4882a593Smuzhiyun		reg = <0>;
617*4882a593Smuzhiyun		backlight = <&backlight>;
618*4882a593Smuzhiyun		enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
619*4882a593Smuzhiyun		prepare-delay-ms = <120>;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
622*4882a593Smuzhiyun			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
623*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
624*4882a593Smuzhiyun		dsi,lanes = <4>;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun		display-timings {
627*4882a593Smuzhiyun			native-mode = <&timing0>;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun			timing0: timing0 {
630*4882a593Smuzhiyun				clock-frequency = <150000000>;
631*4882a593Smuzhiyun				hactive = <1200>;
632*4882a593Smuzhiyun				vactive = <1920>;
633*4882a593Smuzhiyun				hback-porch = <80>;
634*4882a593Smuzhiyun				hfront-porch = <81>;
635*4882a593Smuzhiyun				vback-porch = <21>;
636*4882a593Smuzhiyun				vfront-porch = <21>;
637*4882a593Smuzhiyun				hsync-len = <10>;
638*4882a593Smuzhiyun				vsync-len = <3>;
639*4882a593Smuzhiyun				hsync-active = <0>;
640*4882a593Smuzhiyun				vsync-active = <0>;
641*4882a593Smuzhiyun				de-active = <0>;
642*4882a593Smuzhiyun				pixelclk-active = <0>;
643*4882a593Smuzhiyun			};
644*4882a593Smuzhiyun		};
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun		ports {
647*4882a593Smuzhiyun			#address-cells = <1>;
648*4882a593Smuzhiyun			#size-cells = <0>;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun			port@0 {
651*4882a593Smuzhiyun				reg = <0>;
652*4882a593Smuzhiyun				panel_in_dsi: endpoint {
653*4882a593Smuzhiyun					remote-endpoint = <&dsi_out_panel>;
654*4882a593Smuzhiyun				};
655*4882a593Smuzhiyun			};
656*4882a593Smuzhiyun		};
657*4882a593Smuzhiyun	};
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun	ports {
660*4882a593Smuzhiyun		#address-cells = <1>;
661*4882a593Smuzhiyun		#size-cells = <0>;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun		port@1 {
664*4882a593Smuzhiyun			reg = <1>;
665*4882a593Smuzhiyun			dsi_out_panel: endpoint {
666*4882a593Smuzhiyun				remote-endpoint = <&panel_in_dsi>;
667*4882a593Smuzhiyun			};
668*4882a593Smuzhiyun		};
669*4882a593Smuzhiyun	};
670*4882a593Smuzhiyun};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun&route_dsi {
673*4882a593Smuzhiyun	status = "okay";
674*4882a593Smuzhiyun};
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun&saradc {
677*4882a593Smuzhiyun	status = "okay";
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun&tsadc {
681*4882a593Smuzhiyun	tsadc-supply = <&syr827>;
682*4882a593Smuzhiyun	status = "okay";
683*4882a593Smuzhiyun};
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun&pinctrl {
686*4882a593Smuzhiyun	pmic {
687*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
688*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
689*4882a593Smuzhiyun		};
690*4882a593Smuzhiyun		vsel_gpio: vsel-gpio {
691*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
692*4882a593Smuzhiyun		};
693*4882a593Smuzhiyun	};
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun	dc_det {
696*4882a593Smuzhiyun		dc_irq_gpio: dc-irq-gpio {
697*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
698*4882a593Smuzhiyun		};
699*4882a593Smuzhiyun	};
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun	usb2 {
702*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
703*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
704*4882a593Smuzhiyun		};
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun		otg_vbus_drv: otg-bus-drv {
707*4882a593Smuzhiyun			rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
708*4882a593Smuzhiyun		};
709*4882a593Smuzhiyun	};
710*4882a593Smuzhiyun};
711