1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 9*4882a593Smuzhiyun#include "rk3368.dtsi" 10*4882a593Smuzhiyun#include "rk3368-android.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Rockchip Sheep board"; 14*4882a593Smuzhiyun compatible = "rockchip,sheep", "rockchip,rk3368"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun sound { 17*4882a593Smuzhiyun compatible = "simple-audio-card"; 18*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 19*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rt5640-codec"; 20*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 21*4882a593Smuzhiyun simple-audio-card,widgets = 22*4882a593Smuzhiyun "Microphone", "Mic Jack", 23*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 24*4882a593Smuzhiyun simple-audio-card,routing = 25*4882a593Smuzhiyun "Mic Jack", "MICBIAS1", 26*4882a593Smuzhiyun "IN1P", "Mic Jack", 27*4882a593Smuzhiyun "Headphone Jack", "HPOL", 28*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 29*4882a593Smuzhiyun simple-audio-card,cpu { 30*4882a593Smuzhiyun sound-dai = <&i2s_8ch>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun simple-audio-card,codec { 33*4882a593Smuzhiyun sound-dai = <&rt5640>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun backlight: backlight { 38*4882a593Smuzhiyun compatible = "pwm-backlight"; 39*4882a593Smuzhiyun pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>; 40*4882a593Smuzhiyun brightness-levels = < 41*4882a593Smuzhiyun 135 135 136 136 137 137 138 138 42*4882a593Smuzhiyun 139 139 140 140 141 141 142 142 43*4882a593Smuzhiyun 143 143 143 144 144 145 145 146 44*4882a593Smuzhiyun 146 147 147 148 148 149 149 150 45*4882a593Smuzhiyun 150 151 151 151 152 152 153 153 46*4882a593Smuzhiyun 154 154 155 155 156 156 157 157 47*4882a593Smuzhiyun 158 158 159 159 159 160 160 161 48*4882a593Smuzhiyun 161 162 162 163 163 164 164 165 49*4882a593Smuzhiyun 165 166 166 167 167 167 168 168 50*4882a593Smuzhiyun 169 169 170 170 171 171 172 172 51*4882a593Smuzhiyun 173 173 174 174 175 175 175 176 52*4882a593Smuzhiyun 176 177 177 178 178 179 179 180 53*4882a593Smuzhiyun 180 181 181 182 182 183 183 183 54*4882a593Smuzhiyun 184 184 185 185 186 186 187 187 55*4882a593Smuzhiyun 188 188 189 189 190 190 191 191 56*4882a593Smuzhiyun 191 192 192 193 193 194 194 195 57*4882a593Smuzhiyun 195 196 196 197 197 198 198 199 58*4882a593Smuzhiyun 199 199 200 200 201 201 202 202 59*4882a593Smuzhiyun 203 203 204 204 205 205 206 206 60*4882a593Smuzhiyun 207 207 207 208 208 209 209 210 61*4882a593Smuzhiyun 210 211 211 212 212 213 213 214 62*4882a593Smuzhiyun 214 215 215 215 216 216 217 217 63*4882a593Smuzhiyun 218 218 219 219 220 220 221 221 64*4882a593Smuzhiyun 222 222 223 223 223 224 224 225 65*4882a593Smuzhiyun 225 226 226 227 227 228 228 229 66*4882a593Smuzhiyun 229 230 230 231 231 231 232 232 67*4882a593Smuzhiyun 233 233 234 234 235 235 236 236 68*4882a593Smuzhiyun 237 237 238 238 239 239 239 240 69*4882a593Smuzhiyun 240 241 241 242 242 243 243 244 70*4882a593Smuzhiyun 244 245 245 246 246 247 247 247 71*4882a593Smuzhiyun 248 248 249 249 250 250 251 251 72*4882a593Smuzhiyun 252 252 253 253 254 254 255 255>; 73*4882a593Smuzhiyun default-brightness-level = <200>; 74*4882a593Smuzhiyun enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun rk_key: rockchip-key { 78*4882a593Smuzhiyun compatible = "rockchip,key"; 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun io-channels = <&saradc 1>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun vol-up-key { 84*4882a593Smuzhiyun linux,code = <115>; 85*4882a593Smuzhiyun label = "volume up"; 86*4882a593Smuzhiyun rockchip,adc_value = <1>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun vol-down-key { 90*4882a593Smuzhiyun linux,code = <114>; 91*4882a593Smuzhiyun label = "volume down"; 92*4882a593Smuzhiyun rockchip,adc_value = <170>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun power-key { 96*4882a593Smuzhiyun gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 97*4882a593Smuzhiyun linux,code = <116>; 98*4882a593Smuzhiyun label = "power"; 99*4882a593Smuzhiyun gpio-key,wakeup; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun menu-key { 103*4882a593Smuzhiyun linux,code = <59>; 104*4882a593Smuzhiyun label = "menu"; 105*4882a593Smuzhiyun rockchip,adc_value = <355>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun home-key { 109*4882a593Smuzhiyun linux,code = <102>; 110*4882a593Smuzhiyun label = "home"; 111*4882a593Smuzhiyun rockchip,adc_value = <746>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun back-key { 115*4882a593Smuzhiyun linux,code = <158>; 116*4882a593Smuzhiyun label = "back"; 117*4882a593Smuzhiyun rockchip,adc_value = <560>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun camera-key { 121*4882a593Smuzhiyun linux,code = <212>; 122*4882a593Smuzhiyun label = "camera"; 123*4882a593Smuzhiyun rockchip,adc_value = <450>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun vcc_sys: vcc-sys { 128*4882a593Smuzhiyun compatible = "regulator-fixed"; 129*4882a593Smuzhiyun regulator-name = "vcc_sys"; 130*4882a593Smuzhiyun regulator-always-on; 131*4882a593Smuzhiyun regulator-boot-on; 132*4882a593Smuzhiyun regulator-min-microvolt = <3800000>; 133*4882a593Smuzhiyun regulator-max-microvolt = <3800000>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun vcc_host: vcc-host { 137*4882a593Smuzhiyun compatible = "regulator-fixed"; 138*4882a593Smuzhiyun enable-active-high; 139*4882a593Smuzhiyun gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 140*4882a593Smuzhiyun pinctrl-names = "default"; 141*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 142*4882a593Smuzhiyun regulator-name = "vcc_host"; 143*4882a593Smuzhiyun regulator-always-on; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun xin32k: xin32k { 147*4882a593Smuzhiyun compatible = "fixed-clock"; 148*4882a593Smuzhiyun clock-frequency = <32768>; 149*4882a593Smuzhiyun clock-output-names = "xin32k"; 150*4882a593Smuzhiyun #clock-cells = <0>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun panel { 154*4882a593Smuzhiyun compatible = "simple-panel"; 155*4882a593Smuzhiyun backlight = <&backlight>; 156*4882a593Smuzhiyun enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; 157*4882a593Smuzhiyun bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun display-timings { 160*4882a593Smuzhiyun native-mode = <&timing0>; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun timing0: timing0 { 163*4882a593Smuzhiyun clock-frequency = <54000000>; 164*4882a593Smuzhiyun hactive = <1024>; 165*4882a593Smuzhiyun vactive = <600>; 166*4882a593Smuzhiyun hback-porch = <134>; 167*4882a593Smuzhiyun hfront-porch = <134>; 168*4882a593Smuzhiyun vback-porch = <10>; 169*4882a593Smuzhiyun vfront-porch = <10>; 170*4882a593Smuzhiyun hsync-len = <134>; 171*4882a593Smuzhiyun vsync-len = <10>; 172*4882a593Smuzhiyun hsync-active = <0>; 173*4882a593Smuzhiyun vsync-active = <0>; 174*4882a593Smuzhiyun de-active = <0>; 175*4882a593Smuzhiyun pixelclk-active = <0>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun port { 180*4882a593Smuzhiyun panel_in_lvds: endpoint { 181*4882a593Smuzhiyun remote-endpoint = <&lvds_out_panel>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&firmware_android { 188*4882a593Smuzhiyun compatible = "android,firmware"; 189*4882a593Smuzhiyun fstab { 190*4882a593Smuzhiyun compatible = "android,fstab"; 191*4882a593Smuzhiyun system { 192*4882a593Smuzhiyun compatible = "android,system"; 193*4882a593Smuzhiyun dev = "/dev/block/by-name/system"; 194*4882a593Smuzhiyun type = "ext4"; 195*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 196*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun vendor { 199*4882a593Smuzhiyun compatible = "android,vendor"; 200*4882a593Smuzhiyun dev = "/dev/block/by-name/vendor"; 201*4882a593Smuzhiyun type = "ext4"; 202*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 203*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&emmc { 209*4882a593Smuzhiyun status = "okay"; 210*4882a593Smuzhiyun bus-width = <8>; 211*4882a593Smuzhiyun cap-mmc-highspeed; 212*4882a593Smuzhiyun mmc-hs200-1_8v; 213*4882a593Smuzhiyun no-sdio; 214*4882a593Smuzhiyun no-sd; 215*4882a593Smuzhiyun disable-wp; 216*4882a593Smuzhiyun non-removable; 217*4882a593Smuzhiyun num-slots = <1>; 218*4882a593Smuzhiyun pinctrl-names = "default"; 219*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 220*4882a593Smuzhiyun}; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun&sdmmc { 223*4882a593Smuzhiyun status = "okay"; 224*4882a593Smuzhiyun clock-frequency = <37500000>; 225*4882a593Smuzhiyun clock-freq-min-max = <400000 37500000>; 226*4882a593Smuzhiyun no-sdio; 227*4882a593Smuzhiyun no-mmc; 228*4882a593Smuzhiyun cap-mmc-highspeed; 229*4882a593Smuzhiyun cap-sd-highspeed; 230*4882a593Smuzhiyun card-detect-delay = <200>; 231*4882a593Smuzhiyun disable-wp; 232*4882a593Smuzhiyun num-slots = <1>; 233*4882a593Smuzhiyun pinctrl-names = "default"; 234*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 235*4882a593Smuzhiyun}; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun&i2c0 { 238*4882a593Smuzhiyun status = "okay"; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun syr827: syr827@40 { 241*4882a593Smuzhiyun compatible = "silergy,syr827"; 242*4882a593Smuzhiyun reg = <0x40>; 243*4882a593Smuzhiyun status = "okay"; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 246*4882a593Smuzhiyun regulator-name = "vdd_arm"; 247*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 248*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 249*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 250*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 251*4882a593Smuzhiyun regulator-always-on; 252*4882a593Smuzhiyun regulator-boot-on; 253*4882a593Smuzhiyun regulator-initial-state = <3>; 254*4882a593Smuzhiyun regulator-state-mem { 255*4882a593Smuzhiyun regulator-off-in-suspend; 256*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun rk818: pmic@1c { 261*4882a593Smuzhiyun compatible = "rockchip,rk818"; 262*4882a593Smuzhiyun reg = <0x1c>; 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun clock-output-names = "rk818-clkout1", "wifibt_32kin"; 266*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 267*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 268*4882a593Smuzhiyun pinctrl-names = "default"; 269*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 270*4882a593Smuzhiyun rockchip,system-power-controller; 271*4882a593Smuzhiyun wakeup-source; 272*4882a593Smuzhiyun #clock-cells = <1>; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 275*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 276*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 277*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 278*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 279*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 280*4882a593Smuzhiyun vcc8-supply = <&vcc_sys>; 281*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun regulators { 284*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 285*4882a593Smuzhiyun regulator-name = "vdd_logic"; 286*4882a593Smuzhiyun regulator-always-on; 287*4882a593Smuzhiyun regulator-boot-on; 288*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 289*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 290*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 291*4882a593Smuzhiyun regulator-state-mem { 292*4882a593Smuzhiyun regulator-on-in-suspend; 293*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 298*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 299*4882a593Smuzhiyun regulator-always-on; 300*4882a593Smuzhiyun regulator-boot-on; 301*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 302*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 303*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 304*4882a593Smuzhiyun regulator-state-mem { 305*4882a593Smuzhiyun regulator-on-in-suspend; 306*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 311*4882a593Smuzhiyun regulator-always-on; 312*4882a593Smuzhiyun regulator-boot-on; 313*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 314*4882a593Smuzhiyun regulator-state-mem { 315*4882a593Smuzhiyun regulator-on-in-suspend; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 320*4882a593Smuzhiyun regulator-always-on; 321*4882a593Smuzhiyun regulator-boot-on; 322*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 323*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 324*4882a593Smuzhiyun regulator-name = "vcc_io"; 325*4882a593Smuzhiyun regulator-state-mem { 326*4882a593Smuzhiyun regulator-on-in-suspend; 327*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun vcca_codec: LDO_REG1 { 332*4882a593Smuzhiyun regulator-always-on; 333*4882a593Smuzhiyun regulator-boot-on; 334*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 335*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 336*4882a593Smuzhiyun regulator-name = "vcca_codec"; 337*4882a593Smuzhiyun regulator-state-mem { 338*4882a593Smuzhiyun regulator-on-in-suspend; 339*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun vcc_tp: LDO_REG2 { 344*4882a593Smuzhiyun regulator-boot-on; 345*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 346*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 347*4882a593Smuzhiyun regulator-name = "vcc_tp"; 348*4882a593Smuzhiyun regulator-state-mem { 349*4882a593Smuzhiyun regulator-off-in-suspend; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun vdd_10: LDO_REG3 { 354*4882a593Smuzhiyun regulator-always-on; 355*4882a593Smuzhiyun regulator-boot-on; 356*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 357*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 358*4882a593Smuzhiyun regulator-name = "vdd_10"; 359*4882a593Smuzhiyun regulator-state-mem { 360*4882a593Smuzhiyun regulator-on-in-suspend; 361*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun vcc18_lcd: LDO_REG4 { 366*4882a593Smuzhiyun regulator-always-on; 367*4882a593Smuzhiyun regulator-boot-on; 368*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 369*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 370*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 371*4882a593Smuzhiyun regulator-state-mem { 372*4882a593Smuzhiyun regulator-on-in-suspend; 373*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun vccio_pmu: LDO_REG5 { 378*4882a593Smuzhiyun regulator-always-on; 379*4882a593Smuzhiyun regulator-boot-on; 380*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 381*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 382*4882a593Smuzhiyun regulator-name = "vccio_pmu"; 383*4882a593Smuzhiyun regulator-state-mem { 384*4882a593Smuzhiyun regulator-on-in-suspend; 385*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 390*4882a593Smuzhiyun regulator-always-on; 391*4882a593Smuzhiyun regulator-boot-on; 392*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 393*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 394*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 395*4882a593Smuzhiyun regulator-state-mem { 396*4882a593Smuzhiyun regulator-on-in-suspend; 397*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun vcc_18: LDO_REG7 { 402*4882a593Smuzhiyun regulator-always-on; 403*4882a593Smuzhiyun regulator-boot-on; 404*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 405*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 406*4882a593Smuzhiyun regulator-name = "vcc_18"; 407*4882a593Smuzhiyun regulator-state-mem { 408*4882a593Smuzhiyun regulator-on-in-suspend; 409*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun vccio_wl: LDO_REG8 { 414*4882a593Smuzhiyun regulator-always-on; 415*4882a593Smuzhiyun regulator-boot-on; 416*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 417*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 418*4882a593Smuzhiyun regulator-name = "vccio_wl"; 419*4882a593Smuzhiyun regulator-state-mem { 420*4882a593Smuzhiyun regulator-on-in-suspend; 421*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun vccio_sd: LDO_REG9 { 426*4882a593Smuzhiyun regulator-always-on; 427*4882a593Smuzhiyun regulator-boot-on; 428*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 429*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 430*4882a593Smuzhiyun regulator-name = "vccio_sd"; 431*4882a593Smuzhiyun regulator-state-mem { 432*4882a593Smuzhiyun regulator-on-in-suspend; 433*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun vcc_sd: SWITCH_REG { 438*4882a593Smuzhiyun regulator-always-on; 439*4882a593Smuzhiyun regulator-boot-on; 440*4882a593Smuzhiyun regulator-name = "vcc_sd"; 441*4882a593Smuzhiyun regulator-state-mem { 442*4882a593Smuzhiyun regulator-on-in-suspend; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun boost_otg: DCDC_BOOST { 447*4882a593Smuzhiyun regulator-name = "boost_otg"; 448*4882a593Smuzhiyun regulator-always-on; 449*4882a593Smuzhiyun regulator-boot-on; 450*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 451*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 452*4882a593Smuzhiyun regulator-state-mem { 453*4882a593Smuzhiyun regulator-on-in-suspend; 454*4882a593Smuzhiyun regulator-suspend-microvolt = <5000000>; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun}; 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun&cpu_l0 { 462*4882a593Smuzhiyun cpu-supply = <&syr827>; 463*4882a593Smuzhiyun}; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun&cpu_l1 { 466*4882a593Smuzhiyun cpu-supply = <&syr827>; 467*4882a593Smuzhiyun}; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun&cpu_l2 { 470*4882a593Smuzhiyun cpu-supply = <&syr827>; 471*4882a593Smuzhiyun}; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun&cpu_l3 { 474*4882a593Smuzhiyun cpu-supply = <&syr827>; 475*4882a593Smuzhiyun}; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun&cpu_b0 { 478*4882a593Smuzhiyun cpu-supply = <&syr827>; 479*4882a593Smuzhiyun}; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun&cpu_b1 { 482*4882a593Smuzhiyun cpu-supply = <&syr827>; 483*4882a593Smuzhiyun}; 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun&cpu_b2 { 486*4882a593Smuzhiyun cpu-supply = <&syr827>; 487*4882a593Smuzhiyun}; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun&cpu_b3 { 490*4882a593Smuzhiyun cpu-supply = <&syr827>; 491*4882a593Smuzhiyun}; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun&gpu { 494*4882a593Smuzhiyun logic-supply = <&vdd_logic>; 495*4882a593Smuzhiyun}; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun&i2c1 { 498*4882a593Smuzhiyun status = "okay"; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun rt5640: rt5640@1c { 501*4882a593Smuzhiyun compatible = "realtek,rt5640"; 502*4882a593Smuzhiyun reg = <0x1c>; 503*4882a593Smuzhiyun #sound-dai-cells = <0>; 504*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_8CH_OUT>; 505*4882a593Smuzhiyun clock-names = "mclk"; 506*4882a593Smuzhiyun pinctrl-names = "default"; 507*4882a593Smuzhiyun pinctrl-0 = <&i2s_8ch_mclk>; 508*4882a593Smuzhiyun realtek,in1-differential; 509*4882a593Smuzhiyun status = "okay"; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&i2c2 { 514*4882a593Smuzhiyun status = "okay"; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun gt9xx: gt9xx@14 { 517*4882a593Smuzhiyun compatible = "goodix,gt9xx"; 518*4882a593Smuzhiyun reg = <0x14>; 519*4882a593Smuzhiyun touch-gpio = <&gpio0 12 IRQ_TYPE_LEVEL_LOW>; 520*4882a593Smuzhiyun reset-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; 521*4882a593Smuzhiyun max-x = <1200>; 522*4882a593Smuzhiyun max-y = <1900>; 523*4882a593Smuzhiyun tp-size = <911>; 524*4882a593Smuzhiyun tp-supply = <&vcc_tp>; 525*4882a593Smuzhiyun status = "okay"; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun}; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun&i2s_8ch { 530*4882a593Smuzhiyun status = "okay"; 531*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 532*4882a593Smuzhiyun rockchip,playback-channels = <8>; 533*4882a593Smuzhiyun rockchip,capture-channels = <2>; 534*4882a593Smuzhiyun #sound-dai-cells = <0>; 535*4882a593Smuzhiyun}; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun&io_domains { 538*4882a593Smuzhiyun status = "okay"; 539*4882a593Smuzhiyun dvp-supply = <&vcc_18>; 540*4882a593Smuzhiyun audio-supply = <&vcc_io>; 541*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 542*4882a593Smuzhiyun gpio1830-supply = <&vcc_io>; 543*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 544*4882a593Smuzhiyun wifi-supply = <&vccio_wl>; 545*4882a593Smuzhiyun}; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun&pmu_io_domains { 548*4882a593Smuzhiyun status = "okay"; 549*4882a593Smuzhiyun pmu-supply = <&vcc_io>; 550*4882a593Smuzhiyun vop-supply = <&vcc_io>; 551*4882a593Smuzhiyun}; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun&pwm0 { 554*4882a593Smuzhiyun status = "okay"; 555*4882a593Smuzhiyun}; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun&u2phy { 558*4882a593Smuzhiyun status = "okay"; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun u2phy_host: host-port { 561*4882a593Smuzhiyun phy-supply = <&vcc_host>; 562*4882a593Smuzhiyun status = "okay"; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun}; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun&usb_host0_ehci { 567*4882a593Smuzhiyun status = "okay"; 568*4882a593Smuzhiyun}; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun&usb_host0_ohci { 571*4882a593Smuzhiyun status = "okay"; 572*4882a593Smuzhiyun}; 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun&mailbox { 575*4882a593Smuzhiyun status = "okay"; 576*4882a593Smuzhiyun}; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun&mailbox_scpi { 579*4882a593Smuzhiyun status = "okay"; 580*4882a593Smuzhiyun}; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun&lvds { 583*4882a593Smuzhiyun status = "okay"; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun ports { 586*4882a593Smuzhiyun port@1 { 587*4882a593Smuzhiyun reg = <1>; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun lvds_out_panel: endpoint { 590*4882a593Smuzhiyun remote-endpoint = <&panel_in_lvds>; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&route_lvds { 598*4882a593Smuzhiyun status = "okay"; 599*4882a593Smuzhiyun}; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun&saradc { 602*4882a593Smuzhiyun status = "okay"; 603*4882a593Smuzhiyun}; 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun&tsadc { 606*4882a593Smuzhiyun tsadc-supply = <&syr827>; 607*4882a593Smuzhiyun status = "okay"; 608*4882a593Smuzhiyun}; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun&hdmi { 611*4882a593Smuzhiyun status = "okay"; 612*4882a593Smuzhiyun}; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun&pinctrl { 615*4882a593Smuzhiyun pmic { 616*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 617*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 618*4882a593Smuzhiyun }; 619*4882a593Smuzhiyun }; 620*4882a593Smuzhiyun 621*4882a593Smuzhiyun usb2 { 622*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 623*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun}; 627