xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3368-r88.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rk3368.dtsi"
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Rockchip R88";
12*4882a593Smuzhiyun	compatible = "rockchip,r88", "rockchip,rk3368";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = "serial2:115200n8";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	memory {
19*4882a593Smuzhiyun		device_type = "memory";
20*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x40000000>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
24*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
25*4882a593Smuzhiyun		pinctrl-0 = <&emmc_reset>;
26*4882a593Smuzhiyun		pinctrl-names = "default";
27*4882a593Smuzhiyun		reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	keys: gpio-keys {
31*4882a593Smuzhiyun		compatible = "gpio-keys";
32*4882a593Smuzhiyun		pinctrl-names = "default";
33*4882a593Smuzhiyun		pinctrl-0 = <&pwr_key>;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		power {
36*4882a593Smuzhiyun			wakeup-source;
37*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
38*4882a593Smuzhiyun			label = "GPIO Power";
39*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	leds: gpio-leds {
44*4882a593Smuzhiyun		compatible = "gpio-leds";
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		work_led: led-0 {
47*4882a593Smuzhiyun			gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
48*4882a593Smuzhiyun			label = "r88:green:led";
49*4882a593Smuzhiyun			pinctrl-names = "default";
50*4882a593Smuzhiyun			pinctrl-0 = <&led_ctl>;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	ir: ir-receiver {
55*4882a593Smuzhiyun		compatible = "gpio-ir-receiver";
56*4882a593Smuzhiyun		gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
57*4882a593Smuzhiyun		pinctrl-names = "default";
58*4882a593Smuzhiyun		pinctrl-0 = <&ir_int>;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
62*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
63*4882a593Smuzhiyun		clocks = <&hym8563>;
64*4882a593Smuzhiyun		clock-names = "ext_clock";
65*4882a593Smuzhiyun		pinctrl-names = "default";
66*4882a593Smuzhiyun		pinctrl-0 = <&bt_rst>, <&wifi_reg_on>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		reset-gpios =
69*4882a593Smuzhiyun			/* BT_RST_N */
70*4882a593Smuzhiyun			<&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun			/* WL_REG_ON */
73*4882a593Smuzhiyun			<&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	vcc_18: vcc18-regulator {
77*4882a593Smuzhiyun		compatible = "regulator-fixed";
78*4882a593Smuzhiyun		regulator-name = "vcc_18";
79*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
80*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
81*4882a593Smuzhiyun		regulator-always-on;
82*4882a593Smuzhiyun		regulator-boot-on;
83*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	/* supplies both host and otg */
87*4882a593Smuzhiyun	vcc_host: vcc-host-regulator {
88*4882a593Smuzhiyun		compatible = "regulator-fixed";
89*4882a593Smuzhiyun		enable-active-high;
90*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
91*4882a593Smuzhiyun		pinctrl-names = "default";
92*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
93*4882a593Smuzhiyun		regulator-name = "vcc_host";
94*4882a593Smuzhiyun		regulator-always-on;
95*4882a593Smuzhiyun		regulator-boot-on;
96*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	vcc_io: vcc-io-regulator {
100*4882a593Smuzhiyun		compatible = "regulator-fixed";
101*4882a593Smuzhiyun		regulator-name = "vcc_io";
102*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
103*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
104*4882a593Smuzhiyun		regulator-always-on;
105*4882a593Smuzhiyun		regulator-boot-on;
106*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	vcc_lan: vcc-lan-regulator {
110*4882a593Smuzhiyun		compatible = "regulator-fixed";
111*4882a593Smuzhiyun		regulator-name = "vcc_lan";
112*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
113*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
114*4882a593Smuzhiyun		regulator-always-on;
115*4882a593Smuzhiyun		regulator-boot-on;
116*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	vcc_sys: vcc-sys-regulator {
120*4882a593Smuzhiyun		compatible = "regulator-fixed";
121*4882a593Smuzhiyun		regulator-name = "vcc_sys";
122*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
123*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
124*4882a593Smuzhiyun		regulator-always-on;
125*4882a593Smuzhiyun		regulator-boot-on;
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	vccio_wl: vccio-wl-regulator {
129*4882a593Smuzhiyun		compatible = "regulator-fixed";
130*4882a593Smuzhiyun		regulator-name = "vccio_wl";
131*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
132*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
133*4882a593Smuzhiyun		regulator-always-on;
134*4882a593Smuzhiyun		regulator-boot-on;
135*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
136*4882a593Smuzhiyun	};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun	vdd_10: vdd-10-regulator {
139*4882a593Smuzhiyun		compatible = "regulator-fixed";
140*4882a593Smuzhiyun		regulator-name = "vdd_10";
141*4882a593Smuzhiyun		regulator-min-microvolt = <1000000>;
142*4882a593Smuzhiyun		regulator-max-microvolt = <1000000>;
143*4882a593Smuzhiyun		regulator-always-on;
144*4882a593Smuzhiyun		regulator-boot-on;
145*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun&emmc {
150*4882a593Smuzhiyun	bus-width = <8>;
151*4882a593Smuzhiyun	cap-mmc-highspeed;
152*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
153*4882a593Smuzhiyun	non-removable;
154*4882a593Smuzhiyun	pinctrl-names = "default";
155*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
156*4882a593Smuzhiyun	status = "okay";
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun&gmac {
160*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
161*4882a593Smuzhiyun	phy-mode = "rmii";
162*4882a593Smuzhiyun	clock_in_out = "output";
163*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
164*4882a593Smuzhiyun	snps,reset-active-low;
165*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 1000000>;
166*4882a593Smuzhiyun	pinctrl-names = "default";
167*4882a593Smuzhiyun	pinctrl-0 = <&rmii_pins>;
168*4882a593Smuzhiyun	tx_delay = <0x30>;
169*4882a593Smuzhiyun	rx_delay = <0x10>;
170*4882a593Smuzhiyun	status = "okay";
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&i2c0 {
174*4882a593Smuzhiyun	status = "okay";
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
177*4882a593Smuzhiyun		compatible = "silergy,syr827";
178*4882a593Smuzhiyun		reg = <0x40>;
179*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
180*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
181*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
182*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
183*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
184*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
185*4882a593Smuzhiyun		regulator-always-on;
186*4882a593Smuzhiyun		regulator-boot-on;
187*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun	hym8563: hym8563@51 {
191*4882a593Smuzhiyun		compatible = "haoyu,hym8563";
192*4882a593Smuzhiyun		reg = <0x51>;
193*4882a593Smuzhiyun		#clock-cells = <0>;
194*4882a593Smuzhiyun		clock-frequency = <32768>;
195*4882a593Smuzhiyun		clock-output-names = "xin32k";
196*4882a593Smuzhiyun		/* rtc_int is not connected */
197*4882a593Smuzhiyun	};
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&io_domains {
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
204*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
205*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
206*4882a593Smuzhiyun	wifi-supply = <&vccio_wl>;
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&sdio0 {
210*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_SDIO0>;
211*4882a593Smuzhiyun	assigned-clock-parents = <&cru PLL_CPLL>;
212*4882a593Smuzhiyun	bus-width = <4>;
213*4882a593Smuzhiyun	cap-sd-highspeed;
214*4882a593Smuzhiyun	cap-sdio-irq;
215*4882a593Smuzhiyun	keep-power-in-suspend;
216*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
217*4882a593Smuzhiyun	non-removable;
218*4882a593Smuzhiyun	pinctrl-names = "default";
219*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
220*4882a593Smuzhiyun	vmmc-supply = <&vcc_io>;
221*4882a593Smuzhiyun	vqmmc-supply = <&vccio_wl>;
222*4882a593Smuzhiyun	status = "okay";
223*4882a593Smuzhiyun};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun&pinctrl {
226*4882a593Smuzhiyun	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
227*4882a593Smuzhiyun		bias-disable;
228*4882a593Smuzhiyun		drive-strength = <8>;
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
232*4882a593Smuzhiyun		bias-pull-up;
233*4882a593Smuzhiyun		drive-strength = <8>;
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun	emmc {
237*4882a593Smuzhiyun		emmc_bus8: emmc-bus8 {
238*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>,
239*4882a593Smuzhiyun					<1 RK_PC3 2 &pcfg_pull_up_drv_8ma>,
240*4882a593Smuzhiyun					<1 RK_PC4 2 &pcfg_pull_up_drv_8ma>,
241*4882a593Smuzhiyun					<1 RK_PC5 2 &pcfg_pull_up_drv_8ma>,
242*4882a593Smuzhiyun					<1 RK_PC6 2 &pcfg_pull_up_drv_8ma>,
243*4882a593Smuzhiyun					<1 RK_PC7 2 &pcfg_pull_up_drv_8ma>,
244*4882a593Smuzhiyun					<1 RK_PD0 2 &pcfg_pull_up_drv_8ma>,
245*4882a593Smuzhiyun					<1 RK_PD1 2 &pcfg_pull_up_drv_8ma>;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun		emmc-clk {
249*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>;
250*4882a593Smuzhiyun		};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		emmc-cmd {
253*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>;
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun		emmc_reset: emmc-reset {
257*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun	ir {
262*4882a593Smuzhiyun		ir_int: ir-int {
263*4882a593Smuzhiyun			rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
264*4882a593Smuzhiyun		};
265*4882a593Smuzhiyun	};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun	keys {
268*4882a593Smuzhiyun		pwr_key: pwr-key {
269*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun	leds {
274*4882a593Smuzhiyun		stby_pwren: stby-pwren {
275*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
276*4882a593Smuzhiyun		};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun		led_ctl: led-ctl {
279*4882a593Smuzhiyun			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
280*4882a593Smuzhiyun		};
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun	sdio {
284*4882a593Smuzhiyun		wifi_reg_on: wifi-reg-on {
285*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun		bt_rst: bt-rst {
289*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
290*4882a593Smuzhiyun		};
291*4882a593Smuzhiyun	};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun	usb {
294*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
295*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun&pmu_io_domains {
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	pmu-supply = <&vcc_io>;
304*4882a593Smuzhiyun	vop-supply = <&vcc_io>;
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&saradc {
308*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
309*4882a593Smuzhiyun	status = "okay";
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&tsadc {
313*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
314*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
315*4882a593Smuzhiyun	status = "okay";
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&uart2 {
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun&usb_host0_ehci {
323*4882a593Smuzhiyun	status = "okay";
324*4882a593Smuzhiyun};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun&usb_otg {
327*4882a593Smuzhiyun	dr_mode = "host";
328*4882a593Smuzhiyun	status = "okay";
329*4882a593Smuzhiyun};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun&wdt {
332*4882a593Smuzhiyun	status = "okay";
333*4882a593Smuzhiyun};
334