1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "rk3368.dtsi" 9*4882a593Smuzhiyun#include "rk3368-android.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Rockchip R88"; 14*4882a593Smuzhiyun compatible = "rockchip,r88", "rockchip,rk3368"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 17*4882a593Smuzhiyun status = "okay"; 18*4882a593Smuzhiyun compatible = "simple-audio-card"; 19*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 20*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 21*4882a593Smuzhiyun simple-audio-card,name = "rockchip,hdmi"; 22*4882a593Smuzhiyun simple-audio-card,cpu { 23*4882a593Smuzhiyun sound-dai = <&i2s_8ch>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun simple-audio-card,codec { 26*4882a593Smuzhiyun sound-dai = <&hdmi>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun keys: gpio-keys { 31*4882a593Smuzhiyun compatible = "gpio-keys"; 32*4882a593Smuzhiyun #address-cells = <1>; 33*4882a593Smuzhiyun #size-cells = <0>; 34*4882a593Smuzhiyun pinctrl-names = "default"; 35*4882a593Smuzhiyun pinctrl-0 = <&pwr_key>; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun button@0 { 38*4882a593Smuzhiyun gpio-key,wakeup = <1>; 39*4882a593Smuzhiyun gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 40*4882a593Smuzhiyun label = "GPIO Power"; 41*4882a593Smuzhiyun linux,code = <116>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun leds: gpio-leds { 46*4882a593Smuzhiyun compatible = "gpio-leds"; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun work { 49*4882a593Smuzhiyun gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>; 50*4882a593Smuzhiyun label = "r88:green:led"; 51*4882a593Smuzhiyun pinctrl-names = "default"; 52*4882a593Smuzhiyun pinctrl-0 = <&led_ctl>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun ir: ir-receiver { 57*4882a593Smuzhiyun compatible = "gpio-ir-receiver"; 58*4882a593Smuzhiyun gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; 59*4882a593Smuzhiyun pinctrl-names = "default"; 60*4882a593Smuzhiyun pinctrl-0 = <&ir_int>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun vcc_sys: vcc-sys { 64*4882a593Smuzhiyun compatible = "regulator-fixed"; 65*4882a593Smuzhiyun regulator-name = "vcc_sys"; 66*4882a593Smuzhiyun regulator-always-on; 67*4882a593Smuzhiyun regulator-boot-on; 68*4882a593Smuzhiyun regulator-min-microvolt = <3800000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <3800000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun vcc_host: vcc-host { 73*4882a593Smuzhiyun compatible = "regulator-fixed"; 74*4882a593Smuzhiyun enable-active-high; 75*4882a593Smuzhiyun gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 78*4882a593Smuzhiyun regulator-name = "vcc_host"; 79*4882a593Smuzhiyun regulator-always-on; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 83*4882a593Smuzhiyun compatible = "regulator-fixed"; 84*4882a593Smuzhiyun regulator-name = "vcc_phy"; 85*4882a593Smuzhiyun regulator-always-on; 86*4882a593Smuzhiyun regulator-boot-on; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun regulators { 90*4882a593Smuzhiyun compatible = "simple-bus"; 91*4882a593Smuzhiyun #address-cells = <1>; 92*4882a593Smuzhiyun #size-cells = <0>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun vccio_1v8_reg: regulator@0 { 95*4882a593Smuzhiyun compatible = "regulator-fixed"; 96*4882a593Smuzhiyun regulator-name = "vccio_1v8"; 97*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 98*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 99*4882a593Smuzhiyun regulator-always-on; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun vccio_3v3_reg: regulator@1 { 103*4882a593Smuzhiyun compatible = "regulator-fixed"; 104*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 105*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 106*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 107*4882a593Smuzhiyun regulator-always-on; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun vdd_gpu: vdd-arm-regulator { 112*4882a593Smuzhiyun compatible = "pwm-regulator"; 113*4882a593Smuzhiyun rockchip,pwm_id = <1>; 114*4882a593Smuzhiyun rockchip,pwm_voltage = <1100000>; 115*4882a593Smuzhiyun pwms = <&pwm1 0 25000 1>; 116*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 117*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 118*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 119*4882a593Smuzhiyun regulator-always-on; 120*4882a593Smuzhiyun regulator-boot-on; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 124*4882a593Smuzhiyun compatible = "fixed-clock"; 125*4882a593Smuzhiyun clock-frequency = <125000000>; 126*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 127*4882a593Smuzhiyun #clock-cells = <0>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun wireless-wlan { 131*4882a593Smuzhiyun compatible = "wlan-platdata"; 132*4882a593Smuzhiyun rockchip,grf = <&grf>; 133*4882a593Smuzhiyun wifi_chip_type = "rtl8189es"; 134*4882a593Smuzhiyun sdio_vref = <1800>; 135*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>; 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun wireless-bluetooth { 140*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 141*4882a593Smuzhiyun //clocks = <&rk808 1>; 142*4882a593Smuzhiyun //clock-names = "ext_clock"; 143*4882a593Smuzhiyun /* wifi-bt-power-toggle; */ 144*4882a593Smuzhiyun uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 145*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 146*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 147*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 148*4882a593Smuzhiyun /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */ 149*4882a593Smuzhiyun BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 150*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; 151*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>; 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&firmware_android { 157*4882a593Smuzhiyun compatible = "android,firmware"; 158*4882a593Smuzhiyun fstab { 159*4882a593Smuzhiyun compatible = "android,fstab"; 160*4882a593Smuzhiyun system { 161*4882a593Smuzhiyun compatible = "android,system"; 162*4882a593Smuzhiyun dev = "/dev/block/by-name/system"; 163*4882a593Smuzhiyun type = "ext4"; 164*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 165*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun vendor { 168*4882a593Smuzhiyun compatible = "android,vendor"; 169*4882a593Smuzhiyun dev = "/dev/block/by-name/vendor"; 170*4882a593Smuzhiyun type = "ext4"; 171*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 172*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&i2s_8ch { 178*4882a593Smuzhiyun status = "okay"; 179*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 180*4882a593Smuzhiyun rockchip,playback-channels = <8>; 181*4882a593Smuzhiyun rockchip,capture-channels = <2>; 182*4882a593Smuzhiyun #sound-dai-cells = <0>; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&emmc { 186*4882a593Smuzhiyun status = "okay"; 187*4882a593Smuzhiyun bus-width = <8>; 188*4882a593Smuzhiyun cap-mmc-highspeed; 189*4882a593Smuzhiyun mmc-hs200-1_8v; 190*4882a593Smuzhiyun no-sdio; 191*4882a593Smuzhiyun no-sd; 192*4882a593Smuzhiyun disable-wp; 193*4882a593Smuzhiyun non-removable; 194*4882a593Smuzhiyun num-slots = <1>; 195*4882a593Smuzhiyun pinctrl-names = "default"; 196*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&sdmmc { 200*4882a593Smuzhiyun status = "disabled"; 201*4882a593Smuzhiyun clock-frequency = <37500000>; 202*4882a593Smuzhiyun clock-freq-min-max = <400000 37500000>; 203*4882a593Smuzhiyun no-sdio; 204*4882a593Smuzhiyun no-mmc; 205*4882a593Smuzhiyun cap-mmc-highspeed; 206*4882a593Smuzhiyun cap-sd-highspeed; 207*4882a593Smuzhiyun card-detect-delay = <200>; 208*4882a593Smuzhiyun disable-wp; 209*4882a593Smuzhiyun num-slots = <1>; 210*4882a593Smuzhiyun pinctrl-names = "default"; 211*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 212*4882a593Smuzhiyun}; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun&gmac { 215*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 216*4882a593Smuzhiyun phy-mode = "rmii"; 217*4882a593Smuzhiyun clock_in_out = "output"; 218*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 12 0>; 219*4882a593Smuzhiyun snps,reset-active-low; 220*4882a593Smuzhiyun snps,reset-delays-us = <0 50000 50000>; 221*4882a593Smuzhiyun //assigned-clocks = <&cru SCLK_RMII_SRC>; 222*4882a593Smuzhiyun //assigned-clock-parents = <&clkin_gmac>; 223*4882a593Smuzhiyun pinctrl-names = "default"; 224*4882a593Smuzhiyun pinctrl-0 = <&rmii_pins>; 225*4882a593Smuzhiyun tx_delay = <0x30>; 226*4882a593Smuzhiyun rx_delay = <0x10>; 227*4882a593Smuzhiyun status = "ok"; 228*4882a593Smuzhiyun}; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun&pwm1 { 231*4882a593Smuzhiyun status = "okay"; 232*4882a593Smuzhiyun pinctrl-names = "active"; 233*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_down>; 234*4882a593Smuzhiyun}; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun&i2c0 { 237*4882a593Smuzhiyun status = "okay"; 238*4882a593Smuzhiyun clock-frequency = <100000>; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun vdd_cpu: syr827@40 { 241*4882a593Smuzhiyun compatible = "silergy,syr827"; 242*4882a593Smuzhiyun reg = <0x40>; 243*4882a593Smuzhiyun status = "okay"; 244*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 245*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 246*4882a593Smuzhiyun pinctrl-names = "default"; 247*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 248*4882a593Smuzhiyun vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 249*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 250*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 251*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 252*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 253*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 254*4882a593Smuzhiyun regulator-always-on; 255*4882a593Smuzhiyun regulator-boot-on; 256*4882a593Smuzhiyun regulator-initial-state = <3>; 257*4882a593Smuzhiyun regulator-state-mem { 258*4882a593Smuzhiyun regulator-off-in-suspend; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun/* xz3215: xz3215@40 { 263*4882a593Smuzhiyun compatible = "xz3216"; 264*4882a593Smuzhiyun reg = <0x40>; 265*4882a593Smuzhiyun status = "disabled"; 266*4882a593Smuzhiyun pinctrl-names = "default"; 267*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 268*4882a593Smuzhiyun vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 269*4882a593Smuzhiyun regulators { 270*4882a593Smuzhiyun #address-cells = <1>; 271*4882a593Smuzhiyun #size-cells = <0>; 272*4882a593Smuzhiyun vdd_cpu: regulator@0 { 273*4882a593Smuzhiyun reg = <0>; 274*4882a593Smuzhiyun regulator-compatible = "xz_dcdc1"; 275*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 276*4882a593Smuzhiyun regulator-min-microvolt = <603000>; 277*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 278*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 279*4882a593Smuzhiyun regulator-always-on; 280*4882a593Smuzhiyun regulator-boot-on; 281*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 282*4882a593Smuzhiyun //regulator-initial-mode = <0x1>; 283*4882a593Smuzhiyun regulator-initial-state = <3>; 284*4882a593Smuzhiyun regulator-state-mem { 285*4882a593Smuzhiyun regulator-off-in-suspend; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun*/ 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun hym8563: hym8563@51 { 293*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 294*4882a593Smuzhiyun reg = <0x51>; 295*4882a593Smuzhiyun #clock-cells = <0>; 296*4882a593Smuzhiyun clock-frequency = <32768>; 297*4882a593Smuzhiyun clock-output-names = "xin32k"; 298*4882a593Smuzhiyun /* rtc_int is not connected */ 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&io_domains { 303*4882a593Smuzhiyun status = "ok"; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun dvp-supply = <&vccio_1v8_reg>; /* DVPIO_VDD */ 306*4882a593Smuzhiyun /*flash0-supply = <&vcc18_flash>;*/ /* FLASH0_VDD (emmc) */ 307*4882a593Smuzhiyun sdcard-supply = <&vccio_3v3_reg>; /* SDMMC0_VDD (sdmmc) */ 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun audio-supply = <&vccio_3v3_reg>; /* APIO3_VDD */ 310*4882a593Smuzhiyun gpio30-supply = <&vccio_3v3_reg>; /* APIO1_VDD */ 311*4882a593Smuzhiyun gpio1830-supply = <&vccio_3v3_reg>; /* APIO4_VDD (gpujtag) */ 312*4882a593Smuzhiyun wifi-supply = <&vccio_3v3_reg>; /* APIO2_VDD (sdio0) */ 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&sdio0 { 316*4882a593Smuzhiyun bus-width = <4>; 317*4882a593Smuzhiyun cap-sd-highspeed; 318*4882a593Smuzhiyun cap-sdio-irq; 319*4882a593Smuzhiyun keep-power-in-suspend; 320*4882a593Smuzhiyun max-frequency = <100000000>; 321*4882a593Smuzhiyun non-removable; 322*4882a593Smuzhiyun num-slots = <1>; 323*4882a593Smuzhiyun pinctrl-names = "default"; 324*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 325*4882a593Smuzhiyun sd-uhs-sdr104; 326*4882a593Smuzhiyun no-sd; 327*4882a593Smuzhiyun no-mmc; 328*4882a593Smuzhiyun status = "okay"; 329*4882a593Smuzhiyun}; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun&pinctrl { 332*4882a593Smuzhiyun pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { 333*4882a593Smuzhiyun bias-disable; 334*4882a593Smuzhiyun drive-strength = <8>; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { 338*4882a593Smuzhiyun bias-pull-up; 339*4882a593Smuzhiyun drive-strength = <8>; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun pmic { 343*4882a593Smuzhiyun pmic_int: pmic-int { 344*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun vsel1_gpio:vsel1_gpio{ 348*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun emmc { 353*4882a593Smuzhiyun emmc_bus8: emmc-bus8 { 354*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>, 355*4882a593Smuzhiyun <1 RK_PC3 2 &pcfg_pull_up_drv_8ma>, 356*4882a593Smuzhiyun <1 RK_PC4 2 &pcfg_pull_up_drv_8ma>, 357*4882a593Smuzhiyun <1 RK_PC5 2 &pcfg_pull_up_drv_8ma>, 358*4882a593Smuzhiyun <1 RK_PC6 2 &pcfg_pull_up_drv_8ma>, 359*4882a593Smuzhiyun <1 RK_PC7 2 &pcfg_pull_up_drv_8ma>, 360*4882a593Smuzhiyun <1 RK_PD0 2 &pcfg_pull_up_drv_8ma>, 361*4882a593Smuzhiyun <1 RK_PD1 2 &pcfg_pull_up_drv_8ma>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun emmc-clk { 365*4882a593Smuzhiyun rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun emmc-cmd { 369*4882a593Smuzhiyun rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun emmc_reset: emmc-reset { 373*4882a593Smuzhiyun rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun ir { 378*4882a593Smuzhiyun ir_int: ir-int { 379*4882a593Smuzhiyun rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun keys { 384*4882a593Smuzhiyun pwr_key: pwr-key { 385*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun leds { 390*4882a593Smuzhiyun stby_pwren: stby-pwren { 391*4882a593Smuzhiyun rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun led_ctl: led-ctl { 395*4882a593Smuzhiyun rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun sdio-pwrseq { 400*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 401*4882a593Smuzhiyun rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 402*4882a593Smuzhiyun }; 403*4882a593Smuzhiyun }; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun wireless-bluetooth { 406*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 407*4882a593Smuzhiyun rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun usb { 412*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 413*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 414*4882a593Smuzhiyun }; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun}; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun&pmu_io_domains { 419*4882a593Smuzhiyun status = "okay"; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun pmu-supply = <&vccio_3v3_reg>; 422*4882a593Smuzhiyun vop-supply = <&vccio_3v3_reg>; 423*4882a593Smuzhiyun}; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun&saradc { 426*4882a593Smuzhiyun vref-supply = <&vccio_1v8_reg>; 427*4882a593Smuzhiyun status = "okay"; 428*4882a593Smuzhiyun}; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun&uart2 { 431*4882a593Smuzhiyun status = "okay"; 432*4882a593Smuzhiyun}; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun&usb_host0_ehci { 435*4882a593Smuzhiyun status = "okay"; 436*4882a593Smuzhiyun}; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun&usb_host0_ohci { 439*4882a593Smuzhiyun status = "okay"; 440*4882a593Smuzhiyun}; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun&usb_otg { 443*4882a593Smuzhiyun dr_mode = "device"; 444*4882a593Smuzhiyun status = "okay"; 445*4882a593Smuzhiyun}; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun&u2phy { 448*4882a593Smuzhiyun status = "okay"; 449*4882a593Smuzhiyun}; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun&u2phy_host { 452*4882a593Smuzhiyun status = "okay"; 453*4882a593Smuzhiyun}; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun&wdt { 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun}; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun&route_hdmi { 460*4882a593Smuzhiyun status = "okay"; 461*4882a593Smuzhiyun}; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun&hdmi { 464*4882a593Smuzhiyun status = "okay"; 465*4882a593Smuzhiyun #sound-dai-cells = <0>; 466*4882a593Smuzhiyun}; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun&mailbox { 469*4882a593Smuzhiyun status = "okay"; 470*4882a593Smuzhiyun}; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun&mailbox_scpi { 473*4882a593Smuzhiyun status = "okay"; 474*4882a593Smuzhiyun}; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun&tsadc { 477*4882a593Smuzhiyun tsadc-supply = <&vdd_cpu>; 478*4882a593Smuzhiyun status = "okay"; 479*4882a593Smuzhiyun}; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun&cpu_l0 { 482*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 483*4882a593Smuzhiyun}; 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun&cpu_l1 { 486*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 487*4882a593Smuzhiyun}; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun&cpu_l2 { 490*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 491*4882a593Smuzhiyun}; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun&cpu_l3 { 494*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 495*4882a593Smuzhiyun}; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun&cpu_b0 { 498*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 499*4882a593Smuzhiyun}; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun&cpu_b1 { 502*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 503*4882a593Smuzhiyun}; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun&cpu_b2 { 506*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 507*4882a593Smuzhiyun}; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun&cpu_b3 { 510*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&gpu { 514*4882a593Smuzhiyun logic-supply = <&vdd_gpu>; 515*4882a593Smuzhiyun}; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun&rockchip_suspend { 518*4882a593Smuzhiyun status = "okay"; 519*4882a593Smuzhiyun rockchip,sleep-mode-config = < 520*4882a593Smuzhiyun (0 521*4882a593Smuzhiyun | RKPM_SLP_ARMOFF 522*4882a593Smuzhiyun | RKPM_SLP_PMU_PLLS_PWRDN 523*4882a593Smuzhiyun | RKPM_SLP_PMU_PMUALIVE_32K 524*4882a593Smuzhiyun | RKPM_SLP_SFT_PLLS_DEEP 525*4882a593Smuzhiyun | RKPM_SLP_PMU_DIS_OSC 526*4882a593Smuzhiyun | RKPM_SLP_SFT_PD_NBSCUS 527*4882a593Smuzhiyun ) 528*4882a593Smuzhiyun >; 529*4882a593Smuzhiyun rockchip,wakeup-config = < 530*4882a593Smuzhiyun (0 531*4882a593Smuzhiyun | RKPM_GPIO_WKUP_EN 532*4882a593Smuzhiyun | RKPM_USB_WKUP_EN 533*4882a593Smuzhiyun | RKPM_CLUSTER_L_WKUP_EN 534*4882a593Smuzhiyun ) 535*4882a593Smuzhiyun >; 536*4882a593Smuzhiyun}; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun&pwm3 { 539*4882a593Smuzhiyun status = "okay"; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 542*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 543*4882a593Smuzhiyun remote_pwm_id = <3>; 544*4882a593Smuzhiyun handle_cpu_id = <1>; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun ir_key1 { 547*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 548*4882a593Smuzhiyun rockchip,key_table = 549*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 550*4882a593Smuzhiyun <0xba KEY_BACK>, 551*4882a593Smuzhiyun <0xf4 KEY_UP>, 552*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 553*4882a593Smuzhiyun <0xef KEY_LEFT>, 554*4882a593Smuzhiyun <0xee KEY_RIGHT>, 555*4882a593Smuzhiyun <0xbd KEY_HOME>, 556*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 557*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 558*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 559*4882a593Smuzhiyun <0xb2 KEY_POWER>, 560*4882a593Smuzhiyun <0xbc KEY_MUTE>, 561*4882a593Smuzhiyun <0xec KEY_MENU>, 562*4882a593Smuzhiyun <0xbf 0x190>, 563*4882a593Smuzhiyun <0xe0 0x191>, 564*4882a593Smuzhiyun <0xe1 0x192>, 565*4882a593Smuzhiyun <0xe9 183>, 566*4882a593Smuzhiyun <0xe6 248>, 567*4882a593Smuzhiyun <0xe8 185>, 568*4882a593Smuzhiyun <0xe7 186>, 569*4882a593Smuzhiyun <0xf0 388>, 570*4882a593Smuzhiyun <0xbe 0x175>; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun ir_key2 { 574*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 575*4882a593Smuzhiyun rockchip,key_table = 576*4882a593Smuzhiyun <0xf9 KEY_HOME>, 577*4882a593Smuzhiyun <0xbf KEY_BACK>, 578*4882a593Smuzhiyun <0xfb KEY_MENU>, 579*4882a593Smuzhiyun <0xaa KEY_REPLY>, 580*4882a593Smuzhiyun <0xb9 KEY_UP>, 581*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 582*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 583*4882a593Smuzhiyun <0xea KEY_RIGHT>, 584*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 585*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 586*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 587*4882a593Smuzhiyun <0xe7 KEY_POWER>, 588*4882a593Smuzhiyun <0xfc KEY_POWER>, 589*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 590*4882a593Smuzhiyun <0xa8 KEY_VOLUMEDOWN>, 591*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 592*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 593*4882a593Smuzhiyun <0xab 183>, 594*4882a593Smuzhiyun <0xb7 388>, 595*4882a593Smuzhiyun <0xe8 388>, 596*4882a593Smuzhiyun <0xf8 184>, 597*4882a593Smuzhiyun <0xaf 185>, 598*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 599*4882a593Smuzhiyun <0xee 186>, 600*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 601*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 602*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 603*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 604*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 605*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 606*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 607*4882a593Smuzhiyun }; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun ir_key3 { 610*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 611*4882a593Smuzhiyun rockchip,key_table = 612*4882a593Smuzhiyun <0xee KEY_REPLY>, 613*4882a593Smuzhiyun <0xf0 KEY_BACK>, 614*4882a593Smuzhiyun <0xf8 KEY_UP>, 615*4882a593Smuzhiyun <0xbb KEY_DOWN>, 616*4882a593Smuzhiyun <0xef KEY_LEFT>, 617*4882a593Smuzhiyun <0xed KEY_RIGHT>, 618*4882a593Smuzhiyun <0xfc KEY_HOME>, 619*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 620*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 621*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 622*4882a593Smuzhiyun <0xff KEY_POWER>, 623*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 624*4882a593Smuzhiyun <0xbf KEY_MENU>, 625*4882a593Smuzhiyun <0xf9 0x191>, 626*4882a593Smuzhiyun <0xf5 0x192>, 627*4882a593Smuzhiyun <0xb3 388>, 628*4882a593Smuzhiyun <0xbe KEY_1>, 629*4882a593Smuzhiyun <0xba KEY_2>, 630*4882a593Smuzhiyun <0xb2 KEY_3>, 631*4882a593Smuzhiyun <0xbd KEY_4>, 632*4882a593Smuzhiyun <0xf9 KEY_5>, 633*4882a593Smuzhiyun <0xb1 KEY_6>, 634*4882a593Smuzhiyun <0xfc KEY_7>, 635*4882a593Smuzhiyun <0xf8 KEY_8>, 636*4882a593Smuzhiyun <0xb0 KEY_9>, 637*4882a593Smuzhiyun <0xb6 KEY_0>, 638*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 639*4882a593Smuzhiyun }; 640*4882a593Smuzhiyun}; 641