xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3368-px5-evb-android.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk3368.dtsi"
9*4882a593Smuzhiyun#include "rk3368-android.dtsi"
10*4882a593Smuzhiyun#include "rk3368-cif-sensor.dtsi"
11*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Rockchip PX5 EVB V11";
16*4882a593Smuzhiyun	compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen: chosen {
19*4882a593Smuzhiyun		bootargs = "earlycon=uart8250,mmio32,0xff1c0000 firmware_class.path=/system/vendor/firmware";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	fiq_debugger: fiq-debugger {
23*4882a593Smuzhiyun		compatible = "rockchip,fiq-debugger";
24*4882a593Smuzhiyun			rockchip,serial-id = <4>;
25*4882a593Smuzhiyun			rockchip,wake-irq = <0>;
26*4882a593Smuzhiyun			/* If enable uart uses irq instead of fiq */
27*4882a593Smuzhiyun			rockchip,irq-mode-enable = <0>;
28*4882a593Smuzhiyun			/* Only 115200 and 1500000 */
29*4882a593Smuzhiyun			rockchip,baudrate = <115200>;
30*4882a593Smuzhiyun			pinctrl-names = "default";
31*4882a593Smuzhiyun			pinctrl-0 = <&uart4_xfer>;
32*4882a593Smuzhiyun			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	firmware {
36*4882a593Smuzhiyun		android {
37*4882a593Smuzhiyun			compatible = "android,firmware";
38*4882a593Smuzhiyun			fstab {
39*4882a593Smuzhiyun				compatible = "android,fstab";
40*4882a593Smuzhiyun				system {
41*4882a593Smuzhiyun					compatible = "android,system";
42*4882a593Smuzhiyun					dev = "/dev/block/platform/ff0f0000.dwmmc/by-name/system";
43*4882a593Smuzhiyun					type = "ext4";
44*4882a593Smuzhiyun					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
45*4882a593Smuzhiyun					fsmgr_flags = "wait";
46*4882a593Smuzhiyun				};
47*4882a593Smuzhiyun				vendor {
48*4882a593Smuzhiyun					compatible = "android,vendor";
49*4882a593Smuzhiyun					dev = "/dev/block/platform/ff0f0000.dwmmc/by-name/vendor";
50*4882a593Smuzhiyun					type = "ext4";
51*4882a593Smuzhiyun					mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
52*4882a593Smuzhiyun					fsmgr_flags = "wait";
53*4882a593Smuzhiyun				};
54*4882a593Smuzhiyun			};
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	xin32k: xin32k {
59*4882a593Smuzhiyun		status = "okay";
60*4882a593Smuzhiyun		compatible = "pwm-clock";
61*4882a593Smuzhiyun		#clock-cells = <0>;
62*4882a593Smuzhiyun		clock-frequency = <32768>;
63*4882a593Smuzhiyun		clock-output-names = "xin32k";
64*4882a593Smuzhiyun		pwms = <&pwm1 0 30518 0>; /* 1 / 30518 ns = 32.7675 KHz */
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
68*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
69*4882a593Smuzhiyun		clocks = <&rk808 1>;
70*4882a593Smuzhiyun		clock-names = "ext_clock";
71*4882a593Smuzhiyun		pinctrl-names = "default";
72*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		/*
75*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
76*4882a593Smuzhiyun		 * on the actual card populated):
77*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
78*4882a593Smuzhiyun		 * - PDN (power down when low)
79*4882a593Smuzhiyun		 */
80*4882a593Smuzhiyun		reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; /* GPIO3_A5 */
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	es8396-sound {
84*4882a593Smuzhiyun		compatible = "simple-audio-card";
85*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
86*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,es8396-codec";
87*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
88*4882a593Smuzhiyun		simple-audio-card,widgets =
89*4882a593Smuzhiyun			"Microphone", "Microphone Jack",
90*4882a593Smuzhiyun			"Line", "Microphone Headset",
91*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
92*4882a593Smuzhiyun		simple-audio-card,routing =
93*4882a593Smuzhiyun			"MIC", "Microphone Jack",
94*4882a593Smuzhiyun			"DMIC", "Microphone Headset",
95*4882a593Smuzhiyun			"Headphone Jack", "LOUTP",
96*4882a593Smuzhiyun			"Headphone Jack", "ROUTN";
97*4882a593Smuzhiyun		simple-audio-card,cpu {
98*4882a593Smuzhiyun			sound-dai = <&i2s_8ch>;
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun		simple-audio-card,codec {
101*4882a593Smuzhiyun			sound-dai = <&es8396>;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	backlight: backlight {
106*4882a593Smuzhiyun		compatible = "pwm-backlight";
107*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
108*4882a593Smuzhiyun		brightness-levels = <
109*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
110*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
111*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
112*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
113*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
114*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
115*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
116*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
117*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
118*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
119*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
120*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
121*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
122*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
123*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
124*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
125*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
126*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
127*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
128*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
129*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
130*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
131*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
132*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
133*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
134*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
135*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
136*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
137*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
138*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
139*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
140*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
141*4882a593Smuzhiyun		default-brightness-level = <200>;
142*4882a593Smuzhiyun		enable-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	rk_key: rockchip-key {
146*4882a593Smuzhiyun		compatible = "rockchip,key";
147*4882a593Smuzhiyun		status = "okay";
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun		io-channels = <&saradc 1>;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		vol-up-key {
152*4882a593Smuzhiyun			linux,code = <115>;
153*4882a593Smuzhiyun			label = "volume up";
154*4882a593Smuzhiyun			rockchip,adc_value = <1>;
155*4882a593Smuzhiyun		};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		vol-down-key {
158*4882a593Smuzhiyun			linux,code = <114>;
159*4882a593Smuzhiyun			label = "volume down";
160*4882a593Smuzhiyun			rockchip,adc_value = <170>;
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		power-key {
164*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
165*4882a593Smuzhiyun			linux,code = <116>;
166*4882a593Smuzhiyun			label = "power";
167*4882a593Smuzhiyun			gpio-key,wakeup;
168*4882a593Smuzhiyun		};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun		menu-key {
171*4882a593Smuzhiyun			linux,code = <59>;
172*4882a593Smuzhiyun			label = "menu";
173*4882a593Smuzhiyun			rockchip,adc_value = <355>;
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		home-key {
177*4882a593Smuzhiyun			linux,code = <102>;
178*4882a593Smuzhiyun			label = "home";
179*4882a593Smuzhiyun			rockchip,adc_value = <746>;
180*4882a593Smuzhiyun		};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun		back-key {
183*4882a593Smuzhiyun			linux,code = <158>;
184*4882a593Smuzhiyun			label = "back";
185*4882a593Smuzhiyun			rockchip,adc_value = <560>;
186*4882a593Smuzhiyun		};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun		camera-key {
189*4882a593Smuzhiyun			linux,code = <212>;
190*4882a593Smuzhiyun			label = "camera";
191*4882a593Smuzhiyun			rockchip,adc_value = <450>;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	wireless-wlan {
196*4882a593Smuzhiyun		compatible = "wlan-platdata";
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		wifi_chip_type = "rtl8723ds";
199*4882a593Smuzhiyun		sdio_vref = <1800>; /*1800mv or 3300mv*/
200*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
201*4882a593Smuzhiyun		WIFI,vbat_gpio  = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
202*4882a593Smuzhiyun		status = "okay";
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	wireless-bluetooth {
206*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun		keep_bt_power_on;
209*4882a593Smuzhiyun		BT,power_gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>; /* GPIO3_A4 */
210*4882a593Smuzhiyun		BT,reset_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; /* GPIO3_A2 */
211*4882a593Smuzhiyun		BT,wake_gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; /* GPIO3_A7 */
212*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio3 3 GPIO_ACTIVE_HIGH>; /* GPIO3_A3 */
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun		status = "okay";
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	gpio_det: gpio-det {
218*4882a593Smuzhiyun		compatible = "gpio-detection";
219*4882a593Smuzhiyun		status = "okay";
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		pinctrl-0 = <&gpio3_b1 &gpio3_b2>;
222*4882a593Smuzhiyun		pinctrl-names = "default";
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		car-reverse {
225*4882a593Smuzhiyun			car-reverse-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
226*4882a593Smuzhiyun			linux,debounce-ms = <5>;
227*4882a593Smuzhiyun			label = "car-reverse";
228*4882a593Smuzhiyun			gpio,wakeup;
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun		car-acc {
232*4882a593Smuzhiyun			car-acc-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
233*4882a593Smuzhiyun			linux,debounce-ms = <5>;
234*4882a593Smuzhiyun			label = "car-acc";
235*4882a593Smuzhiyun			gpio,wakeup;
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun	vcc_sys: vcc-sys-regulator {
240*4882a593Smuzhiyun		compatible = "regulator-fixed";
241*4882a593Smuzhiyun		regulator-name = "vcc_sys";
242*4882a593Smuzhiyun		regulator-always-on;
243*4882a593Smuzhiyun		regulator-boot-on;
244*4882a593Smuzhiyun		regulator-min-microvolt = <3800000>;
245*4882a593Smuzhiyun		regulator-max-microvolt = <3800000>;
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	vcc_host: vcc-host {
249*4882a593Smuzhiyun		compatible = "regulator-fixed";
250*4882a593Smuzhiyun		enable-active-low;
251*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
252*4882a593Smuzhiyun		pinctrl-names = "default";
253*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
254*4882a593Smuzhiyun		regulator-name = "vcc_host";
255*4882a593Smuzhiyun		regulator-always-on;
256*4882a593Smuzhiyun	};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun	vcc18_lcd_n: vcc18-lcd-n {
259*4882a593Smuzhiyun		compatible = "regulator-fixed";
260*4882a593Smuzhiyun		regulator-name = "vcc18_lcd_n";
261*4882a593Smuzhiyun		regulator-always-on;
262*4882a593Smuzhiyun		regulator-boot-on;
263*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
264*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
265*4882a593Smuzhiyun		gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
266*4882a593Smuzhiyun		enable-active-high;
267*4882a593Smuzhiyun		startup-delay-us = <70000>;
268*4882a593Smuzhiyun		vin-supply = <&vcc_18>;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun		regulator-state-mem {
271*4882a593Smuzhiyun			regulator-off-in-suspend;
272*4882a593Smuzhiyun		};
273*4882a593Smuzhiyun	};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun	panel {
276*4882a593Smuzhiyun		compatible = "samsung,lsl070nl01", "simple-panel";
277*4882a593Smuzhiyun		power-supply = <&vcc33_lcd>;
278*4882a593Smuzhiyun		backlight = <&backlight>;
279*4882a593Smuzhiyun		prepare-delay-ms = <120>;
280*4882a593Smuzhiyun		unprepare-delay-ms = <120>;
281*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun		display-timings {
284*4882a593Smuzhiyun			native-mode = <&timing0>;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun			timing0: timing0 {
287*4882a593Smuzhiyun				clock-frequency = <48000000>;
288*4882a593Smuzhiyun				hactive = <1024>;
289*4882a593Smuzhiyun				vactive = <600>;
290*4882a593Smuzhiyun				hback-porch = <90>;
291*4882a593Smuzhiyun				hfront-porch = <90>;
292*4882a593Smuzhiyun				vback-porch = <10>;
293*4882a593Smuzhiyun				vfront-porch = <10>;
294*4882a593Smuzhiyun				hsync-len = <90>;
295*4882a593Smuzhiyun				vsync-len = <10>;
296*4882a593Smuzhiyun				hsync-active = <0>;
297*4882a593Smuzhiyun				vsync-active = <0>;
298*4882a593Smuzhiyun				de-active = <0>;
299*4882a593Smuzhiyun				pixelclk-active = <0>;
300*4882a593Smuzhiyun			};
301*4882a593Smuzhiyun		};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun		port {
304*4882a593Smuzhiyun			panel_in_lvds: endpoint {
305*4882a593Smuzhiyun				remote-endpoint = <&lvds_out_panel>;
306*4882a593Smuzhiyun			};
307*4882a593Smuzhiyun		};
308*4882a593Smuzhiyun	};
309*4882a593Smuzhiyun};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun&firmware_android {
312*4882a593Smuzhiyun	compatible = "android,firmware";
313*4882a593Smuzhiyun	fstab {
314*4882a593Smuzhiyun		compatible = "android,fstab";
315*4882a593Smuzhiyun		system {
316*4882a593Smuzhiyun			compatible = "android,system";
317*4882a593Smuzhiyun			dev = "/dev/block/by-name/system";
318*4882a593Smuzhiyun			type = "ext4";
319*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
320*4882a593Smuzhiyun			fsmgr_flags = "wait,verify";
321*4882a593Smuzhiyun		};
322*4882a593Smuzhiyun		vendor {
323*4882a593Smuzhiyun			compatible = "android,vendor";
324*4882a593Smuzhiyun			dev = "/dev/block/by-name/vendor";
325*4882a593Smuzhiyun			type = "ext4";
326*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
327*4882a593Smuzhiyun			fsmgr_flags = "wait,verify";
328*4882a593Smuzhiyun		};
329*4882a593Smuzhiyun	};
330*4882a593Smuzhiyun};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun&cif_sensor {
333*4882a593Smuzhiyun	status = "okay";
334*4882a593Smuzhiyun};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun&cluster0_opp {
337*4882a593Smuzhiyun	rockchip,threshold-freq = <408000>;
338*4882a593Smuzhiyun	rockchip,freq-limit;
339*4882a593Smuzhiyun};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun&cluster1_opp {
342*4882a593Smuzhiyun	rockchip,threshold-freq = <1416000>;
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&cpu_l0 {
346*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
347*4882a593Smuzhiyun};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun&cpu_l1 {
350*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
351*4882a593Smuzhiyun};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun&cpu_l2 {
354*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&cpu_l3 {
358*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&cpu_b0 {
362*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
363*4882a593Smuzhiyun};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun&cpu_b1 {
366*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
367*4882a593Smuzhiyun};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun&cpu_b2 {
370*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
371*4882a593Smuzhiyun};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun&cpu_b3 {
374*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&gpu {
378*4882a593Smuzhiyun	logic-supply = <&vdd_log>;
379*4882a593Smuzhiyun};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun&isp {
382*4882a593Smuzhiyun	pinctrl-names =
383*4882a593Smuzhiyun		"isp_mipi_fl_prefl", "isp_flash_as_gpio",
384*4882a593Smuzhiyun		"isp_flash_as_trigger_out";
385*4882a593Smuzhiyun	pinctrl-0 = <&isp_prelight>;
386*4882a593Smuzhiyun	pinctrl-1 = <&isp_flash_trigger_as_gpio>;
387*4882a593Smuzhiyun	pinctrl-2 = <&isp_flash_trigger>;
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&rockchip_suspend {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
393*4882a593Smuzhiyun		(0
394*4882a593Smuzhiyun		| RKPM_SLP_ARMOFF
395*4882a593Smuzhiyun		| RKPM_SLP_PMU_PLLS_PWRDN
396*4882a593Smuzhiyun		| RKPM_SLP_PMU_PMUALIVE_32K
397*4882a593Smuzhiyun		| RKPM_SLP_SFT_PLLS_DEEP
398*4882a593Smuzhiyun		| RKPM_SLP_PMU_DIS_OSC
399*4882a593Smuzhiyun		| RKPM_SLP_SFT_PD_NBSCUS
400*4882a593Smuzhiyun		)
401*4882a593Smuzhiyun	>;
402*4882a593Smuzhiyun	rockchip,wakeup-config = <
403*4882a593Smuzhiyun		(0
404*4882a593Smuzhiyun		| RKPM_GPIO_WKUP_EN
405*4882a593Smuzhiyun		| RKPM_USB_WKUP_EN
406*4882a593Smuzhiyun		| RKPM_CLUSTER_L_WKUP_EN
407*4882a593Smuzhiyun		)
408*4882a593Smuzhiyun	>;
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&emmc {
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun	bus-width = <8>;
414*4882a593Smuzhiyun	clock-frequency = <150000000>;
415*4882a593Smuzhiyun	keep-power-in-suspend;
416*4882a593Smuzhiyun	cap-mmc-highspeed;
417*4882a593Smuzhiyun	mmc-hs200-1_8v;
418*4882a593Smuzhiyun	no-sdio;
419*4882a593Smuzhiyun	no-sd;
420*4882a593Smuzhiyun	disable-wp;
421*4882a593Smuzhiyun	non-removable;
422*4882a593Smuzhiyun	num-slots = <1>;
423*4882a593Smuzhiyun	pinctrl-names = "default";
424*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
425*4882a593Smuzhiyun	vmmc-supply = <&vcc_io>;
426*4882a593Smuzhiyun	vqmmc-supply = <&vcc18_flash>;
427*4882a593Smuzhiyun};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun&sdmmc {
430*4882a593Smuzhiyun	status = "okay";
431*4882a593Smuzhiyun	clock-frequency = <37500000>;
432*4882a593Smuzhiyun	clock-freq-min-max = <400000 37500000>;
433*4882a593Smuzhiyun	no-sdio;
434*4882a593Smuzhiyun	no-mmc;
435*4882a593Smuzhiyun	cap-mmc-highspeed;
436*4882a593Smuzhiyun	cap-sd-highspeed;
437*4882a593Smuzhiyun	card-detect-delay = <200>;
438*4882a593Smuzhiyun	disable-wp;
439*4882a593Smuzhiyun	num-slots = <1>;
440*4882a593Smuzhiyun	pinctrl-names = "default";
441*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
442*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
443*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&sdio0 {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun	clock-frequency = <50000000>;
449*4882a593Smuzhiyun	clock-freq-min-max = <200000 50000000>;
450*4882a593Smuzhiyun	no-sd;
451*4882a593Smuzhiyun	no-mmc;
452*4882a593Smuzhiyun	bus-width = <4>;
453*4882a593Smuzhiyun	disable-wp;
454*4882a593Smuzhiyun	cap-sd-highspeed;
455*4882a593Smuzhiyun	cap-sdio-irq;
456*4882a593Smuzhiyun	keep-power-in-suspend;
457*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
458*4882a593Smuzhiyun	non-removable;
459*4882a593Smuzhiyun	num-slots = <1>;
460*4882a593Smuzhiyun	pinctrl-names = "default";
461*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
462*4882a593Smuzhiyun	sd-uhs-sdr104;
463*4882a593Smuzhiyun};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun&i2c0 {
466*4882a593Smuzhiyun	status = "okay";
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun	rk808: pmic@1b {
469*4882a593Smuzhiyun		compatible = "rockchip,rk808";
470*4882a593Smuzhiyun		reg = <0x1b>;
471*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
472*4882a593Smuzhiyun		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
473*4882a593Smuzhiyun		pinctrl-names = "default";
474*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
475*4882a593Smuzhiyun		rockchip,system-power-controller;
476*4882a593Smuzhiyun		wakeup-source;
477*4882a593Smuzhiyun		#clock-cells = <1>;
478*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
481*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
482*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
483*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
484*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
485*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
486*4882a593Smuzhiyun		vcc8-supply = <&vcc_io>;
487*4882a593Smuzhiyun		vcc9-supply = <&vcc_sys>;
488*4882a593Smuzhiyun		vcc10-supply = <&vcc_sys>;
489*4882a593Smuzhiyun		vcc11-supply = <&vcc_sys>;
490*4882a593Smuzhiyun		vcc12-supply = <&vcc_io>;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun		regulators {
493*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
494*4882a593Smuzhiyun				regulator-always-on;
495*4882a593Smuzhiyun				regulator-boot-on;
496*4882a593Smuzhiyun				regulator-min-microvolt = <700000>;
497*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
498*4882a593Smuzhiyun				regulator-name = "vdd_cpu";
499*4882a593Smuzhiyun				regulator-ramp-delay = <6000>;
500*4882a593Smuzhiyun				regulator-state-mem {
501*4882a593Smuzhiyun					regulator-off-in-suspend;
502*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
503*4882a593Smuzhiyun				};
504*4882a593Smuzhiyun			};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun			vdd_log: DCDC_REG2 {
507*4882a593Smuzhiyun				regulator-always-on;
508*4882a593Smuzhiyun				regulator-boot-on;
509*4882a593Smuzhiyun				regulator-min-microvolt = <700000>;
510*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
511*4882a593Smuzhiyun				regulator-name = "vdd_log";
512*4882a593Smuzhiyun				regulator-ramp-delay = <6000>;
513*4882a593Smuzhiyun				regulator-state-mem {
514*4882a593Smuzhiyun					regulator-on-in-suspend;
515*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
516*4882a593Smuzhiyun				};
517*4882a593Smuzhiyun			};
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
520*4882a593Smuzhiyun				regulator-always-on;
521*4882a593Smuzhiyun				regulator-boot-on;
522*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
523*4882a593Smuzhiyun				regulator-state-mem {
524*4882a593Smuzhiyun					regulator-on-in-suspend;
525*4882a593Smuzhiyun				};
526*4882a593Smuzhiyun			};
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
529*4882a593Smuzhiyun				regulator-always-on;
530*4882a593Smuzhiyun				regulator-boot-on;
531*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
532*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
533*4882a593Smuzhiyun				regulator-name = "vcc_io";
534*4882a593Smuzhiyun				regulator-state-mem {
535*4882a593Smuzhiyun					regulator-on-in-suspend;
536*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
537*4882a593Smuzhiyun				};
538*4882a593Smuzhiyun			};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun			vcc18_flash: LDO_REG1 {
541*4882a593Smuzhiyun				regulator-always-on;
542*4882a593Smuzhiyun				regulator-boot-on;
543*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
544*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
545*4882a593Smuzhiyun				regulator-name = "vcc18_flash";
546*4882a593Smuzhiyun				regulator-state-mem {
547*4882a593Smuzhiyun					regulator-on-in-suspend;
548*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
549*4882a593Smuzhiyun				};
550*4882a593Smuzhiyun			};
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun			vcca_33: LDO_REG2 {
553*4882a593Smuzhiyun				regulator-always-on;
554*4882a593Smuzhiyun				regulator-boot-on;
555*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
556*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
557*4882a593Smuzhiyun				regulator-name = "vcca_33";
558*4882a593Smuzhiyun				regulator-state-mem {
559*4882a593Smuzhiyun					regulator-off-in-suspend;
560*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
561*4882a593Smuzhiyun				};
562*4882a593Smuzhiyun			};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
565*4882a593Smuzhiyun				regulator-always-on;
566*4882a593Smuzhiyun				regulator-boot-on;
567*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
568*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
569*4882a593Smuzhiyun				regulator-name = "vdd_10";
570*4882a593Smuzhiyun				regulator-state-mem {
571*4882a593Smuzhiyun					regulator-on-in-suspend;
572*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
573*4882a593Smuzhiyun				};
574*4882a593Smuzhiyun			};
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun			avdd_33: LDO_REG4 {
577*4882a593Smuzhiyun				regulator-always-on;
578*4882a593Smuzhiyun				regulator-boot-on;
579*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
580*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
581*4882a593Smuzhiyun				regulator-name = "avdd_33";
582*4882a593Smuzhiyun				regulator-state-mem {
583*4882a593Smuzhiyun					regulator-off-in-suspend;
584*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
585*4882a593Smuzhiyun				};
586*4882a593Smuzhiyun			};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
589*4882a593Smuzhiyun				regulator-always-on;
590*4882a593Smuzhiyun				regulator-boot-on;
591*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
592*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
593*4882a593Smuzhiyun				regulator-name = "vccio_sd";
594*4882a593Smuzhiyun				regulator-state-mem {
595*4882a593Smuzhiyun					regulator-on-in-suspend;
596*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
597*4882a593Smuzhiyun				};
598*4882a593Smuzhiyun			};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
601*4882a593Smuzhiyun				regulator-always-on;
602*4882a593Smuzhiyun				regulator-boot-on;
603*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
604*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
605*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
606*4882a593Smuzhiyun				regulator-state-mem {
607*4882a593Smuzhiyun					regulator-off-in-suspend;
608*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
609*4882a593Smuzhiyun				};
610*4882a593Smuzhiyun			};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
613*4882a593Smuzhiyun				regulator-always-on;
614*4882a593Smuzhiyun				regulator-boot-on;
615*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
616*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
617*4882a593Smuzhiyun				regulator-name = "vcc_18";
618*4882a593Smuzhiyun				regulator-state-mem {
619*4882a593Smuzhiyun					regulator-on-in-suspend;
620*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
621*4882a593Smuzhiyun				};
622*4882a593Smuzhiyun			};
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun			vcc18_lcd: LDO_REG8 {
625*4882a593Smuzhiyun				regulator-always-on;
626*4882a593Smuzhiyun				regulator-boot-on;
627*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
628*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
629*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
630*4882a593Smuzhiyun				regulator-state-mem {
631*4882a593Smuzhiyun					regulator-off-in-suspend;
632*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
633*4882a593Smuzhiyun				};
634*4882a593Smuzhiyun			};
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun			vcc_sd: SWITCH_REG1 {
637*4882a593Smuzhiyun				regulator-boot-on;
638*4882a593Smuzhiyun				regulator-name = "vcc_sd";
639*4882a593Smuzhiyun				regulator-state-mem {
640*4882a593Smuzhiyun					regulator-off-in-suspend;
641*4882a593Smuzhiyun				};
642*4882a593Smuzhiyun			};
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun			vcc33_lcd: SWITCH_REG2 {
645*4882a593Smuzhiyun				regulator-boot-on;
646*4882a593Smuzhiyun				regulator-name = "vcc33_lcd";
647*4882a593Smuzhiyun				regulator-state-mem {
648*4882a593Smuzhiyun					regulator-off-in-suspend;
649*4882a593Smuzhiyun				};
650*4882a593Smuzhiyun			};
651*4882a593Smuzhiyun		};
652*4882a593Smuzhiyun	};
653*4882a593Smuzhiyun};
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun&i2c1 {
656*4882a593Smuzhiyun	status = "okay";
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun	bma2x2: bma250@18 {
659*4882a593Smuzhiyun		compatible = "bma2xx_acc";
660*4882a593Smuzhiyun		status = "okay";
661*4882a593Smuzhiyun		reg = <0x18>;
662*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
663*4882a593Smuzhiyun		pinctrl-names = "default";
664*4882a593Smuzhiyun		pinctrl-0 = <&gpio2_c1>;
665*4882a593Smuzhiyun		irq-gpio = <&gpio2 17 IRQ_TYPE_LEVEL_LOW>;
666*4882a593Smuzhiyun		irq_enable = <1>;
667*4882a593Smuzhiyun		poll_delay_ms = <200>;
668*4882a593Smuzhiyun		layout = <6>;
669*4882a593Smuzhiyun		reprobe_en = <1>;/* this sensor need to be probe again */
670*4882a593Smuzhiyun	};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun	ls_stk3410: light@48 {
673*4882a593Smuzhiyun		compatible = "ls_stk3410";
674*4882a593Smuzhiyun		status = "okay";
675*4882a593Smuzhiyun		reg = <0x48>;
676*4882a593Smuzhiyun		type = <SENSOR_TYPE_LIGHT>;
677*4882a593Smuzhiyun		irq_enable = <0>;
678*4882a593Smuzhiyun		als_threshold_high = <100>;
679*4882a593Smuzhiyun		als_threshold_low = <10>;
680*4882a593Smuzhiyun		als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
681*4882a593Smuzhiyun		poll_delay_ms = <100>;
682*4882a593Smuzhiyun	};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun	ps_stk3410: proximity@48 {
685*4882a593Smuzhiyun		compatible = "ps_stk3410";
686*4882a593Smuzhiyun		status = "okay";
687*4882a593Smuzhiyun		reg = <0x48>;
688*4882a593Smuzhiyun		type = <SENSOR_TYPE_PROXIMITY>;
689*4882a593Smuzhiyun		pinctrl-names = "default";
690*4882a593Smuzhiyun		pinctrl-0 = <&gpio2_c3>;
691*4882a593Smuzhiyun		irq-gpio = <&gpio2 19 IRQ_TYPE_LEVEL_LOW>;
692*4882a593Smuzhiyun		irq_enable = <1>;
693*4882a593Smuzhiyun		ps_threshold_high = <0x200>;
694*4882a593Smuzhiyun		ps_threshold_low = <0x100>;
695*4882a593Smuzhiyun		ps_ctrl_gain = <3>; /* 0:x1 1:x4 2:x16 3:x64 */
696*4882a593Smuzhiyun		ps_led_current = <3>; /* 0:12.5mA 1:25mA 2:50mA 3:100mA */
697*4882a593Smuzhiyun		poll_delay_ms = <100>;
698*4882a593Smuzhiyun	};
699*4882a593Smuzhiyun};
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun&i2c2 {
702*4882a593Smuzhiyun	status = "okay";
703*4882a593Smuzhiyun	clock-frequency = <200000>;
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun	gsl1680: touchscreen@40 {
706*4882a593Smuzhiyun		compatible = "silead,gsl1680";
707*4882a593Smuzhiyun		reg = <0x40>;
708*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
709*4882a593Smuzhiyun		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
710*4882a593Smuzhiyun		power-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
711*4882a593Smuzhiyun		touchscreen-size-x = <800>;
712*4882a593Smuzhiyun		touchscreen-size-y = <1280>;
713*4882a593Smuzhiyun		silead,max-fingers = <5>;
714*4882a593Smuzhiyun	};
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun	gt9xx: gt9xx@14 {
717*4882a593Smuzhiyun		compatible = "goodix,gt9xx";
718*4882a593Smuzhiyun		reg = <0x14>;
719*4882a593Smuzhiyun		touch-gpio = <&gpio3 RK_PD4 IRQ_TYPE_LEVEL_HIGH>;
720*4882a593Smuzhiyun		reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
721*4882a593Smuzhiyun		max-x = <1024>;
722*4882a593Smuzhiyun		max-y = <600>;
723*4882a593Smuzhiyun		tp-size = <910>;
724*4882a593Smuzhiyun		tp-supply = <&vcc_io>;
725*4882a593Smuzhiyun		status = "okay";
726*4882a593Smuzhiyun	};
727*4882a593Smuzhiyun};
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun&i2c3 {
730*4882a593Smuzhiyun	status = "okay";
731*4882a593Smuzhiyun	clock-frequency = <200000>;
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun	fm1288: fm1288@60{
734*4882a593Smuzhiyun		compatible = "fm1288";
735*4882a593Smuzhiyun		reg = <0x60>;
736*4882a593Smuzhiyun		pwd-gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
737*4882a593Smuzhiyun		bypass-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
738*4882a593Smuzhiyun		status = "okay";
739*4882a593Smuzhiyun	};
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun	es8396: es8396@10 {
742*4882a593Smuzhiyun		status = "okay";
743*4882a593Smuzhiyun		#sound-dai-cells = <0>;
744*4882a593Smuzhiyun		compatible = "es8396";
745*4882a593Smuzhiyun		reg = <0x10>;
746*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S_8CH_OUT>;
747*4882a593Smuzhiyun		clock-names = "mclk";
748*4882a593Smuzhiyun		spk-con-gpio = <&gpio2 RK_PC7 GPIO_ACTIVE_HIGH>;
749*4882a593Smuzhiyun		lineout-con-gpio = <&gpio0 RK_PD7 GPIO_ACTIVE_HIGH>;
750*4882a593Smuzhiyun		pinctrl-names = "default";
751*4882a593Smuzhiyun		pinctrl-0 = <&i2s_8ch_mclk>;
752*4882a593Smuzhiyun	};
753*4882a593Smuzhiyun};
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun&i2c4 {
756*4882a593Smuzhiyun	status = "okay";
757*4882a593Smuzhiyun};
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun&i2s_8ch {
760*4882a593Smuzhiyun	status = "okay";
761*4882a593Smuzhiyun	rockchip,i2s-broken-burst-len;
762*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
763*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
764*4882a593Smuzhiyun	#sound-dai-cells = <0>;
765*4882a593Smuzhiyun	pinctrl-names = "default";
766*4882a593Smuzhiyun	pinctrl-0 = <&i2s_8ch_bus>;
767*4882a593Smuzhiyun};
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun&io_domains {
770*4882a593Smuzhiyun	status = "okay";
771*4882a593Smuzhiyun	dvp-supply = <&vcc_18>;
772*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
773*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
774*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
775*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
776*4882a593Smuzhiyun	wifi-supply = <&vcc_io>;
777*4882a593Smuzhiyun};
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun&pmu_io_domains {
780*4882a593Smuzhiyun	status = "okay";
781*4882a593Smuzhiyun	pmu-supply = <&vcc_io>;
782*4882a593Smuzhiyun	vop-supply = <&vcca_33>;
783*4882a593Smuzhiyun};
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun&pwm0 {
786*4882a593Smuzhiyun	status = "okay";
787*4882a593Smuzhiyun};
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun&pwm1 {
790*4882a593Smuzhiyun	status = "okay";
791*4882a593Smuzhiyun};
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun&u2phy {
794*4882a593Smuzhiyun	status = "okay";
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun	u2phy_host: host-port {
797*4882a593Smuzhiyun		phy-supply = <&vcc_host>;
798*4882a593Smuzhiyun		status = "okay";
799*4882a593Smuzhiyun	};
800*4882a593Smuzhiyun};
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun&usb_host0_ehci {
803*4882a593Smuzhiyun	status = "okay";
804*4882a593Smuzhiyun};
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun&usb_host0_ohci {
807*4882a593Smuzhiyun	status = "okay";
808*4882a593Smuzhiyun};
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun&dfi {
811*4882a593Smuzhiyun	status = "okay";
812*4882a593Smuzhiyun};
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun&dmc {
815*4882a593Smuzhiyun	vop-dclk-mode = <1>;
816*4882a593Smuzhiyun	center-supply = <&vdd_log>;
817*4882a593Smuzhiyun	system-status-freq = <
818*4882a593Smuzhiyun		/*system status			freq(KHz)*/
819*4882a593Smuzhiyun		SYS_STATUS_NORMAL		600000
820*4882a593Smuzhiyun		SYS_STATUS_REBOOT		600000
821*4882a593Smuzhiyun		SYS_STATUS_SUSPEND		192000
822*4882a593Smuzhiyun		SYS_STATUS_VIDEO_1080P	600000
823*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K		600000
824*4882a593Smuzhiyun		SYS_STATUS_PERFORMANCE	600000
825*4882a593Smuzhiyun		SYS_STATUS_BOOST		600000
826*4882a593Smuzhiyun		SYS_STATUS_DUALVIEW		600000
827*4882a593Smuzhiyun		SYS_STATUS_ISP			600000
828*4882a593Smuzhiyun	>;
829*4882a593Smuzhiyun	status = "okay";
830*4882a593Smuzhiyun};
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun&lvds {
833*4882a593Smuzhiyun	status = "okay";
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun	ports {
836*4882a593Smuzhiyun		port@1 {
837*4882a593Smuzhiyun			reg = <1>;
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun			lvds_out_panel: endpoint {
840*4882a593Smuzhiyun				remote-endpoint = <&panel_in_lvds>;
841*4882a593Smuzhiyun			};
842*4882a593Smuzhiyun		};
843*4882a593Smuzhiyun	};
844*4882a593Smuzhiyun};
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun&route_lvds {
847*4882a593Smuzhiyun	status = "okay";
848*4882a593Smuzhiyun};
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun&mailbox {
851*4882a593Smuzhiyun	status = "okay";
852*4882a593Smuzhiyun};
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun&mailbox_scpi {
855*4882a593Smuzhiyun	status = "okay";
856*4882a593Smuzhiyun};
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun&saradc {
859*4882a593Smuzhiyun	status = "okay";
860*4882a593Smuzhiyun};
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun&thermal_zones {
863*4882a593Smuzhiyun	status = "okay";
864*4882a593Smuzhiyun};
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun&tsadc {
867*4882a593Smuzhiyun	tsadc-supply = <&vdd_cpu>;
868*4882a593Smuzhiyun	status = "okay";
869*4882a593Smuzhiyun};
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun&uart1 {
872*4882a593Smuzhiyun	pinctrl-names = "default";
873*4882a593Smuzhiyun	pinctrl-0 = <&uart1_xfer &uart1_cts>;
874*4882a593Smuzhiyun	status = "okay";
875*4882a593Smuzhiyun};
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun&uart2 {
878*4882a593Smuzhiyun	status = "disabled";
879*4882a593Smuzhiyun};
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun&uart4 {
882*4882a593Smuzhiyun	status = "okay";
883*4882a593Smuzhiyun};
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun&pinctrl {
886*4882a593Smuzhiyun	pmic {
887*4882a593Smuzhiyun		pmic_int: pmic-int {
888*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
889*4882a593Smuzhiyun		};
890*4882a593Smuzhiyun	};
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun	dc_det {
893*4882a593Smuzhiyun		dc_irq_gpio: dc-irq-gpio {
894*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
895*4882a593Smuzhiyun		};
896*4882a593Smuzhiyun	};
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun	sdio-pwrseq {
899*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
900*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
901*4882a593Smuzhiyun		};
902*4882a593Smuzhiyun	};
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun	usb2 {
905*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
906*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
907*4882a593Smuzhiyun		};
908*4882a593Smuzhiyun	};
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun	wireless-bluetooth {
911*4882a593Smuzhiyun		uart0_rts_gpio: uart0-rts-gpio {
912*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
913*4882a593Smuzhiyun		};
914*4882a593Smuzhiyun	};
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun	gpio0_gpio {
917*4882a593Smuzhiyun		gpio0_c7: gpio0-c7 {
918*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO  &pcfg_pull_down>;
919*4882a593Smuzhiyun		};
920*4882a593Smuzhiyun		gpio0_a3: gpio0-a3 {
921*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 3 &pcfg_pull_none>;
922*4882a593Smuzhiyun		};
923*4882a593Smuzhiyun		gpio0_c2: gpio0-c2 {
924*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
925*4882a593Smuzhiyun		};
926*4882a593Smuzhiyun		gpio0_c3: gpio0-c3 {
927*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
928*4882a593Smuzhiyun		};
929*4882a593Smuzhiyun		gpio0_c1: gpio0-c1 {
930*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
931*4882a593Smuzhiyun		};
932*4882a593Smuzhiyun		gpio2_c1: gpio2-c1 {
933*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
934*4882a593Smuzhiyun		};
935*4882a593Smuzhiyun		gpio2_c3: gpio2-c3 {
936*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
937*4882a593Smuzhiyun		};
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun		gpio3_b1: gpio3-b1 {
940*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
941*4882a593Smuzhiyun		};
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun		gpio3_b2: gpio3-b2 {
944*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
945*4882a593Smuzhiyun		};
946*4882a593Smuzhiyun	};
947*4882a593Smuzhiyun	i2s {
948*4882a593Smuzhiyun		i2s_8ch_bus: i2s-8ch-bus {
949*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB4 1 &pcfg_pull_none>,
950*4882a593Smuzhiyun					<2 RK_PB5 1 &pcfg_pull_none>,
951*4882a593Smuzhiyun					<2 RK_PB6 1 &pcfg_pull_none>,
952*4882a593Smuzhiyun					<2 RK_PB7 1 &pcfg_pull_none>,
953*4882a593Smuzhiyun					<2 RK_PC0 1 &pcfg_pull_none>,
954*4882a593Smuzhiyun					<2 RK_PC2 1 &pcfg_pull_none>;
955*4882a593Smuzhiyun		};
956*4882a593Smuzhiyun	};
957*4882a593Smuzhiyun};
958