1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "rk3368.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun chosen { 11*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 12*4882a593Smuzhiyun }; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun ext_gmac: gmac-clk { 15*4882a593Smuzhiyun compatible = "fixed-clock"; 16*4882a593Smuzhiyun clock-frequency = <125000000>; 17*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 18*4882a593Smuzhiyun #clock-cells = <0>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun i2cmux1 { 22*4882a593Smuzhiyun compatible = "i2c-mux-gpio"; 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <0>; 25*4882a593Smuzhiyun i2c-parent = <&i2c1>; 26*4882a593Smuzhiyun mux-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* Q7_GPO_I2C */ 29*4882a593Smuzhiyun i2c@0 { 30*4882a593Smuzhiyun reg = <0>; 31*4882a593Smuzhiyun #address-cells = <1>; 32*4882a593Smuzhiyun #size-cells = <0>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* Q7_SMB */ 36*4882a593Smuzhiyun i2c@1 { 37*4882a593Smuzhiyun reg = <1>; 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <0>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun i2cmux2 { 44*4882a593Smuzhiyun compatible = "i2c-mux-gpio"; 45*4882a593Smuzhiyun #address-cells = <1>; 46*4882a593Smuzhiyun #size-cells = <0>; 47*4882a593Smuzhiyun i2c-parent = <&i2c2>; 48*4882a593Smuzhiyun mux-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Q7_LVDS_BLC_I2C */ 51*4882a593Smuzhiyun i2c@0 { 52*4882a593Smuzhiyun reg = <0>; 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <0>; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun fan: fan@18 { 57*4882a593Smuzhiyun compatible = "ti,amc6821"; 58*4882a593Smuzhiyun reg = <0x18>; 59*4882a593Smuzhiyun #cooling-cells = <2>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun rtc_twi: rtc@6f { 63*4882a593Smuzhiyun compatible = "isil,isl1208"; 64*4882a593Smuzhiyun reg = <0x6f>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Q7_GP2_I2C */ 69*4882a593Smuzhiyun i2c@1 { 70*4882a593Smuzhiyun reg = <1>; 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <0>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun leds { 77*4882a593Smuzhiyun compatible = "gpio-leds"; 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&module_led_pins>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun module_led1: led-1 { 82*4882a593Smuzhiyun label = "module_led1"; 83*4882a593Smuzhiyun gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; 84*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 85*4882a593Smuzhiyun panic-indicator; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun module_led2: led-2 { 89*4882a593Smuzhiyun label = "module_led2"; 90*4882a593Smuzhiyun gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; 91*4882a593Smuzhiyun default-state = "off"; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun vcc_sys: vcc-sys-regulator { 96*4882a593Smuzhiyun compatible = "regulator-fixed"; 97*4882a593Smuzhiyun regulator-name = "vcc_sys"; 98*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 99*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 100*4882a593Smuzhiyun regulator-always-on; 101*4882a593Smuzhiyun regulator-boot-on; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&cpu_l0 { 106*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&cpu_l1 { 110*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 111*4882a593Smuzhiyun}; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun&cpu_l2 { 114*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 115*4882a593Smuzhiyun}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun&cpu_l3 { 118*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&cpu_b0 { 122*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&cpu_b1 { 126*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 127*4882a593Smuzhiyun}; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun&cpu_b2 { 130*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 131*4882a593Smuzhiyun}; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun&cpu_b3 { 134*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&emmc { 138*4882a593Smuzhiyun bus-width = <8>; 139*4882a593Smuzhiyun clock-frequency = <150000000>; 140*4882a593Smuzhiyun mmc-hs200-1_8v; 141*4882a593Smuzhiyun non-removable; 142*4882a593Smuzhiyun vmmc-supply = <&vcc33_io>; 143*4882a593Smuzhiyun vqmmc-supply = <&vcc18_io>; 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; 146*4882a593Smuzhiyun status = "okay"; 147*4882a593Smuzhiyun}; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun&gmac { 150*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC>; 151*4882a593Smuzhiyun assigned-clock-parents = <&ext_gmac>; 152*4882a593Smuzhiyun clock_in_out = "input"; 153*4882a593Smuzhiyun phy-supply = <&vcc33_io>; 154*4882a593Smuzhiyun phy-mode = "rgmii"; 155*4882a593Smuzhiyun pinctrl-names = "default"; 156*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 157*4882a593Smuzhiyun snps,reset-active-low; 158*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 159*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; 160*4882a593Smuzhiyun tx_delay = <0x10>; 161*4882a593Smuzhiyun rx_delay = <0x10>; 162*4882a593Smuzhiyun status = "okay"; 163*4882a593Smuzhiyun}; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun&i2c0 { 166*4882a593Smuzhiyun status = "okay"; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun rk808: pmic@1b { 169*4882a593Smuzhiyun compatible = "rockchip,rk808"; 170*4882a593Smuzhiyun reg = <0x1b>; 171*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 172*4882a593Smuzhiyun interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; 173*4882a593Smuzhiyun clock-output-names = "xin32k", "rk808-clkout2"; 174*4882a593Smuzhiyun #clock-cells = <1>; 175*4882a593Smuzhiyun pinctrl-names = "default"; 176*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>, <&pmic_sleep>; 177*4882a593Smuzhiyun rockchip,system-power-controller; 178*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 179*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 180*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 181*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 182*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 183*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 184*4882a593Smuzhiyun vcc8-supply = <&vcc_sys>; 185*4882a593Smuzhiyun vcc9-supply = <&vcc_sys>; 186*4882a593Smuzhiyun vcc10-supply = <&vcc_sys>; 187*4882a593Smuzhiyun vcc11-supply = <&vcc_sys>; 188*4882a593Smuzhiyun vcc12-supply = <&vcc_sys>; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun regulators { 191*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 192*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 193*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 194*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 195*4882a593Smuzhiyun regulator-always-on; 196*4882a593Smuzhiyun regulator-boot-on; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun vdd_log: DCDC_REG2 { 200*4882a593Smuzhiyun regulator-name = "vdd_log"; 201*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 202*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 203*4882a593Smuzhiyun regulator-always-on; 204*4882a593Smuzhiyun regulator-boot-on; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 208*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 209*4882a593Smuzhiyun regulator-always-on; 210*4882a593Smuzhiyun regulator-boot-on; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun vcc33_io: DCDC_REG4 { 214*4882a593Smuzhiyun regulator-name = "vcc33_io"; 215*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 216*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 217*4882a593Smuzhiyun regulator-always-on; 218*4882a593Smuzhiyun regulator-boot-on; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun vcc33_video: LDO_REG2 { 222*4882a593Smuzhiyun regulator-name = "vcc33_video"; 223*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 224*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 225*4882a593Smuzhiyun regulator-always-on; 226*4882a593Smuzhiyun regulator-boot-on; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun vdd10_pll: LDO_REG3 { 230*4882a593Smuzhiyun regulator-name = "vdd10_pll"; 231*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 232*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 233*4882a593Smuzhiyun regulator-always-on; 234*4882a593Smuzhiyun regulator-boot-on; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun vcc18_io: LDO_REG4 { 238*4882a593Smuzhiyun regulator-name = "vcc18_io"; 239*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 240*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 241*4882a593Smuzhiyun regulator-boot-on; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun vdd10_video: LDO_REG6 { 245*4882a593Smuzhiyun regulator-name = "vdd10_video"; 246*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 247*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 248*4882a593Smuzhiyun regulator-always-on; 249*4882a593Smuzhiyun regulator-boot-on; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun vcc18_video: LDO_REG8 { 253*4882a593Smuzhiyun regulator-name = "vcc18_video"; 254*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 255*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 256*4882a593Smuzhiyun regulator-always-on; 257*4882a593Smuzhiyun regulator-boot-on; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun}; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun&i2c1 { 264*4882a593Smuzhiyun status = "okay"; 265*4882a593Smuzhiyun}; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun&i2c2 { 268*4882a593Smuzhiyun status = "okay"; 269*4882a593Smuzhiyun}; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun&pinctrl { 272*4882a593Smuzhiyun leds { 273*4882a593Smuzhiyun module_led_pins: module-led-pins { 274*4882a593Smuzhiyun rockchip,pins = 275*4882a593Smuzhiyun <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, 276*4882a593Smuzhiyun <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun pmic { 280*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 281*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun pmic_sleep: pmic-sleep { 285*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun}; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun&spi1 { 291*4882a593Smuzhiyun status = "okay"; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun norflash: flash@0 { 294*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 295*4882a593Smuzhiyun reg = <0>; 296*4882a593Smuzhiyun spi-max-frequency = <50000000>; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun&uart1 { 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&uart3 { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun}; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun&usb_host0_ehci { 309*4882a593Smuzhiyun status = "okay"; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&wdt { 313*4882a593Smuzhiyun status = "okay"; 314*4882a593Smuzhiyun}; 315