1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 7*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 8*4882a593Smuzhiyun#include "rk3368.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x40000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun backlight: backlight { 21*4882a593Smuzhiyun compatible = "pwm-backlight"; 22*4882a593Smuzhiyun brightness-levels = < 23*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 24*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 25*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 26*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 27*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 28*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 29*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 30*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 31*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 32*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 33*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 34*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 35*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 36*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 37*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 38*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 39*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 40*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 41*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 42*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 43*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 44*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 45*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 46*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 47*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 48*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 49*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 50*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 51*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 52*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 53*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 54*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 55*4882a593Smuzhiyun default-brightness-level = <128>; 56*4882a593Smuzhiyun enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 57*4882a593Smuzhiyun pinctrl-names = "default"; 58*4882a593Smuzhiyun pinctrl-0 = <&bl_en>; 59*4882a593Smuzhiyun pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>; 60*4882a593Smuzhiyun pwm-delay-us = <10000>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 64*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 65*4882a593Smuzhiyun pinctrl-0 = <&emmc_reset>; 66*4882a593Smuzhiyun pinctrl-names = "default"; 67*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun keys: gpio-keys { 71*4882a593Smuzhiyun compatible = "gpio-keys"; 72*4882a593Smuzhiyun pinctrl-names = "default"; 73*4882a593Smuzhiyun pinctrl-0 = <&pwr_key>; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun power { 76*4882a593Smuzhiyun wakeup-source; 77*4882a593Smuzhiyun gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; 78*4882a593Smuzhiyun label = "GPIO Power"; 79*4882a593Smuzhiyun linux,code = <KEY_POWER>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* supplies both host and otg */ 84*4882a593Smuzhiyun vcc_host: vcc-host-regulator { 85*4882a593Smuzhiyun compatible = "regulator-fixed"; 86*4882a593Smuzhiyun enable-active-high; 87*4882a593Smuzhiyun gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 88*4882a593Smuzhiyun pinctrl-names = "default"; 89*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 90*4882a593Smuzhiyun regulator-name = "vcc_host"; 91*4882a593Smuzhiyun regulator-always-on; 92*4882a593Smuzhiyun regulator-boot-on; 93*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun vcc_lan: vcc-lan-regulator { 97*4882a593Smuzhiyun compatible = "regulator-fixed"; 98*4882a593Smuzhiyun regulator-name = "vcc_lan"; 99*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 100*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 101*4882a593Smuzhiyun regulator-always-on; 102*4882a593Smuzhiyun regulator-boot-on; 103*4882a593Smuzhiyun vin-supply = <&vcc_io>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun vcc_sys: vcc-sys-regulator { 107*4882a593Smuzhiyun compatible = "regulator-fixed"; 108*4882a593Smuzhiyun regulator-name = "vcc_sys"; 109*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 110*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 111*4882a593Smuzhiyun regulator-always-on; 112*4882a593Smuzhiyun regulator-boot-on; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&emmc { 117*4882a593Smuzhiyun bus-width = <8>; 118*4882a593Smuzhiyun cap-mmc-highspeed; 119*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 120*4882a593Smuzhiyun non-removable; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&gmac { 127*4882a593Smuzhiyun phy-supply = <&vcc_lan>; 128*4882a593Smuzhiyun phy-mode = "rmii"; 129*4882a593Smuzhiyun clock_in_out = "output"; 130*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; 131*4882a593Smuzhiyun snps,reset-active-low; 132*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 1000000>; 133*4882a593Smuzhiyun pinctrl-names = "default"; 134*4882a593Smuzhiyun pinctrl-0 = <&rmii_pins>; 135*4882a593Smuzhiyun tx_delay = <0x30>; 136*4882a593Smuzhiyun rx_delay = <0x10>; 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&i2c0 { 141*4882a593Smuzhiyun status = "okay"; 142*4882a593Smuzhiyun}; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun&pinctrl { 145*4882a593Smuzhiyun pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { 146*4882a593Smuzhiyun bias-disable; 147*4882a593Smuzhiyun drive-strength = <8>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { 151*4882a593Smuzhiyun bias-pull-up; 152*4882a593Smuzhiyun drive-strength = <8>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun backlight { 156*4882a593Smuzhiyun bl_en: bl-en { 157*4882a593Smuzhiyun rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun emmc { 162*4882a593Smuzhiyun emmc_bus8: emmc-bus8 { 163*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>, 164*4882a593Smuzhiyun <1 RK_PC3 2 &pcfg_pull_up_drv_8ma>, 165*4882a593Smuzhiyun <1 RK_PC4 2 &pcfg_pull_up_drv_8ma>, 166*4882a593Smuzhiyun <1 RK_PC5 2 &pcfg_pull_up_drv_8ma>, 167*4882a593Smuzhiyun <1 RK_PC6 2 &pcfg_pull_up_drv_8ma>, 168*4882a593Smuzhiyun <1 RK_PC7 2 &pcfg_pull_up_drv_8ma>, 169*4882a593Smuzhiyun <1 RK_PD0 2 &pcfg_pull_up_drv_8ma>, 170*4882a593Smuzhiyun <1 RK_PD1 2 &pcfg_pull_up_drv_8ma>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun emmc-clk { 174*4882a593Smuzhiyun rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun emmc-cmd { 178*4882a593Smuzhiyun rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun emmc_reset: emmc-reset { 182*4882a593Smuzhiyun rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun keys { 187*4882a593Smuzhiyun pwr_key: pwr-key { 188*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun pmic { 193*4882a593Smuzhiyun pmic_int: pmic-int { 194*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun sdio { 199*4882a593Smuzhiyun wifi_reg_on: wifi-reg-on { 200*4882a593Smuzhiyun rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun bt_rst: bt-rst { 204*4882a593Smuzhiyun rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun usb { 209*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 210*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&pwm0 { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&tsadc { 220*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 221*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 222*4882a593Smuzhiyun status = "okay"; 223*4882a593Smuzhiyun}; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun&uart2 { 226*4882a593Smuzhiyun status = "okay"; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&usb_host0_ehci { 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&usb_otg { 234*4882a593Smuzhiyun dr_mode = "host"; 235*4882a593Smuzhiyun status = "okay"; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&wdt { 239*4882a593Smuzhiyun status = "okay"; 240*4882a593Smuzhiyun}; 241