xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3358-evb-ddr3.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd
4 *
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/rockchip.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/display/drm_mipi_dsi.h>
11#include "rk3358.dtsi"
12
13/ {
14	adc-keys {
15		compatible = "adc-keys";
16		io-channels = <&saradc 2>;
17		io-channel-names = "buttons";
18		poll-interval = <100>;
19		keyup-threshold-microvolt = <1800000>;
20
21		esc-key {
22			linux,code = <KEY_ESC>;
23			label = "esc";
24			press-threshold-microvolt = <1310000>;
25		};
26
27		home-key {
28			linux,code = <KEY_HOME>;
29			label = "home";
30			press-threshold-microvolt = <624000>;
31		};
32
33		menu-key {
34			linux,code = <KEY_MENU>;
35			label = "menu";
36			press-threshold-microvolt = <987000>;
37		};
38
39		vol-down-key {
40			linux,code = <KEY_VOLUMEDOWN>;
41			label = "volume down";
42			press-threshold-microvolt = <300000>;
43		};
44
45		vol-up-key {
46			linux,code = <KEY_VOLUMEUP>;
47			label = "volume up";
48			press-threshold-microvolt = <17000>;
49		};
50	};
51
52	backlight: backlight {
53		compatible = "pwm-backlight";
54		pwms = <&pwm1 0 25000 0>;
55		brightness-levels = <
56			  0   1   2   3   4   5   6   7
57			  8   9  10  11  12  13  14  15
58			 16  17  18  19  20  21  22  23
59			 24  25  26  27  28  29  30  31
60			 32  33  34  35  36  37  38  39
61			 40  41  42  43  44  45  46  47
62			 48  49  50  51  52  53  54  55
63			 56  57  58  59  60  61  62  63
64			 64  65  66  67  68  69  70  71
65			 72  73  74  75  76  77  78  79
66			 80  81  82  83  84  85  86  87
67			 88  89  90  91  92  93  94  95
68			 96  97  98  99 100 101 102 103
69			104 105 106 107 108 109 110 111
70			112 113 114 115 116 117 118 119
71			120 121 122 123 124 125 126 127
72			128 129 130 131 132 133 134 135
73			136 137 138 139 140 141 142 143
74			144 145 146 147 148 149 150 151
75			152 153 154 155 156 157 158 159
76			160 161 162 163 164 165 166 167
77			168 169 170 171 172 173 174 175
78			176 177 178 179 180 181 182 183
79			184 185 186 187 188 189 190 191
80			192 193 194 195 196 197 198 199
81			200 201 202 203 204 205 206 207
82			208 209 210 211 212 213 214 215
83			216 217 218 219 220 221 222 223
84			224 225 226 227 228 229 230 231
85			232 233 234 235 236 237 238 239
86			240 241 242 243 244 245 246 247
87			248 249 250 251 252 253 254 255>;
88		default-brightness-level = <200>;
89	};
90
91	charge-animation {
92		compatible = "rockchip,uboot-charge";
93		rockchip,uboot-charge-on = <0>;
94		rockchip,android-charge-on = <1>;
95		rockchip,uboot-low-power-voltage = <3500>;
96		rockchip,screen-on-voltage = <3600>;
97		status = "okay";
98	};
99
100	rk809_sound: rk809-sound {
101		status = "okay";
102		compatible = "rockchip,multicodecs-card";
103		rockchip,card-name = "rockchip-rk809";
104		hp-det-gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
105		io-channels = <&saradc 1>;
106		io-channel-names = "adc-detect";
107		keyup-threshold-microvolt = <1800000>;
108		poll-interval = <100>;
109		rockchip,format = "i2s";
110		rockchip,mclk-fs = <256>;
111		rockchip,cpu = <&i2s1_2ch>;
112		rockchip,codec = <&rk809_codec>;
113		pinctrl-names = "default";
114		pinctrl-0 = <&hp_det>;
115		play-pause-key {
116			label = "playpause";
117			linux,code = <KEY_PLAYPAUSE>;
118			press-threshold-microvolt = <2000>;
119		};
120	};
121
122	sdio_pwrseq: sdio-pwrseq {
123		compatible = "mmc-pwrseq-simple";
124		/*clocks = <&rk809 1>;*/
125		/*clock-names = "ext_clock";*/
126		pinctrl-names = "default";
127		pinctrl-0 = <&wifi_enable_h>;
128
129		/*
130		 * On the module itself this is one of these (depending
131		 * on the actual card populated):
132		 * - SDIO_RESET_L_WL_REG_ON
133		 * - PDN (power down when low)
134		 */
135		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
136	};
137
138	vcc_phy: vcc-phy-regulator {
139		compatible = "regulator-fixed";
140		regulator-name = "vcc_phy";
141		regulator-always-on;
142		regulator-boot-on;
143	};
144
145	vcc5v0_sys: vccsys {
146		compatible = "regulator-fixed";
147		regulator-name = "vcc5v0_sys";
148		regulator-always-on;
149		regulator-boot-on;
150		regulator-min-microvolt = <5000000>;
151		regulator-max-microvolt = <5000000>;
152	};
153
154	vcc5v0_host_vbus: vcc5v0-host-regulator {
155		compatible = "regulator-fixed";
156		gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
157		pinctrl-names = "default";
158		pinctrl-0 = <&host_vbus_drv>;
159		regulator-name = "vcc5v0_host_vbus";
160		regulator-min-microvolt = <5000000>;
161		regulator-max-microvolt = <5000000>;
162		regulator-always-on;
163		enable-active-high;
164	};
165
166	wireless-wlan {
167		compatible = "wlan-platdata";
168		wifi_chip_type = "AP6210";
169		WIFI,host_wake_irq = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
170		status = "okay";
171	};
172
173	wireless-bluetooth {
174		compatible = "bluetooth-platdata";
175		clocks = <&rk809 1>;
176		clock-names = "ext_clock";
177		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
178		pinctrl-names = "default","rts_gpio";
179		pinctrl-0 = <&uart1_rts>;
180		pinctrl-1 = <&uart1_rts_gpio>;
181		BT,reset_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
182		BT,wake_gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
183		BT,wake_host_irq = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
184		status = "okay";
185	};
186};
187
188&display_subsystem {
189	status = "okay";
190};
191
192&dsi {
193	status = "okay";
194
195	panel@0 {
196		compatible = "sitronix,st7703", "simple-panel-dsi";
197		reg = <0>;
198		power-supply = <&vcc3v3_lcd>;
199		backlight = <&backlight>;
200		prepare-delay-ms = <0>;
201		reset-delay-ms = <0>;
202		init-delay-ms = <80>;
203		enable-delay-ms = <0>;
204		disable-delay-ms = <10>;
205		unprepare-delay-ms = <60>;
206
207		width-mm = <68>;
208		height-mm = <121>;
209
210		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
211			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
212		dsi,format = <MIPI_DSI_FMT_RGB888>;
213		dsi,lanes = <4>;
214
215		panel-init-sequence = [
216			39 00 04 ff 98 81 03
217			15 00 02 01 00
218			15 00 02 02 00
219			15 00 02 03 53
220			15 00 02 04 53
221			15 00 02 05 13
222			15 00 02 06 04
223			15 00 02 07 02
224			15 00 02 08 02
225			15 00 02 09 00
226			15 00 02 0a 00
227			15 00 02 0b 00
228			15 00 02 0c 00
229			15 00 02 0d 00
230			15 00 02 0e 00
231			15 00 02 0f 00
232
233			15 00 02 10 00
234			15 00 02 11 00
235			15 00 02 12 00
236			15 00 02 13 00
237			15 00 02 14 00
238			15 00 02 15 08
239			15 00 02 16 10
240			15 00 02 17 00
241			15 00 02 18 08
242			15 00 02 19 00
243			15 00 02 1a 00
244			15 00 02 1b 00
245			15 00 02 1c 00
246			15 00 02 1d 00
247			15 00 02 1e c0
248			15 00 02 1f 80
249
250			15 00 02 20 02
251			15 00 02 21 09
252			15 00 02 22 00
253			15 00 02 23 00
254			15 00 02 24 00
255			15 00 02 25 00
256			15 00 02 26 00
257			15 00 02 27 00
258			15 00 02 28 55
259			15 00 02 29 03
260			15 00 02 2a 00
261			15 00 02 2b 00
262			15 00 02 2c 00
263			15 00 02 2d 00
264			15 00 02 2e 00
265			15 00 02 2f 00
266
267			15 00 02 30 00
268			15 00 02 31 00
269			15 00 02 32 00
270			15 00 02 33 00
271			15 00 02 34 04
272			15 00 02 35 05
273			15 00 02 36 05
274			15 00 02 37 00
275			15 00 02 38 3c
276			15 00 02 39 35
277			15 00 02 3a 00
278			15 00 02 3b 40
279			15 00 02 3c 00
280			15 00 02 3d 00
281			15 00 02 3e 00
282			15 00 02 3f 00
283
284			15 00 02 40 00
285			15 00 02 41 88
286			15 00 02 42 00
287			15 00 02 43 00
288			15 00 02 44 1f
289
290			15 00 02 50 01
291			15 00 02 51 23
292			15 00 02 52 45
293			15 00 02 53 67
294			15 00 02 54 89
295			15 00 02 55 ab
296			15 00 02 56 01
297			15 00 02 57 23
298			15 00 02 58 45
299			15 00 02 59 67
300			15 00 02 5a 89
301			15 00 02 5b ab
302			15 00 02 5c cd
303			15 00 02 5d ef
304			15 00 02 5e 03
305			15 00 02 5f 14
306
307			15 00 02 60 15
308			15 00 02 61 0c
309			15 00 02 62 0d
310			15 00 02 63 0e
311			15 00 02 64 0f
312			15 00 02 65 10
313			15 00 02 66 11
314			15 00 02 67 08
315			15 00 02 68 02
316			15 00 02 69 0a
317			15 00 02 6a 02
318			15 00 02 6b 02
319			15 00 02 6c 02
320			15 00 02 6d 02
321			15 00 02 6e 02
322			15 00 02 6f 02
323
324			15 00 02 70 02
325			15 00 02 71 02
326			15 00 02 72 06
327			15 00 02 73 02
328			15 00 02 74 02
329			15 00 02 75 14
330			15 00 02 76 15
331			15 00 02 77 0f
332			15 00 02 78 0e
333			15 00 02 79 0d
334			15 00 02 7a 0c
335			15 00 02 7b 11
336			15 00 02 7c 10
337			15 00 02 7d 06
338			15 00 02 7e 02
339			15 00 02 7f 0a
340
341			15 00 02 80 02
342			15 00 02 81 02
343			15 00 02 82 02
344			15 00 02 83 02
345			15 00 02 84 02
346			15 00 02 85 02
347			15 00 02 86 02
348			15 00 02 87 02
349			15 00 02 88 08
350			15 00 02 89 02
351			15 00 02 8a 02
352
353			39 00 04 ff 98 81 04
354			15 00 02 00 80
355			15 00 02 70 00
356			15 00 02 71 00
357			15 00 02 66 fe
358			15 00 02 82 15
359			15 00 02 84 15
360			15 00 02 85 15
361			15 00 02 3a 24
362			15 00 02 32 ac
363			15 00 02 8c 80
364			15 00 02 3c f5
365			15 00 02 88 33
366
367			39 00 04 ff 98 81 01
368			15 00 02 22 0a
369			15 00 02 31 00
370			15 00 02 53 78
371			15 00 02 50 5b
372			15 00 02 51 5b
373			15 00 02 60 20
374			15 00 02 61 00
375			15 00 02 62 0d
376			15 00 02 63 00
377
378			15 00 02 a0 00
379			15 00 02 a1 10
380			15 00 02 a2 1c
381			15 00 02 a3 13
382			15 00 02 a4 15
383			15 00 02 a5 26
384			15 00 02 a6 1a
385			15 00 02 a7 1d
386			15 00 02 a8 67
387			15 00 02 a9 1c
388			15 00 02 aa 29
389			15 00 02 ab 5b
390			15 00 02 ac 26
391			15 00 02 ad 28
392			15 00 02 ae 5c
393			15 00 02 af 30
394			15 00 02 b0 31
395			15 00 02 b1 2e
396			15 00 02 b2 32
397			15 00 02 b3 00
398
399			15 00 02 c0 00
400			15 00 02 c1 10
401			15 00 02 c2 1c
402			15 00 02 c3 13
403			15 00 02 c4 15
404			15 00 02 c5 26
405			15 00 02 c6 1a
406			15 00 02 c7 1d
407			15 00 02 c8 67
408			15 00 02 c9 1c
409			15 00 02 ca 29
410			15 00 02 cb 5b
411			15 00 02 cc 26
412			15 00 02 cd 28
413			15 00 02 ce 5c
414			15 00 02 cf 30
415			15 00 02 d0 31
416			15 00 02 d1 2e
417			15 00 02 d2 32
418			15 00 02 d3 00
419			39 00 04 ff 98 81 00
420			05 00 01 11
421			05 01 01 29
422		];
423
424		panel-exit-sequence = [
425			05 00 01 28
426			05 00 01 10
427		];
428
429		display-timings {
430			native-mode = <&timing1>;
431
432			timing1: timing1 {
433				clock-frequency = <64000000>;
434				hactive = <720>;
435				vactive = <1280>;
436				hfront-porch = <40>;
437				hsync-len = <10>;
438				hback-porch = <40>;
439				vfront-porch = <22>;
440				vsync-len = <4>;
441				vback-porch = <11>;
442				hsync-active = <0>;
443				vsync-active = <0>;
444				de-active = <0>;
445				pixelclk-active = <0>;
446			};
447		};
448
449		ports {
450			#address-cells = <1>;
451			#size-cells = <0>;
452
453			port@0 {
454				reg = <0>;
455				panel_in_dsi: endpoint {
456					remote-endpoint = <&dsi_out_panel>;
457				};
458			};
459		};
460
461	};
462
463	ports {
464		#address-cells = <1>;
465		#size-cells = <0>;
466
467		port@1 {
468			reg = <1>;
469			dsi_out_panel: endpoint {
470				remote-endpoint = <&panel_in_dsi>;
471			};
472		};
473	};
474};
475
476&dsi_in_vopb {
477	status = "okay";
478};
479
480&dsi_in_vopl {
481	status = "disabled";
482};
483
484&route_dsi {
485	connect = <&vopb_out_dsi>;
486	status = "okay";
487};
488
489&cpu0 {
490	cpu-supply = <&vdd_arm>;
491};
492
493&dfi {
494	status = "okay";
495};
496
497&dmc {
498	center-supply = <&vdd_logic>;
499	status = "okay";
500};
501
502&emmc {
503	bus-width = <8>;
504	cap-mmc-highspeed;
505	mmc-hs200-1_8v;
506	supports-emmc;
507	disable-wp;
508	non-removable;
509	num-slots = <1>;
510	status = "okay";
511};
512
513&gmac {
514	phy-supply = <&vcc_phy>;
515	clock_in_out = "output";
516	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
517	snps,reset-active-low;
518	snps,reset-delays-us = <0 50000 50000>;
519	status = "okay";
520};
521
522&gpu {
523	mali-supply = <&vdd_logic>;
524	status = "okay";
525};
526
527&i2c0 {
528	status = "okay";
529
530	rk809: pmic@20 {
531		compatible = "rockchip,rk809";
532		reg = <0x20>;
533		interrupt-parent = <&gpio0>;
534		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
535		pinctrl-names = "default", "pmic-sleep",
536				"pmic-power-off", "pmic-reset";
537		pinctrl-0 = <&pmic_int>;
538		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
539		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
540		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
541		rockchip,system-power-controller;
542		wakeup-source;
543		#clock-cells = <1>;
544		clock-output-names = "rk808-clkout1", "rk808-clkout2";
545		//fb-inner-reg-idxs = <2>;
546		/* 1: rst regs (default in codes), 0: rst the pmic */
547		pmic-reset-func = <1>;
548
549		vcc1-supply = <&vcc5v0_sys>;
550		vcc2-supply = <&vcc5v0_sys>;
551		vcc3-supply = <&vcc5v0_sys>;
552		vcc4-supply = <&vcc5v0_sys>;
553		vcc5-supply = <&vcc3v3_sys>;
554		vcc6-supply = <&vcc3v3_sys>;
555		vcc7-supply = <&vcc3v3_sys>;
556		vcc8-supply = <&vcc3v3_sys>;
557		vcc9-supply = <&vcc5v0_sys>;
558
559		pwrkey {
560			status = "okay";
561		};
562
563		pinctrl_rk8xx: pinctrl_rk8xx {
564			gpio-controller;
565			#gpio-cells = <2>;
566
567			rk817_slppin_null: rk817_slppin_null {
568				pins = "gpio_slp";
569				function = "pin_fun0";
570			};
571
572			rk817_slppin_slp: rk817_slppin_slp {
573				pins = "gpio_slp";
574				function = "pin_fun1";
575			};
576
577			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
578				pins = "gpio_slp";
579				function = "pin_fun2";
580			};
581
582			rk817_slppin_rst: rk817_slppin_rst {
583				pins = "gpio_slp";
584				function = "pin_fun3";
585			};
586		};
587
588		regulators {
589			vdd_logic: DCDC_REG1 {
590				regulator-always-on;
591				regulator-boot-on;
592				regulator-min-microvolt = <950000>;
593				regulator-max-microvolt = <1350000>;
594				regulator-ramp-delay = <6001>;
595				regulator-initial-mode = <0x2>;
596				regulator-name = "vdd_logic";
597				regulator-state-mem {
598					regulator-on-in-suspend;
599					regulator-suspend-microvolt = <950000>;
600				};
601			};
602
603			vdd_arm: DCDC_REG2 {
604				regulator-always-on;
605				regulator-boot-on;
606				regulator-min-microvolt = <950000>;
607				regulator-max-microvolt = <1350000>;
608				regulator-ramp-delay = <6001>;
609				regulator-initial-mode = <0x2>;
610				regulator-name = "vdd_arm";
611				regulator-state-mem {
612					regulator-off-in-suspend;
613					regulator-suspend-microvolt = <950000>;
614				};
615			};
616
617			vcc_ddr: DCDC_REG3 {
618				regulator-always-on;
619				regulator-boot-on;
620				regulator-name = "vcc_ddr";
621				regulator-initial-mode = <0x2>;
622				regulator-state-mem {
623					regulator-on-in-suspend;
624				};
625			};
626
627			vcc_3v0: DCDC_REG4 {
628				regulator-always-on;
629				regulator-boot-on;
630				regulator-min-microvolt = <3300000>;
631				regulator-max-microvolt = <3300000>;
632				regulator-initial-mode = <0x2>;
633				regulator-name = "vcc_3v0";
634				regulator-state-mem {
635					regulator-on-in-suspend;
636					regulator-suspend-microvolt = <3300000>;
637				};
638			};
639
640			vcc_1v0: LDO_REG1 {
641				regulator-always-on;
642				regulator-boot-on;
643				regulator-min-microvolt = <1000000>;
644				regulator-max-microvolt = <1000000>;
645				regulator-name = "vcc_1v0";
646				regulator-state-mem {
647					regulator-on-in-suspend;
648					regulator-suspend-microvolt = <1000000>;
649				};
650			};
651
652			vcc1v8_soc: LDO_REG2 {
653				regulator-always-on;
654				regulator-boot-on;
655				regulator-min-microvolt = <1800000>;
656				regulator-max-microvolt = <1800000>;
657
658				regulator-name = "vcc1v8_soc";
659				regulator-state-mem {
660					regulator-on-in-suspend;
661					regulator-suspend-microvolt = <1800000>;
662				};
663			};
664
665			vdd1v0_soc: LDO_REG3 {
666				regulator-always-on;
667				regulator-boot-on;
668				regulator-min-microvolt = <1000000>;
669				regulator-max-microvolt = <1000000>;
670
671				regulator-name = "vcc1v0_soc";
672				regulator-state-mem {
673					regulator-on-in-suspend;
674					regulator-suspend-microvolt = <1000000>;
675				};
676			};
677
678			vcc3v0_pmu: LDO_REG4 {
679				regulator-always-on;
680				regulator-boot-on;
681				regulator-min-microvolt = <3000000>;
682				regulator-max-microvolt = <3000000>;
683
684				regulator-name = "vcc3v0_pmu";
685				regulator-state-mem {
686					regulator-on-in-suspend;
687					regulator-suspend-microvolt = <3000000>;
688
689				};
690			};
691
692			vccio_sd: LDO_REG5 {
693				regulator-always-on;
694				regulator-boot-on;
695				regulator-min-microvolt = <1800000>;
696				regulator-max-microvolt = <3300000>;
697
698				regulator-name = "vccio_sd";
699				regulator-state-mem {
700					regulator-on-in-suspend;
701					regulator-suspend-microvolt = <3300000>;
702				};
703			};
704
705			vcc_sd: LDO_REG6 {
706				regulator-min-microvolt = <3300000>;
707				regulator-max-microvolt = <3300000>;
708				regulator-boot-on;
709
710				regulator-name = "vcc_sd";
711				regulator-state-mem {
712					regulator-on-in-suspend;
713					regulator-suspend-microvolt = <3300000>;
714
715				};
716			};
717
718			vcc2v8_dvp: LDO_REG7 {
719				regulator-boot-on;
720				regulator-min-microvolt = <2800000>;
721				regulator-max-microvolt = <2800000>;
722
723				regulator-name = "vcc2v8_dvp";
724				regulator-state-mem {
725					regulator-off-in-suspend;
726					regulator-suspend-microvolt = <2800000>;
727				};
728			};
729
730			vcc1v8_dvp: LDO_REG8 {
731				regulator-boot-on;
732				regulator-min-microvolt = <1800000>;
733				regulator-max-microvolt = <1800000>;
734
735				regulator-name = "vcc1v8_dvp";
736				regulator-state-mem {
737					regulator-on-in-suspend;
738					regulator-suspend-microvolt = <1800000>;
739				};
740			};
741
742			vdd1v5_dvp: LDO_REG9 {
743				regulator-boot-on;
744				regulator-min-microvolt = <1500000>;
745				regulator-max-microvolt = <1500000>;
746
747				regulator-name = "vdd1v5_dvp";
748				regulator-state-mem {
749					regulator-off-in-suspend;
750					regulator-suspend-microvolt = <1500000>;
751				};
752			};
753
754			vcc3v3_sys: DCDC_REG5 {
755				regulator-always-on;
756				regulator-boot-on;
757				regulator-min-microvolt = <3300000>;
758				regulator-max-microvolt = <3300000>;
759				regulator-name = "vcc3v3_sys";
760				regulator-state-mem {
761					regulator-on-in-suspend;
762					regulator-suspend-microvolt = <3300000>;
763				};
764			};
765
766			vcc5v0_host: SWITCH_REG1 {
767				regulator-always-on;
768				regulator-boot-on;
769				regulator-name = "vcc5v0_host";
770			};
771
772			vcc3v3_lcd: SWITCH_REG2 {
773				regulator-boot-on;
774				regulator-name = "vcc3v3_lcd";
775			};
776		};
777
778		rk809_codec: codec {
779			#sound-dai-cells = <0>;
780			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
781			clocks = <&cru SCLK_I2S1_OUT>;
782			clock-names = "mclk";
783			pinctrl-names = "default";
784			pinctrl-0 = <&i2s1_2ch_mclk>;
785			hp-volume = <20>;
786			spk-volume = <3>;
787			status = "okay";
788		};
789	};
790};
791
792&i2c1 {
793	status = "okay";
794
795	gt1x: gt1x@14 {
796		compatible = "goodix,gt1x";
797		reg = <0x14>;
798		power-supply = <&vcc3v3_lcd>;
799		goodix,rst-gpio = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
800		goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>;
801	};
802};
803
804&i2c2 {
805	status = "okay";
806
807	clock-frequency = <100000>;
808
809	/* These are relatively safe rise/fall times; TODO: measure */
810	i2c-scl-falling-time-ns = <50>;
811	i2c-scl-rising-time-ns = <300>;
812
813	ov5695: ov5695@36 {
814		compatible = "ovti,ov5695";
815		reg = <0x36>;
816		clocks = <&cru SCLK_CIF_OUT>;
817		clock-names = "xvclk";
818
819		avdd-supply = <&vcc2v8_dvp>;
820		dovdd-supply = <&vcc1v8_dvp>;
821		dvdd-supply = <&vdd1v5_dvp>;
822
823		/*reset-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;*/
824		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
825		pinctrl-names = "default";
826		pinctrl-0 = <&cif_clkout_m0>;
827		port {
828			ucam_out: endpoint {
829				remote-endpoint = <&mipi_in_ucam>;
830				data-lanes = <1 2>;
831			};
832		};
833	};
834};
835
836&i2s1_2ch {
837	status = "okay";
838	#sound-dai-cells = <0>;
839};
840
841&io_domains {
842	status = "okay";
843
844	vccio1-supply = <&vcc_3v0>;
845	vccio2-supply = <&vccio_sd>;
846	vccio3-supply = <&vcc_3v0>;
847	vccio4-supply = <&vcc3v0_pmu>;
848	vccio5-supply = <&vcc_3v0>;
849};
850
851&isp_mmu {
852	status = "okay";
853};
854
855&mipi_dphy_rx0 {
856	status = "okay";
857
858	ports {
859		#address-cells = <1>;
860		#size-cells = <0>;
861
862		port@0 {
863			reg = <0>;
864			#address-cells = <1>;
865			#size-cells = <0>;
866
867			mipi_in_ucam: endpoint@1 {
868				reg = <1>;
869				remote-endpoint = <&ucam_out>;
870				data-lanes = <1 2>;
871			};
872		};
873
874		port@1 {
875			reg = <1>;
876			#address-cells = <1>;
877			#size-cells = <0>;
878
879			dphy_rx0_out: endpoint@0 {
880				reg = <0>;
881				remote-endpoint = <&isp0_mipi_in>;
882			};
883		};
884	};
885};
886
887&nandc0 {
888	status = "okay";
889};
890
891&pmu_io_domains {
892	status = "okay";
893
894	pmuio1-supply = <&vcc3v0_pmu>;
895	pmuio2-supply = <&vcc3v0_pmu>;
896};
897
898&pwm1 {
899	status = "okay";
900};
901
902&rk_rga {
903	status = "okay";
904};
905
906&rkisp1 {
907	status = "okay";
908
909	port {
910		#address-cells = <1>;
911		#size-cells = <0>;
912
913		isp0_mipi_in: endpoint@0 {
914			reg = <0>;
915			remote-endpoint = <&dphy_rx0_out>;
916		};
917	};
918};
919
920&rockchip_suspend {
921	status = "okay";
922	rockchip,sleep-debug-en = <1>;
923};
924
925&saradc {
926	status = "okay";
927	vref-supply = <&vcc1v8_soc>;
928};
929
930&sdmmc {
931	bus-width = <4>;
932	cap-mmc-highspeed;
933	cap-sd-highspeed;
934	supports-sd;
935	card-detect-delay = <800>;
936	ignore-pm-notify;
937	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
938	sd-uhs-sdr12;
939	sd-uhs-sdr25;
940	sd-uhs-sdr50;
941	sd-uhs-sdr104;
942	vqmmc-supply = <&vccio_sd>;
943	vmmc-supply = <&vcc_sd>;
944	status = "okay";
945};
946
947&sdio {
948	bus-width = <4>;
949	cap-sd-highspeed;
950	supports-sdio;
951	ignore-pm-notify;
952	keep-power-in-suspend;
953	non-removable;
954	mmc-pwrseq = <&sdio_pwrseq>;
955	sd-uhs-sdr104;
956	status = "okay";
957};
958
959&tsadc {
960	pinctrl-names = "gpio", "otpout";
961	pinctrl-0 = <&tsadc_otp_gpio>;
962	pinctrl-1 = <&tsadc_otp_out>;
963	status = "okay";
964};
965
966&uart1 {
967	pinctrl-names = "default";
968	pinctrl-0 = <&uart1_xfer &uart1_cts>;
969	status = "okay";
970};
971
972&u2phy {
973	status = "okay";
974
975	u2phy_host: host-port {
976		status = "okay";
977		phy-supply = <&vcc5v0_host_vbus>;
978	};
979
980	u2phy_otg: otg-port {
981		status = "okay";
982	};
983};
984
985&usb20_otg {
986	status = "okay";
987};
988
989&usb_host0_ehci {
990	status = "okay";
991};
992
993&usb_host0_ohci {
994	status = "okay";
995};
996
997&vopb {
998	status = "okay";
999};
1000
1001&vopb_mmu {
1002	status = "okay";
1003};
1004
1005&vopl {
1006	status = "okay";
1007};
1008
1009&vopl_mmu {
1010	status = "okay";
1011};
1012
1013&mpp_srv {
1014	status = "okay";
1015};
1016
1017&vdpu {
1018	status = "okay";
1019};
1020
1021&vepu {
1022	status = "okay";
1023};
1024
1025&vpu_mmu {
1026	status = "okay";
1027};
1028
1029&hevc {
1030	status = "okay";
1031};
1032
1033&hevc_mmu {
1034	status = "okay";
1035};
1036
1037&pinctrl {
1038	headphone {
1039		hp_det: hp-det {
1040			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
1041		};
1042	};
1043
1044	pmic {
1045		pmic_int: pmic_int {
1046			rockchip,pins =
1047				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
1048		};
1049
1050		soc_slppin_gpio: soc_slppin_gpio {
1051			rockchip,pins =
1052				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
1053		};
1054
1055		soc_slppin_slp: soc_slppin_slp {
1056			rockchip,pins =
1057				<0 RK_PA4 1 &pcfg_pull_none>;
1058		};
1059
1060		soc_slppin_rst: soc_slppin_rst {
1061			rockchip,pins =
1062				<0 RK_PA4 2 &pcfg_pull_none>;
1063		};
1064	};
1065
1066	sdio-pwrseq {
1067		wifi_enable_h: wifi-enable-h {
1068			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
1069		};
1070	};
1071
1072	usb {
1073		host_vbus_drv: host-vbus-drv {
1074			rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
1075		};
1076	};
1077};
1078