xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3328-rock64-android.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "rk3328.dtsi"
8*4882a593Smuzhiyun#include "rk3328-android.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	gmac_clkin: external-gmac-clock {
13*4882a593Smuzhiyun		compatible = "fixed-clock";
14*4882a593Smuzhiyun		clock-frequency = <125000000>;
15*4882a593Smuzhiyun		clock-output-names = "gmac_clkin";
16*4882a593Smuzhiyun		#clock-cells = <0>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
20*4882a593Smuzhiyun		compatible = "regulator-fixed";
21*4882a593Smuzhiyun		gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
22*4882a593Smuzhiyun		pinctrl-names = "default";
23*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc0m1_gpio>;
24*4882a593Smuzhiyun		regulator-name = "vcc_sd";
25*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
26*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
27*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	vcc_host_5v: vcc-host-5v-regulator {
31*4882a593Smuzhiyun		compatible = "regulator-fixed";
32*4882a593Smuzhiyun		enable-active-high;
33*4882a593Smuzhiyun		gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
34*4882a593Smuzhiyun		pinctrl-names = "default";
35*4882a593Smuzhiyun		pinctrl-0 = <&usb30_host_drv>;
36*4882a593Smuzhiyun		regulator-name = "vcc_host_5v";
37*4882a593Smuzhiyun		regulator-always-on;
38*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun		enable-active-high;
44*4882a593Smuzhiyun		gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
45*4882a593Smuzhiyun		pinctrl-names = "default";
46*4882a593Smuzhiyun		pinctrl-0 = <&usb20_host_drv>;
47*4882a593Smuzhiyun		regulator-name = "vcc_host1_5v";
48*4882a593Smuzhiyun		regulator-always-on;
49*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	vcc_sys: vcc-sys {
53*4882a593Smuzhiyun		compatible = "regulator-fixed";
54*4882a593Smuzhiyun		regulator-name = "vcc_sys";
55*4882a593Smuzhiyun		regulator-always-on;
56*4882a593Smuzhiyun		regulator-boot-on;
57*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
58*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	sound {
62*4882a593Smuzhiyun		compatible = "simple-audio-card";
63*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
64*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
65*4882a593Smuzhiyun		simple-audio-card,name = "rockchip-rk3328";
66*4882a593Smuzhiyun		simple-audio-card,cpu {
67*4882a593Smuzhiyun			sound-dai = <&i2s1>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun		simple-audio-card,codec {
70*4882a593Smuzhiyun			sound-dai = <&codec>;
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	hdmi-sound {
75*4882a593Smuzhiyun		compatible = "simple-audio-card";
76*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
77*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
78*4882a593Smuzhiyun		simple-audio-card,name = "rockchip-hdmi";
79*4882a593Smuzhiyun		simple-audio-card,cpu {
80*4882a593Smuzhiyun			sound-dai = <&i2s0>;
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun		simple-audio-card,codec {
83*4882a593Smuzhiyun			sound-dai = <&hdmi>;
84*4882a593Smuzhiyun		};
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
88*4882a593Smuzhiyun		compatible = "regulator-fixed";
89*4882a593Smuzhiyun		regulator-name = "vcc_phy";
90*4882a593Smuzhiyun		regulator-always-on;
91*4882a593Smuzhiyun		regulator-boot-on;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	xin32k: xin32k {
95*4882a593Smuzhiyun		compatible = "fixed-clock";
96*4882a593Smuzhiyun		clock-frequency = <32768>;
97*4882a593Smuzhiyun		clock-output-names = "xin32k";
98*4882a593Smuzhiyun		#clock-cells = <0>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&avsd {
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&codec {
107*4882a593Smuzhiyun	#sound-dai-cells = <0>;
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&cpu0 {
112*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&dfi {
116*4882a593Smuzhiyun	status = "okay";
117*4882a593Smuzhiyun};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun&dmc {
120*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
121*4882a593Smuzhiyun	status = "okay";
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&emmc {
125*4882a593Smuzhiyun	bus-width = <8>;
126*4882a593Smuzhiyun	cap-mmc-highspeed;
127*4882a593Smuzhiyun	mmc-hs200-1_8v;
128*4882a593Smuzhiyun	no-sdio;
129*4882a593Smuzhiyun	no-sd;
130*4882a593Smuzhiyun	disable-wp;
131*4882a593Smuzhiyun	non-removable;
132*4882a593Smuzhiyun	num-slots = <1>;
133*4882a593Smuzhiyun	pinctrl-names = "default";
134*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
135*4882a593Smuzhiyun	status = "okay";
136*4882a593Smuzhiyun};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun&gmac2io {
139*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
140*4882a593Smuzhiyun	phy-mode = "rgmii";
141*4882a593Smuzhiyun	clock_in_out = "input";
142*4882a593Smuzhiyun	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
143*4882a593Smuzhiyun	snps,reset-active-low;
144*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
145*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
146*4882a593Smuzhiyun	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
147*4882a593Smuzhiyun	pinctrl-names = "default";
148*4882a593Smuzhiyun	pinctrl-0 = <&rgmiim1_pins>;
149*4882a593Smuzhiyun	tx_delay = <0x26>;
150*4882a593Smuzhiyun	rx_delay = <0x11>;
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun&gmac2phy {
155*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
156*4882a593Smuzhiyun	clock_in_out = "output";
157*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
158*4882a593Smuzhiyun	assigned-clock-rate = <50000000>;
159*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2PHY>;
160*4882a593Smuzhiyun	assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
161*4882a593Smuzhiyun	status = "disabled";
162*4882a593Smuzhiyun};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun&gpu {
165*4882a593Smuzhiyun	status = "okay";
166*4882a593Smuzhiyun	mali-supply = <&vdd_logic>;
167*4882a593Smuzhiyun};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun&hdmi {
170*4882a593Smuzhiyun	#sound-dai-cells = <0>;
171*4882a593Smuzhiyun	status = "okay";
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&hdmiphy {
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun&i2c1 {
179*4882a593Smuzhiyun	status = "okay";
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	rk805: rk805@18 {
182*4882a593Smuzhiyun		compatible = "rockchip,rk805";
183*4882a593Smuzhiyun		status = "okay";
184*4882a593Smuzhiyun		reg = <0x18>;
185*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
186*4882a593Smuzhiyun		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
187*4882a593Smuzhiyun		pinctrl-names = "default";
188*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
189*4882a593Smuzhiyun		wakeup-source;
190*4882a593Smuzhiyun		gpio-controller;
191*4882a593Smuzhiyun		#gpio-cells = <2>;
192*4882a593Smuzhiyun		#clock-cells = <1>;
193*4882a593Smuzhiyun		clock-output-names = "rk805-clkout1", "rk805-clkout2";
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
196*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
197*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
198*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
199*4882a593Smuzhiyun		vcc5-supply = <&vcc_io>;
200*4882a593Smuzhiyun		vcc6-supply = <&vcc_io>;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun		rtc {
203*4882a593Smuzhiyun			status = "okay";
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		pwrkey {
207*4882a593Smuzhiyun			status = "disabled";
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		gpio {
211*4882a593Smuzhiyun			status = "okay";
212*4882a593Smuzhiyun		};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun		regulators {
215*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
216*4882a593Smuzhiyun				regulator-name = "vdd_logic";
217*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
219*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
220*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
221*4882a593Smuzhiyun				regulator-boot-on;
222*4882a593Smuzhiyun				regulator-always-on;
223*4882a593Smuzhiyun				regulator-state-mem {
224*4882a593Smuzhiyun					regulator-mode = <0x2>;
225*4882a593Smuzhiyun					regulator-on-in-suspend;
226*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
227*4882a593Smuzhiyun				};
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
231*4882a593Smuzhiyun				regulator-name = "vdd_arm";
232*4882a593Smuzhiyun				regulator-init-microvolt = <1225000>;
233*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
234*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
235*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
236*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
237*4882a593Smuzhiyun				regulator-boot-on;
238*4882a593Smuzhiyun				regulator-always-on;
239*4882a593Smuzhiyun				regulator-state-mem {
240*4882a593Smuzhiyun					regulator-mode = <0x2>;
241*4882a593Smuzhiyun					regulator-on-in-suspend;
242*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
243*4882a593Smuzhiyun				};
244*4882a593Smuzhiyun			};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
247*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
248*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
249*4882a593Smuzhiyun				regulator-boot-on;
250*4882a593Smuzhiyun				regulator-always-on;
251*4882a593Smuzhiyun				regulator-state-mem {
252*4882a593Smuzhiyun					regulator-mode = <0x2>;
253*4882a593Smuzhiyun					regulator-on-in-suspend;
254*4882a593Smuzhiyun				};
255*4882a593Smuzhiyun			};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
258*4882a593Smuzhiyun				regulator-name = "vcc_io";
259*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
260*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
261*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
262*4882a593Smuzhiyun				regulator-boot-on;
263*4882a593Smuzhiyun				regulator-always-on;
264*4882a593Smuzhiyun				regulator-state-mem {
265*4882a593Smuzhiyun					regulator-mode = <0x2>;
266*4882a593Smuzhiyun					regulator-on-in-suspend;
267*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
268*4882a593Smuzhiyun				};
269*4882a593Smuzhiyun			};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun			vdd_18: LDO_REG1 {
272*4882a593Smuzhiyun				regulator-name = "vdd_18";
273*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
274*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
275*4882a593Smuzhiyun				regulator-boot-on;
276*4882a593Smuzhiyun				regulator-always-on;
277*4882a593Smuzhiyun				regulator-state-mem {
278*4882a593Smuzhiyun					regulator-on-in-suspend;
279*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
280*4882a593Smuzhiyun				};
281*4882a593Smuzhiyun			};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun			vcc_18emmc: LDO_REG2 {
284*4882a593Smuzhiyun				regulator-name = "vcc_18emmc";
285*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
286*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
287*4882a593Smuzhiyun				regulator-boot-on;
288*4882a593Smuzhiyun				regulator-always-on;
289*4882a593Smuzhiyun				regulator-state-mem {
290*4882a593Smuzhiyun					regulator-on-in-suspend;
291*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
292*4882a593Smuzhiyun				};
293*4882a593Smuzhiyun			};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun			vdd_11: LDO_REG3 {
296*4882a593Smuzhiyun				regulator-name = "vdd_11";
297*4882a593Smuzhiyun				regulator-min-microvolt = <1100000>;
298*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
299*4882a593Smuzhiyun				regulator-boot-on;
300*4882a593Smuzhiyun				regulator-always-on;
301*4882a593Smuzhiyun				regulator-state-mem {
302*4882a593Smuzhiyun					regulator-on-in-suspend;
303*4882a593Smuzhiyun					regulator-suspend-microvolt = <1100000>;
304*4882a593Smuzhiyun				};
305*4882a593Smuzhiyun			};
306*4882a593Smuzhiyun		};
307*4882a593Smuzhiyun	};
308*4882a593Smuzhiyun};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun&i2s0 {
311*4882a593Smuzhiyun	#sound-dai-cells = <0>;
312*4882a593Smuzhiyun	rockchip,bclk-fs = <128>;
313*4882a593Smuzhiyun	status = "okay";
314*4882a593Smuzhiyun};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun&i2s1 {
317*4882a593Smuzhiyun	#sound-dai-cells = <0>;
318*4882a593Smuzhiyun	status = "okay";
319*4882a593Smuzhiyun};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun&iep {
322*4882a593Smuzhiyun	status = "okay";
323*4882a593Smuzhiyun};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun&iep_mmu {
326*4882a593Smuzhiyun	status = "okay";
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&io_domains {
330*4882a593Smuzhiyun	status = "okay";
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun	vccio1-supply = <&vcc_io>;
333*4882a593Smuzhiyun	vccio2-supply = <&vcc_18emmc>;
334*4882a593Smuzhiyun	vccio3-supply = <&vcc_io>;
335*4882a593Smuzhiyun	vccio4-supply = <&vdd_18>;
336*4882a593Smuzhiyun	vccio5-supply = <&vcc_io>;
337*4882a593Smuzhiyun	vccio6-supply = <&vcc_io>;
338*4882a593Smuzhiyun	pmuio-supply = <&vcc_io>;
339*4882a593Smuzhiyun};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun&mpp_srv {
342*4882a593Smuzhiyun	status = "okay";
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&pinctrl {
346*4882a593Smuzhiyun	pmic {
347*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
348*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
349*4882a593Smuzhiyun		};
350*4882a593Smuzhiyun	};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun	usb2 {
353*4882a593Smuzhiyun		usb20_host_drv: usb20-host-drv {
354*4882a593Smuzhiyun			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
355*4882a593Smuzhiyun		};
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun	usb3 {
359*4882a593Smuzhiyun		usb30_host_drv: usb30-host-drv {
360*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
361*4882a593Smuzhiyun		};
362*4882a593Smuzhiyun	};
363*4882a593Smuzhiyun};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun&pwm3 {
366*4882a593Smuzhiyun	status = "okay";
367*4882a593Smuzhiyun	pinctrl-names = "default";
368*4882a593Smuzhiyun	pinctrl-0 = <&pwmir_pin>;
369*4882a593Smuzhiyun	compatible = "rockchip,remotectl-pwm";
370*4882a593Smuzhiyun	remote_pwm_id = <3>;
371*4882a593Smuzhiyun	handle_cpu_id = <1>;
372*4882a593Smuzhiyun	remote_support_psci = <1>;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun	ir_key1 {
375*4882a593Smuzhiyun		rockchip,usercode = <0x4040>;
376*4882a593Smuzhiyun		rockchip,key_table =
377*4882a593Smuzhiyun			<0xf2	KEY_REPLY>,
378*4882a593Smuzhiyun			<0xba	KEY_BACK>,
379*4882a593Smuzhiyun			<0xf4	KEY_UP>,
380*4882a593Smuzhiyun			<0xf1	KEY_DOWN>,
381*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
382*4882a593Smuzhiyun			<0xee	KEY_RIGHT>,
383*4882a593Smuzhiyun			<0xbd	KEY_HOME>,
384*4882a593Smuzhiyun			<0xea	KEY_VOLUMEUP>,
385*4882a593Smuzhiyun			<0xe3	KEY_VOLUMEDOWN>,
386*4882a593Smuzhiyun			<0xe2	KEY_SEARCH>,
387*4882a593Smuzhiyun			<0xb2	KEY_POWER>,
388*4882a593Smuzhiyun			<0xbc	KEY_MUTE>,
389*4882a593Smuzhiyun			<0xec	KEY_MENU>,
390*4882a593Smuzhiyun			<0xbf	0x190>,
391*4882a593Smuzhiyun			<0xe0	0x191>,
392*4882a593Smuzhiyun			<0xe1	0x192>,
393*4882a593Smuzhiyun			<0xe9	183>,
394*4882a593Smuzhiyun			<0xe6	248>,
395*4882a593Smuzhiyun			<0xe8	185>,
396*4882a593Smuzhiyun			<0xe7	186>,
397*4882a593Smuzhiyun			<0xf0	388>,
398*4882a593Smuzhiyun			<0xbe	0x175>;
399*4882a593Smuzhiyun	};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun	ir_key2 {
402*4882a593Smuzhiyun		rockchip,usercode = <0xff00>;
403*4882a593Smuzhiyun		rockchip,key_table =
404*4882a593Smuzhiyun			<0xf9	KEY_HOME>,
405*4882a593Smuzhiyun			<0xbf	KEY_BACK>,
406*4882a593Smuzhiyun			<0xfb	KEY_MENU>,
407*4882a593Smuzhiyun			<0xaa	KEY_REPLY>,
408*4882a593Smuzhiyun			<0xb9	KEY_UP>,
409*4882a593Smuzhiyun			<0xe9	KEY_DOWN>,
410*4882a593Smuzhiyun			<0xb8	KEY_LEFT>,
411*4882a593Smuzhiyun			<0xea	KEY_RIGHT>,
412*4882a593Smuzhiyun			<0xeb	KEY_VOLUMEDOWN>,
413*4882a593Smuzhiyun			<0xef	KEY_VOLUMEUP>,
414*4882a593Smuzhiyun			<0xf7	KEY_MUTE>,
415*4882a593Smuzhiyun			<0xe7	KEY_POWER>,
416*4882a593Smuzhiyun			<0xfc	KEY_POWER>,
417*4882a593Smuzhiyun			<0xa9	KEY_VOLUMEDOWN>,
418*4882a593Smuzhiyun			<0xa8	KEY_PLAYPAUSE>,
419*4882a593Smuzhiyun			<0xe0	KEY_VOLUMEDOWN>,
420*4882a593Smuzhiyun			<0xa5	KEY_VOLUMEDOWN>,
421*4882a593Smuzhiyun			<0xab	183>,
422*4882a593Smuzhiyun			<0xb7	388>,
423*4882a593Smuzhiyun			<0xe8	388>,
424*4882a593Smuzhiyun			<0xf8	184>,
425*4882a593Smuzhiyun			<0xaf	185>,
426*4882a593Smuzhiyun			<0xed	KEY_VOLUMEDOWN>,
427*4882a593Smuzhiyun			<0xee	186>,
428*4882a593Smuzhiyun			<0xb3	KEY_VOLUMEDOWN>,
429*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEDOWN>,
430*4882a593Smuzhiyun			<0xf2	KEY_VOLUMEDOWN>,
431*4882a593Smuzhiyun			<0xf3	KEY_SEARCH>,
432*4882a593Smuzhiyun			<0xb4	KEY_VOLUMEDOWN>,
433*4882a593Smuzhiyun			<0xa4	KEY_SETUP>,
434*4882a593Smuzhiyun			<0xbe	KEY_SEARCH>;
435*4882a593Smuzhiyun	};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun	ir_key3 {
438*4882a593Smuzhiyun		rockchip,usercode = <0x1dcc>;
439*4882a593Smuzhiyun		rockchip,key_table =
440*4882a593Smuzhiyun			<0xee	KEY_REPLY>,
441*4882a593Smuzhiyun			<0xf0	KEY_BACK>,
442*4882a593Smuzhiyun			<0xf8	KEY_UP>,
443*4882a593Smuzhiyun			<0xbb	KEY_DOWN>,
444*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
445*4882a593Smuzhiyun			<0xed	KEY_RIGHT>,
446*4882a593Smuzhiyun			<0xfc	KEY_HOME>,
447*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEUP>,
448*4882a593Smuzhiyun			<0xfd	KEY_VOLUMEDOWN>,
449*4882a593Smuzhiyun			<0xb7	KEY_SEARCH>,
450*4882a593Smuzhiyun			<0xff	KEY_POWER>,
451*4882a593Smuzhiyun			<0xf3	KEY_MUTE>,
452*4882a593Smuzhiyun			<0xbf	KEY_MENU>,
453*4882a593Smuzhiyun			<0xf9	0x191>,
454*4882a593Smuzhiyun			<0xf5	0x192>,
455*4882a593Smuzhiyun			<0xb3	388>,
456*4882a593Smuzhiyun			<0xbe	KEY_1>,
457*4882a593Smuzhiyun			<0xba	KEY_2>,
458*4882a593Smuzhiyun			<0xb2	KEY_3>,
459*4882a593Smuzhiyun			<0xbd	KEY_4>,
460*4882a593Smuzhiyun			<0xf9	KEY_5>,
461*4882a593Smuzhiyun			<0xb1	KEY_6>,
462*4882a593Smuzhiyun			<0xfc	KEY_7>,
463*4882a593Smuzhiyun			<0xf8	KEY_8>,
464*4882a593Smuzhiyun			<0xb0	KEY_9>,
465*4882a593Smuzhiyun			<0xb6	KEY_0>,
466*4882a593Smuzhiyun			<0xb5	KEY_BACKSPACE>;
467*4882a593Smuzhiyun	};
468*4882a593Smuzhiyun};
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun&rga {
471*4882a593Smuzhiyun	status = "okay";
472*4882a593Smuzhiyun};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun&rkvdec {
475*4882a593Smuzhiyun	status = "okay";
476*4882a593Smuzhiyun	vcodec-supply = <&vdd_logic>;
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&rkvdec_mmu {
480*4882a593Smuzhiyun	status = "okay";
481*4882a593Smuzhiyun};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun&rockchip_suspend {
484*4882a593Smuzhiyun	status = "okay";
485*4882a593Smuzhiyun	rockchip,virtual-poweroff = <1>;
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun&sdmmc {
489*4882a593Smuzhiyun	bus-width = <4>;
490*4882a593Smuzhiyun	cap-mmc-highspeed;
491*4882a593Smuzhiyun	cap-sd-highspeed;
492*4882a593Smuzhiyun	disable-wp;
493*4882a593Smuzhiyun	max-frequency = <150000000>;
494*4882a593Smuzhiyun	num-slots = <1>;
495*4882a593Smuzhiyun	pinctrl-names = "default";
496*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
497*4882a593Smuzhiyun	no-sdio;
498*4882a593Smuzhiyun	no-mmc;
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
501*4882a593Smuzhiyun};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun&spi0 {
504*4882a593Smuzhiyun	status = "okay";
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun	flash@0 {
507*4882a593Smuzhiyun		compatible = "gigadevice,gd25q128", "jedec,spi-nor";
508*4882a593Smuzhiyun		#address-cells = <1>;
509*4882a593Smuzhiyun		#size-cells = <1>;
510*4882a593Smuzhiyun		reg = <0>;
511*4882a593Smuzhiyun		m25p,fast-read;
512*4882a593Smuzhiyun		/* The max SCLK of the flash 104/80 MHZ  */
513*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
514*4882a593Smuzhiyun	};
515*4882a593Smuzhiyun};
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun&threshold {
518*4882a593Smuzhiyun	temperature = <90000>; /* millicelsius */
519*4882a593Smuzhiyun};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun&target {
522*4882a593Smuzhiyun	temperature = <105000>; /* millicelsius */
523*4882a593Smuzhiyun};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun&soc_crit {
526*4882a593Smuzhiyun	temperature = <115000>; /* millicelsius */
527*4882a593Smuzhiyun};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun&tsadc {
530*4882a593Smuzhiyun	rockchip,hw-tshut-temp = <120000>;
531*4882a593Smuzhiyun	status = "okay";
532*4882a593Smuzhiyun};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun&u2phy {
535*4882a593Smuzhiyun	status = "okay";
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun};
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun&u2phy_host {
540*4882a593Smuzhiyun	phy-supply = <&vcc_host1_5v>;
541*4882a593Smuzhiyun	status = "okay";
542*4882a593Smuzhiyun};
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun&u2phy_otg {
545*4882a593Smuzhiyun	phy-supply = <&vcc_otg_5v>;
546*4882a593Smuzhiyun	status = "okay";
547*4882a593Smuzhiyun};
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun&u3phy {
550*4882a593Smuzhiyun	phy-supply = <&vcc_host_5v>;
551*4882a593Smuzhiyun	status = "okay";
552*4882a593Smuzhiyun};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun&u3phy_utmi {
555*4882a593Smuzhiyun	status = "okay";
556*4882a593Smuzhiyun};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun&u3phy_pipe {
559*4882a593Smuzhiyun	status = "okay";
560*4882a593Smuzhiyun};
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun&usb20_otg {
563*4882a593Smuzhiyun	status = "okay";
564*4882a593Smuzhiyun};
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun&usb_host0_ehci {
567*4882a593Smuzhiyun	status = "okay";
568*4882a593Smuzhiyun};
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun&usb_host0_ohci {
571*4882a593Smuzhiyun	status = "okay";
572*4882a593Smuzhiyun};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun&usbdrd3 {
575*4882a593Smuzhiyun	status = "okay";
576*4882a593Smuzhiyun};
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun&usbdrd_dwc3 {
579*4882a593Smuzhiyun	status = "okay";
580*4882a593Smuzhiyun};
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun&vdpu {
583*4882a593Smuzhiyun	status = "okay";
584*4882a593Smuzhiyun};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun&vpu_mmu {
587*4882a593Smuzhiyun	status = "okay";
588*4882a593Smuzhiyun};
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun&vepu {
591*4882a593Smuzhiyun	status = "okay";
592*4882a593Smuzhiyun};
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun&vepu_mmu {
595*4882a593Smuzhiyun	status = "okay";
596*4882a593Smuzhiyun};
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun&vepu22 {
599*4882a593Smuzhiyun	status = "okay";
600*4882a593Smuzhiyun};
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun&vepu22_mmu {
603*4882a593Smuzhiyun	status = "okay";
604*4882a593Smuzhiyun};
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun&vop {
607*4882a593Smuzhiyun	status = "okay";
608*4882a593Smuzhiyun};
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun&vop_mmu {
611*4882a593Smuzhiyun	status = "okay";
612*4882a593Smuzhiyun};
613