xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include "rk3328.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "FriendlyElec NanoPi R2S";
14*4882a593Smuzhiyun	compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	gmac_clk: gmac-clock {
21*4882a593Smuzhiyun		compatible = "fixed-clock";
22*4882a593Smuzhiyun		clock-frequency = <125000000>;
23*4882a593Smuzhiyun		clock-output-names = "gmac_clkin";
24*4882a593Smuzhiyun		#clock-cells = <0>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	keys {
28*4882a593Smuzhiyun		compatible = "gpio-keys";
29*4882a593Smuzhiyun		pinctrl-0 = <&reset_button_pin>;
30*4882a593Smuzhiyun		pinctrl-names = "default";
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		reset {
33*4882a593Smuzhiyun			label = "reset";
34*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
35*4882a593Smuzhiyun			linux,code = <KEY_RESTART>;
36*4882a593Smuzhiyun			debounce-interval = <50>;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	leds {
41*4882a593Smuzhiyun		compatible = "gpio-leds";
42*4882a593Smuzhiyun		pinctrl-0 = <&lan_led_pin>,  <&sys_led_pin>, <&wan_led_pin>;
43*4882a593Smuzhiyun		pinctrl-names = "default";
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun		lan_led: led-0 {
46*4882a593Smuzhiyun			gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
47*4882a593Smuzhiyun			label = "nanopi-r2s:green:lan";
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		sys_led: led-1 {
51*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
52*4882a593Smuzhiyun			label = "nanopi-r2s:red:sys";
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		wan_led: led-2 {
56*4882a593Smuzhiyun			gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
57*4882a593Smuzhiyun			label = "nanopi-r2s:green:wan";
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	vcc_io_sdio: sdmmcio-regulator {
62*4882a593Smuzhiyun		compatible = "regulator-gpio";
63*4882a593Smuzhiyun		enable-active-high;
64*4882a593Smuzhiyun		gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
65*4882a593Smuzhiyun		pinctrl-0 = <&sdio_vcc_pin>;
66*4882a593Smuzhiyun		pinctrl-names = "default";
67*4882a593Smuzhiyun		regulator-name = "vcc_io_sdio";
68*4882a593Smuzhiyun		regulator-always-on;
69*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
70*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
71*4882a593Smuzhiyun		regulator-settling-time-us = <5000>;
72*4882a593Smuzhiyun		regulator-type = "voltage";
73*4882a593Smuzhiyun		startup-delay-us = <2000>;
74*4882a593Smuzhiyun		states = <1800000 0x1>,
75*4882a593Smuzhiyun			 <3300000 0x0>;
76*4882a593Smuzhiyun		vin-supply = <&vcc_io_33>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
80*4882a593Smuzhiyun		compatible = "regulator-fixed";
81*4882a593Smuzhiyun		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
82*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc0m1_pin>;
83*4882a593Smuzhiyun		pinctrl-names = "default";
84*4882a593Smuzhiyun		regulator-name = "vcc_sd";
85*4882a593Smuzhiyun		regulator-boot-on;
86*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
87*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
88*4882a593Smuzhiyun		vin-supply = <&vcc_io_33>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	vdd_5v: vdd-5v {
92*4882a593Smuzhiyun		compatible = "regulator-fixed";
93*4882a593Smuzhiyun		regulator-name = "vdd_5v";
94*4882a593Smuzhiyun		regulator-always-on;
95*4882a593Smuzhiyun		regulator-boot-on;
96*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
97*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun&cpu0 {
102*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&cpu1 {
106*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&cpu2 {
110*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&cpu3 {
114*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&display_subsystem {
118*4882a593Smuzhiyun	status = "disabled";
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&gmac2io {
122*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
123*4882a593Smuzhiyun	assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
124*4882a593Smuzhiyun	clock_in_out = "input";
125*4882a593Smuzhiyun	phy-handle = <&rtl8211e>;
126*4882a593Smuzhiyun	phy-mode = "rgmii";
127*4882a593Smuzhiyun	phy-supply = <&vcc_io_33>;
128*4882a593Smuzhiyun	pinctrl-0 = <&rgmiim1_pins>;
129*4882a593Smuzhiyun	pinctrl-names = "default";
130*4882a593Smuzhiyun	rx_delay = <0x18>;
131*4882a593Smuzhiyun	snps,aal;
132*4882a593Smuzhiyun	tx_delay = <0x24>;
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	mdio {
136*4882a593Smuzhiyun		compatible = "snps,dwmac-mdio";
137*4882a593Smuzhiyun		#address-cells = <1>;
138*4882a593Smuzhiyun		#size-cells = <0>;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		rtl8211e: ethernet-phy@1 {
141*4882a593Smuzhiyun			reg = <1>;
142*4882a593Smuzhiyun			pinctrl-0 = <&eth_phy_reset_pin>;
143*4882a593Smuzhiyun			pinctrl-names = "default";
144*4882a593Smuzhiyun			reset-assert-us = <10000>;
145*4882a593Smuzhiyun			reset-deassert-us = <50000>;
146*4882a593Smuzhiyun			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&i2c1 {
152*4882a593Smuzhiyun	status = "okay";
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	rk805: pmic@18 {
155*4882a593Smuzhiyun		compatible = "rockchip,rk805";
156*4882a593Smuzhiyun		reg = <0x18>;
157*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
158*4882a593Smuzhiyun		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
159*4882a593Smuzhiyun		#clock-cells = <1>;
160*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk805-clkout2";
161*4882a593Smuzhiyun		gpio-controller;
162*4882a593Smuzhiyun		#gpio-cells = <2>;
163*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
164*4882a593Smuzhiyun		pinctrl-names = "default";
165*4882a593Smuzhiyun		rockchip,system-power-controller;
166*4882a593Smuzhiyun		wakeup-source;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun		vcc1-supply = <&vdd_5v>;
169*4882a593Smuzhiyun		vcc2-supply = <&vdd_5v>;
170*4882a593Smuzhiyun		vcc3-supply = <&vdd_5v>;
171*4882a593Smuzhiyun		vcc4-supply = <&vdd_5v>;
172*4882a593Smuzhiyun		vcc5-supply = <&vcc_io_33>;
173*4882a593Smuzhiyun		vcc6-supply = <&vdd_5v>;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun		regulators {
176*4882a593Smuzhiyun			vdd_log: DCDC_REG1 {
177*4882a593Smuzhiyun				regulator-name = "vdd_log";
178*4882a593Smuzhiyun				regulator-always-on;
179*4882a593Smuzhiyun				regulator-boot-on;
180*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
181*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
182*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun				regulator-state-mem {
185*4882a593Smuzhiyun					regulator-on-in-suspend;
186*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
187*4882a593Smuzhiyun				};
188*4882a593Smuzhiyun			};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
191*4882a593Smuzhiyun				regulator-name = "vdd_arm";
192*4882a593Smuzhiyun				regulator-always-on;
193*4882a593Smuzhiyun				regulator-boot-on;
194*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
195*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
196*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun				regulator-state-mem {
199*4882a593Smuzhiyun					regulator-on-in-suspend;
200*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
201*4882a593Smuzhiyun				};
202*4882a593Smuzhiyun			};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
205*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
206*4882a593Smuzhiyun				regulator-always-on;
207*4882a593Smuzhiyun				regulator-boot-on;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun				regulator-state-mem {
210*4882a593Smuzhiyun					regulator-on-in-suspend;
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vcc_io_33: DCDC_REG4 {
215*4882a593Smuzhiyun				regulator-name = "vcc_io_33";
216*4882a593Smuzhiyun				regulator-always-on;
217*4882a593Smuzhiyun				regulator-boot-on;
218*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
219*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun				regulator-state-mem {
222*4882a593Smuzhiyun					regulator-on-in-suspend;
223*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
224*4882a593Smuzhiyun				};
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun			vcc_18: LDO_REG1 {
228*4882a593Smuzhiyun				regulator-name = "vcc_18";
229*4882a593Smuzhiyun				regulator-always-on;
230*4882a593Smuzhiyun				regulator-boot-on;
231*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
232*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun				regulator-state-mem {
235*4882a593Smuzhiyun					regulator-on-in-suspend;
236*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
237*4882a593Smuzhiyun				};
238*4882a593Smuzhiyun			};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun			vcc18_emmc: LDO_REG2 {
241*4882a593Smuzhiyun				regulator-name = "vcc18_emmc";
242*4882a593Smuzhiyun				regulator-always-on;
243*4882a593Smuzhiyun				regulator-boot-on;
244*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
245*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun				regulator-state-mem {
248*4882a593Smuzhiyun					regulator-on-in-suspend;
249*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
250*4882a593Smuzhiyun				};
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
254*4882a593Smuzhiyun				regulator-name = "vdd_10";
255*4882a593Smuzhiyun				regulator-always-on;
256*4882a593Smuzhiyun				regulator-boot-on;
257*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
258*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun				regulator-state-mem {
261*4882a593Smuzhiyun					regulator-on-in-suspend;
262*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
263*4882a593Smuzhiyun				};
264*4882a593Smuzhiyun			};
265*4882a593Smuzhiyun		};
266*4882a593Smuzhiyun	};
267*4882a593Smuzhiyun};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun&io_domains {
270*4882a593Smuzhiyun	pmuio-supply = <&vcc_io_33>;
271*4882a593Smuzhiyun	vccio1-supply = <&vcc_io_33>;
272*4882a593Smuzhiyun	vccio2-supply = <&vcc18_emmc>;
273*4882a593Smuzhiyun	vccio3-supply = <&vcc_io_sdio>;
274*4882a593Smuzhiyun	vccio4-supply = <&vcc_18>;
275*4882a593Smuzhiyun	vccio5-supply = <&vcc_io_33>;
276*4882a593Smuzhiyun	vccio6-supply = <&vcc_io_33>;
277*4882a593Smuzhiyun	status = "okay";
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&pinctrl {
281*4882a593Smuzhiyun	button {
282*4882a593Smuzhiyun		reset_button_pin: reset-button-pin {
283*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
284*4882a593Smuzhiyun		};
285*4882a593Smuzhiyun	};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun	ethernet-phy {
288*4882a593Smuzhiyun		eth_phy_reset_pin: eth-phy-reset-pin {
289*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
290*4882a593Smuzhiyun		};
291*4882a593Smuzhiyun	};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun	leds {
294*4882a593Smuzhiyun		lan_led_pin: lan-led-pin {
295*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun		sys_led_pin: sys-led-pin {
299*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
300*4882a593Smuzhiyun		};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun		wan_led_pin: wan-led-pin {
303*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
304*4882a593Smuzhiyun		};
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	pmic {
308*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
309*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
310*4882a593Smuzhiyun		};
311*4882a593Smuzhiyun	};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun	sd {
314*4882a593Smuzhiyun		sdio_vcc_pin: sdio-vcc-pin {
315*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
316*4882a593Smuzhiyun		};
317*4882a593Smuzhiyun	};
318*4882a593Smuzhiyun};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun&pwm2 {
321*4882a593Smuzhiyun	status = "okay";
322*4882a593Smuzhiyun};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun&sdmmc {
325*4882a593Smuzhiyun	bus-width = <4>;
326*4882a593Smuzhiyun	cap-sd-highspeed;
327*4882a593Smuzhiyun	disable-wp;
328*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
329*4882a593Smuzhiyun	pinctrl-names = "default";
330*4882a593Smuzhiyun	sd-uhs-sdr12;
331*4882a593Smuzhiyun	sd-uhs-sdr25;
332*4882a593Smuzhiyun	sd-uhs-sdr50;
333*4882a593Smuzhiyun	sd-uhs-sdr104;
334*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
335*4882a593Smuzhiyun	vqmmc-supply = <&vcc_io_sdio>;
336*4882a593Smuzhiyun	status = "okay";
337*4882a593Smuzhiyun};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun&tsadc {
340*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>;
341*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>;
342*4882a593Smuzhiyun	status = "okay";
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&u2phy {
346*4882a593Smuzhiyun	status = "okay";
347*4882a593Smuzhiyun};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun&u2phy_host {
350*4882a593Smuzhiyun	status = "okay";
351*4882a593Smuzhiyun};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun&u2phy_otg {
354*4882a593Smuzhiyun	status = "okay";
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&uart2 {
358*4882a593Smuzhiyun	status = "okay";
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&usb20_otg {
362*4882a593Smuzhiyun	status = "okay";
363*4882a593Smuzhiyun	dr_mode = "host";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&usb_host0_ehci {
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&usb_host0_ohci {
371*4882a593Smuzhiyun	status = "okay";
372*4882a593Smuzhiyun};
373