xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3328-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rk3328.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "Rockchip RK3328 EVB";
11*4882a593Smuzhiyun	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	dc_12v: dc-12v {
18*4882a593Smuzhiyun		compatible = "regulator-fixed";
19*4882a593Smuzhiyun		regulator-name = "dc_12v";
20*4882a593Smuzhiyun		regulator-always-on;
21*4882a593Smuzhiyun		regulator-boot-on;
22*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
23*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
27*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
28*4882a593Smuzhiyun		pinctrl-names = "default";
29*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		/*
32*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
33*4882a593Smuzhiyun		 * on the actual card populated):
34*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
35*4882a593Smuzhiyun		 * - PDN (power down when low)
36*4882a593Smuzhiyun		 */
37*4882a593Smuzhiyun		reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	fiq-debugger {
41*4882a593Smuzhiyun		compatible = "rockchip,fiq-debugger";
42*4882a593Smuzhiyun		rockchip,serial-id = <2>;
43*4882a593Smuzhiyun		rockchip,signal-irq = <159>;
44*4882a593Smuzhiyun		rockchip,wake-irq = <0>;
45*4882a593Smuzhiyun		/* If enable uart uses irq instead of fiq */
46*4882a593Smuzhiyun		rockchip,irq-mode-enable = <0>;
47*4882a593Smuzhiyun		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
48*4882a593Smuzhiyun		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
49*4882a593Smuzhiyun		status = "okay";
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
53*4882a593Smuzhiyun		compatible = "regulator-fixed";
54*4882a593Smuzhiyun		gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
55*4882a593Smuzhiyun		pinctrl-names = "default";
56*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc0m1_pin>;
57*4882a593Smuzhiyun		regulator-name = "vcc_sd";
58*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
59*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
60*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	vcc_sys: vcc-sys {
64*4882a593Smuzhiyun		compatible = "regulator-fixed";
65*4882a593Smuzhiyun		regulator-name = "vcc_sys";
66*4882a593Smuzhiyun		regulator-always-on;
67*4882a593Smuzhiyun		regulator-boot-on;
68*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
69*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
70*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
74*4882a593Smuzhiyun		compatible = "regulator-fixed";
75*4882a593Smuzhiyun		regulator-name = "vcc_phy";
76*4882a593Smuzhiyun		regulator-always-on;
77*4882a593Smuzhiyun		regulator-boot-on;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	xin32k: xin32k {
81*4882a593Smuzhiyun		compatible = "fixed-clock";
82*4882a593Smuzhiyun		clock-frequency = <32768>;
83*4882a593Smuzhiyun		clock-output-names = "xin32k";
84*4882a593Smuzhiyun		#clock-cells = <0>;
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&cpu0 {
90*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&cpu1 {
94*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
95*4882a593Smuzhiyun};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun&cpu2 {
98*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun&cpu3 {
102*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&emmc {
106*4882a593Smuzhiyun	bus-width = <8>;
107*4882a593Smuzhiyun	cap-mmc-highspeed;
108*4882a593Smuzhiyun	non-removable;
109*4882a593Smuzhiyun	pinctrl-names = "default";
110*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
111*4882a593Smuzhiyun	status = "okay";
112*4882a593Smuzhiyun};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun&gmac2phy {
115*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
116*4882a593Smuzhiyun	clock_in_out = "output";
117*4882a593Smuzhiyun	assigned-clock-rate = <50000000>;
118*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2PHY>;
119*4882a593Smuzhiyun	assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
120*4882a593Smuzhiyun	status = "okay";
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&i2c1 {
124*4882a593Smuzhiyun	status = "okay";
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	rk805: pmic@18 {
127*4882a593Smuzhiyun		compatible = "rockchip,rk805";
128*4882a593Smuzhiyun		reg = <0x18>;
129*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
130*4882a593Smuzhiyun		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
131*4882a593Smuzhiyun		#clock-cells = <1>;
132*4882a593Smuzhiyun		clock-output-names = "rk805-clkout1", "rk805-clkout2";
133*4882a593Smuzhiyun		gpio-controller;
134*4882a593Smuzhiyun		#gpio-cells = <2>;
135*4882a593Smuzhiyun		pinctrl-names = "default";
136*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
137*4882a593Smuzhiyun		rockchip,system-power-controller;
138*4882a593Smuzhiyun		wakeup-source;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
141*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
142*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
143*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
144*4882a593Smuzhiyun		vcc5-supply = <&vcc_io>;
145*4882a593Smuzhiyun		vcc6-supply = <&vcc_io>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun		regulators {
148*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
149*4882a593Smuzhiyun				regulator-name = "vdd_logic";
150*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
151*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
152*4882a593Smuzhiyun				regulator-always-on;
153*4882a593Smuzhiyun				regulator-boot-on;
154*4882a593Smuzhiyun				regulator-state-mem {
155*4882a593Smuzhiyun					regulator-on-in-suspend;
156*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
157*4882a593Smuzhiyun				};
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
161*4882a593Smuzhiyun				regulator-name = "vdd_arm";
162*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
163*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
164*4882a593Smuzhiyun				regulator-always-on;
165*4882a593Smuzhiyun				regulator-boot-on;
166*4882a593Smuzhiyun				regulator-state-mem {
167*4882a593Smuzhiyun					regulator-on-in-suspend;
168*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
169*4882a593Smuzhiyun				};
170*4882a593Smuzhiyun			};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
173*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
174*4882a593Smuzhiyun				regulator-always-on;
175*4882a593Smuzhiyun				regulator-boot-on;
176*4882a593Smuzhiyun				regulator-state-mem {
177*4882a593Smuzhiyun					regulator-on-in-suspend;
178*4882a593Smuzhiyun				};
179*4882a593Smuzhiyun			};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
182*4882a593Smuzhiyun				regulator-name = "vcc_io";
183*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
184*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
185*4882a593Smuzhiyun				regulator-always-on;
186*4882a593Smuzhiyun				regulator-boot-on;
187*4882a593Smuzhiyun				regulator-state-mem {
188*4882a593Smuzhiyun					regulator-on-in-suspend;
189*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
190*4882a593Smuzhiyun				};
191*4882a593Smuzhiyun			};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun			vcc_18: LDO_REG1 {
194*4882a593Smuzhiyun				regulator-name = "vcc_18";
195*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
196*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
197*4882a593Smuzhiyun				regulator-always-on;
198*4882a593Smuzhiyun				regulator-boot-on;
199*4882a593Smuzhiyun				regulator-state-mem {
200*4882a593Smuzhiyun					regulator-on-in-suspend;
201*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
202*4882a593Smuzhiyun				};
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun			vcc18_emmc: LDO_REG2 {
206*4882a593Smuzhiyun				regulator-name = "vcc18_emmc";
207*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
208*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
209*4882a593Smuzhiyun				regulator-always-on;
210*4882a593Smuzhiyun				regulator-boot-on;
211*4882a593Smuzhiyun				regulator-state-mem {
212*4882a593Smuzhiyun					regulator-on-in-suspend;
213*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
214*4882a593Smuzhiyun				};
215*4882a593Smuzhiyun			};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
218*4882a593Smuzhiyun				regulator-name = "vdd_10";
219*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
220*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
221*4882a593Smuzhiyun				regulator-always-on;
222*4882a593Smuzhiyun				regulator-boot-on;
223*4882a593Smuzhiyun				regulator-state-mem {
224*4882a593Smuzhiyun					regulator-on-in-suspend;
225*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
226*4882a593Smuzhiyun				};
227*4882a593Smuzhiyun			};
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&pinctrl {
233*4882a593Smuzhiyun	pmic {
234*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
235*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun	sdio-pwrseq {
240*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
241*4882a593Smuzhiyun		rockchip,pins =
242*4882a593Smuzhiyun			<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
243*4882a593Smuzhiyun		};
244*4882a593Smuzhiyun	};
245*4882a593Smuzhiyun};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun&sdio {
248*4882a593Smuzhiyun	bus-width = <4>;
249*4882a593Smuzhiyun	cap-sd-highspeed;
250*4882a593Smuzhiyun	cap-sdio-irq;
251*4882a593Smuzhiyun	keep-power-in-suspend;
252*4882a593Smuzhiyun	max-frequency = <150000000>;
253*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
254*4882a593Smuzhiyun	non-removable;
255*4882a593Smuzhiyun	pinctrl-names = "default";
256*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
257*4882a593Smuzhiyun	status = "okay";
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&sdmmc {
261*4882a593Smuzhiyun	bus-width = <4>;
262*4882a593Smuzhiyun	cap-mmc-highspeed;
263*4882a593Smuzhiyun	cap-sd-highspeed;
264*4882a593Smuzhiyun	disable-wp;
265*4882a593Smuzhiyun	max-frequency = <150000000>;
266*4882a593Smuzhiyun	pinctrl-names = "default";
267*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
268*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
269*4882a593Smuzhiyun	status = "okay";
270*4882a593Smuzhiyun};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun&tsadc {
273*4882a593Smuzhiyun	status = "okay";
274*4882a593Smuzhiyun};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun&uart2 {
277*4882a593Smuzhiyun	status = "okay";
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&u2phy {
281*4882a593Smuzhiyun	status = "okay";
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&u2phy_host {
285*4882a593Smuzhiyun	status = "okay";
286*4882a593Smuzhiyun};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun&u2phy_otg {
289*4882a593Smuzhiyun	status = "okay";
290*4882a593Smuzhiyun};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun&usb20_otg {
293*4882a593Smuzhiyun	status = "okay";
294*4882a593Smuzhiyun};
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun&usb_host0_ehci {
297*4882a593Smuzhiyun	status = "okay";
298*4882a593Smuzhiyun};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun&usb_host0_ohci {
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun};
303