1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "rk3328.dtsi" 8*4882a593Smuzhiyun#include "rk3328-android.dtsi" 9*4882a593Smuzhiyun#include "rk3328-box-plus-dram-timing.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun gmac_clkin: external-gmac-clock { 14*4882a593Smuzhiyun compatible = "fixed-clock"; 15*4882a593Smuzhiyun clock-frequency = <125000000>; 16*4882a593Smuzhiyun clock-output-names = "gmac_clkin"; 17*4882a593Smuzhiyun #clock-cells = <0>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 21*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 22*4882a593Smuzhiyun pinctrl-names = "default"; 23*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* 26*4882a593Smuzhiyun * On the module itself this is one of these (depending 27*4882a593Smuzhiyun * on the actual card populated): 28*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 29*4882a593Smuzhiyun * - PDN (power down when low) 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun sound { 35*4882a593Smuzhiyun compatible = "simple-audio-card"; 36*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 37*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 38*4882a593Smuzhiyun simple-audio-card,name = "rockchip-rk3328"; 39*4882a593Smuzhiyun simple-audio-card,cpu { 40*4882a593Smuzhiyun sound-dai = <&i2s1>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun simple-audio-card,codec { 43*4882a593Smuzhiyun sound-dai = <&codec>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun hdmi-sound { 48*4882a593Smuzhiyun compatible = "simple-audio-card"; 49*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 50*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 51*4882a593Smuzhiyun simple-audio-card,name = "rockchip-hdmi"; 52*4882a593Smuzhiyun simple-audio-card,cpu { 53*4882a593Smuzhiyun sound-dai = <&i2s0>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun simple-audio-card,codec { 56*4882a593Smuzhiyun sound-dai = <&hdmi>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun regulators { 61*4882a593Smuzhiyun compatible = "simple-bus"; 62*4882a593Smuzhiyun #address-cells = <1>; 63*4882a593Smuzhiyun #size-cells = <0>; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun vccio_1v8_reg: regulator@0 { 66*4882a593Smuzhiyun compatible = "regulator-fixed"; 67*4882a593Smuzhiyun regulator-name = "vccio_1v8"; 68*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 70*4882a593Smuzhiyun regulator-always-on; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun vccio_3v3_reg: regulator@1 { 74*4882a593Smuzhiyun compatible = "regulator-fixed"; 75*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 76*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 77*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun rtc-fake { 83*4882a593Smuzhiyun compatible = "rtc-fake"; 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun spdif-sound { 88*4882a593Smuzhiyun compatible = "simple-audio-card"; 89*4882a593Smuzhiyun simple-audio-card,name = "rockchip-spdif"; 90*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 91*4882a593Smuzhiyun simple-audio-card,cpu { 92*4882a593Smuzhiyun sound-dai = <&spdif>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun simple-audio-card,codec { 95*4882a593Smuzhiyun sound-dai = <&spdif_out>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun spdif_out: spdif-out { 100*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 101*4882a593Smuzhiyun #sound-dai-cells = <0>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun vcc_host_vbus: host-vbus-regulator { 105*4882a593Smuzhiyun compatible = "regulator-fixed"; 106*4882a593Smuzhiyun gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 107*4882a593Smuzhiyun pinctrl-names = "default"; 108*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 109*4882a593Smuzhiyun regulator-name = "vcc_host_vbus"; 110*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 111*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 112*4882a593Smuzhiyun enable-active-high; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun vcc_otg_vbus: otg-vbus-regulator { 116*4882a593Smuzhiyun compatible = "regulator-fixed"; 117*4882a593Smuzhiyun gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 118*4882a593Smuzhiyun pinctrl-names = "default"; 119*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 120*4882a593Smuzhiyun regulator-name = "vcc_otg_vbus"; 121*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 122*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 123*4882a593Smuzhiyun enable-active-high; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 127*4882a593Smuzhiyun compatible = "regulator-fixed"; 128*4882a593Smuzhiyun regulator-name = "vcc_phy"; 129*4882a593Smuzhiyun regulator-always-on; 130*4882a593Smuzhiyun regulator-boot-on; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 134*4882a593Smuzhiyun compatible = "regulator-fixed"; 135*4882a593Smuzhiyun gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun pinctrl-names = "default"; 137*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0m1_gpio>; 138*4882a593Smuzhiyun regulator-name = "vcc_sd"; 139*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 140*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 141*4882a593Smuzhiyun vin-supply = <&vccio_3v3_reg>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun vdd_arm: vdd-center { 145*4882a593Smuzhiyun compatible = "pwm-regulator"; 146*4882a593Smuzhiyun rockchip,pwm_id = <0>; 147*4882a593Smuzhiyun rockchip,pwm_voltage = <1250000>; 148*4882a593Smuzhiyun pwms = <&pwm0 0 5000 1>; 149*4882a593Smuzhiyun regulator-name = "vcc_arm"; 150*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 151*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 152*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 153*4882a593Smuzhiyun regulator-always-on; 154*4882a593Smuzhiyun regulator-boot-on; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun vdd_logic: vdd-log { 158*4882a593Smuzhiyun compatible = "pwm-regulator"; 159*4882a593Smuzhiyun rockchip,pwm_id = <1>; 160*4882a593Smuzhiyun rockchip,pwm_voltage = <1100000>; 161*4882a593Smuzhiyun pwms = <&pwm1 0 5000 1>; 162*4882a593Smuzhiyun regulator-name = "vcc_log"; 163*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 165*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 166*4882a593Smuzhiyun regulator-always-on; 167*4882a593Smuzhiyun regulator-boot-on; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun wireless-bluetooth { 171*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 172*4882a593Smuzhiyun uart_rts_gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 173*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 174*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 175*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 176*4882a593Smuzhiyun BT,power_gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; 177*4882a593Smuzhiyun BT,wake_host_irq = <&gpio1 26 GPIO_ACTIVE_HIGH>; 178*4882a593Smuzhiyun status = "okay"; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun wireless-wlan { 182*4882a593Smuzhiyun compatible = "wlan-platdata"; 183*4882a593Smuzhiyun rockchip,grf = <&grf>; 184*4882a593Smuzhiyun wifi_chip_type = "rtl8822bs"; 185*4882a593Smuzhiyun sdio_vref = <1800>; 186*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio1 19 GPIO_ACTIVE_HIGH>; 187*4882a593Smuzhiyun status = "okay"; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&avsd { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&codec { 196*4882a593Smuzhiyun #sound-dai-cells = <0>; 197*4882a593Smuzhiyun status = "okay"; 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&cpu0 { 201*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&dfi { 205*4882a593Smuzhiyun status = "okay"; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&dmc { 209*4882a593Smuzhiyun center-supply = <&vdd_logic>; 210*4882a593Smuzhiyun status = "okay"; 211*4882a593Smuzhiyun system-status-freq = < 212*4882a593Smuzhiyun /*system status freq(KHz)*/ 213*4882a593Smuzhiyun SYS_STATUS_NORMAL 786000 214*4882a593Smuzhiyun SYS_STATUS_REBOOT 786000 215*4882a593Smuzhiyun SYS_STATUS_SUSPEND 786000 216*4882a593Smuzhiyun SYS_STATUS_VIDEO_1080P 786000 217*4882a593Smuzhiyun SYS_STATUS_VIDEO_4K 786000 218*4882a593Smuzhiyun SYS_STATUS_VIDEO_4K_10B 786000 219*4882a593Smuzhiyun SYS_STATUS_PERFORMANCE 786000 220*4882a593Smuzhiyun SYS_STATUS_BOOST 786000 221*4882a593Smuzhiyun >; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun&dmc_opp_table { 225*4882a593Smuzhiyun opp-800000000 { 226*4882a593Smuzhiyun status = "disabled"; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun opp-850000000 { 230*4882a593Smuzhiyun status = "disabled"; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun opp-933000000 { 234*4882a593Smuzhiyun status = "disabled"; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun opp-1066000000 { 238*4882a593Smuzhiyun status = "disabled"; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun}; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun&emmc { 243*4882a593Smuzhiyun bus-width = <8>; 244*4882a593Smuzhiyun cap-mmc-highspeed; 245*4882a593Smuzhiyun no-sdio; 246*4882a593Smuzhiyun no-sd; 247*4882a593Smuzhiyun disable-wp; 248*4882a593Smuzhiyun non-removable; 249*4882a593Smuzhiyun num-slots = <1>; 250*4882a593Smuzhiyun pinctrl-names = "default"; 251*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 252*4882a593Smuzhiyun status = "okay"; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&gmac2io { 256*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 257*4882a593Smuzhiyun phy-mode = "rgmii"; 258*4882a593Smuzhiyun clock_in_out = "input"; 259*4882a593Smuzhiyun snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 260*4882a593Smuzhiyun snps,reset-active-low; 261*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 262*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 263*4882a593Smuzhiyun assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 264*4882a593Smuzhiyun pinctrl-names = "default"; 265*4882a593Smuzhiyun pinctrl-0 = <&rgmiim1_pins>; 266*4882a593Smuzhiyun tx_delay = <0x26>; 267*4882a593Smuzhiyun rx_delay = <0x11>; 268*4882a593Smuzhiyun status = "disabled"; 269*4882a593Smuzhiyun}; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun&gmac2phy { 272*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 273*4882a593Smuzhiyun clock_in_out = "output"; 274*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; 275*4882a593Smuzhiyun assigned-clock-rate = <50000000>; 276*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY>; 277*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; 278*4882a593Smuzhiyun status = "okay"; 279*4882a593Smuzhiyun}; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun&gpu { 282*4882a593Smuzhiyun status = "okay"; 283*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 284*4882a593Smuzhiyun}; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun&hdmi { 287*4882a593Smuzhiyun #sound-dai-cells = <0>; 288*4882a593Smuzhiyun ddc-i2c-scl-high-time-ns = <9625>; 289*4882a593Smuzhiyun ddc-i2c-scl-low-time-ns = <10000>; 290*4882a593Smuzhiyun status = "okay"; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&hdmiphy { 294*4882a593Smuzhiyun rockchip,phy-table = 295*4882a593Smuzhiyun <165000000 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 296*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>, 297*4882a593Smuzhiyun <340000000 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 298*4882a593Smuzhiyun 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd>, 299*4882a593Smuzhiyun <594000000 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 300*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>; 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&secure_memory { 305*4882a593Smuzhiyun /* 306*4882a593Smuzhiyun * enable like this: 307*4882a593Smuzhiyun * reg = <0x0 0x20000000 0x0 0x10000000>; 308*4882a593Smuzhiyun */ 309*4882a593Smuzhiyun reg = <0x0 0x20000000 0x0 0x0>; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&i2s0 { 313*4882a593Smuzhiyun #sound-dai-cells = <0>; 314*4882a593Smuzhiyun rockchip,bclk-fs = <128>; 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&i2s1 { 319*4882a593Smuzhiyun #sound-dai-cells = <0>; 320*4882a593Smuzhiyun status = "okay"; 321*4882a593Smuzhiyun}; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun&iep { 324*4882a593Smuzhiyun status = "okay"; 325*4882a593Smuzhiyun}; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun&iep_mmu { 328*4882a593Smuzhiyun status = "okay"; 329*4882a593Smuzhiyun}; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun&io_domains { 332*4882a593Smuzhiyun status = "okay"; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun vccio1-supply = <&vccio_3v3_reg>; 335*4882a593Smuzhiyun vccio2-supply = <&vccio_1v8_reg>; 336*4882a593Smuzhiyun vccio3-supply = <&vccio_3v3_reg>; 337*4882a593Smuzhiyun vccio4-supply = <&vccio_1v8_reg>; 338*4882a593Smuzhiyun vccio5-supply = <&vccio_3v3_reg>; 339*4882a593Smuzhiyun vccio6-supply = <&vccio_3v3_reg>; 340*4882a593Smuzhiyun pmuio-supply = <&vccio_3v3_reg>; 341*4882a593Smuzhiyun}; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun&mpp_srv { 344*4882a593Smuzhiyun status = "okay"; 345*4882a593Smuzhiyun}; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun&pinctrl { 348*4882a593Smuzhiyun sdio-pwrseq { 349*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 350*4882a593Smuzhiyun rockchip,pins = 351*4882a593Smuzhiyun <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun usb { 356*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 357*4882a593Smuzhiyun rockchip,pins = 358*4882a593Smuzhiyun <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 362*4882a593Smuzhiyun rockchip,pins = 363*4882a593Smuzhiyun <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun wireless-bluetooth { 368*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 369*4882a593Smuzhiyun rockchip,pins = 370*4882a593Smuzhiyun <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun}; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun&pwm0 { 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun pinctrl-names = "active"; 378*4882a593Smuzhiyun pinctrl-0 = <&pwm0_pin_pull_up>; 379*4882a593Smuzhiyun}; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun&pwm1 { 382*4882a593Smuzhiyun status = "okay"; 383*4882a593Smuzhiyun pinctrl-names = "active"; 384*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_up>; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&pwm3 { 388*4882a593Smuzhiyun status = "okay"; 389*4882a593Smuzhiyun pinctrl-names = "default"; 390*4882a593Smuzhiyun pinctrl-0 = <&pwmir_pin>; 391*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 392*4882a593Smuzhiyun remote_pwm_id = <3>; 393*4882a593Smuzhiyun handle_cpu_id = <1>; 394*4882a593Smuzhiyun remote_support_psci = <1>; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun ir_key1 { 397*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 398*4882a593Smuzhiyun rockchip,key_table = 399*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 400*4882a593Smuzhiyun <0xba KEY_BACK>, 401*4882a593Smuzhiyun <0xf4 KEY_UP>, 402*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 403*4882a593Smuzhiyun <0xef KEY_LEFT>, 404*4882a593Smuzhiyun <0xee KEY_RIGHT>, 405*4882a593Smuzhiyun <0xbd KEY_HOME>, 406*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 407*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 408*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 409*4882a593Smuzhiyun <0xb2 KEY_POWER>, 410*4882a593Smuzhiyun <0xbc KEY_MUTE>, 411*4882a593Smuzhiyun <0xec KEY_MENU>, 412*4882a593Smuzhiyun <0xbf 0x190>, 413*4882a593Smuzhiyun <0xe0 0x191>, 414*4882a593Smuzhiyun <0xe1 0x192>, 415*4882a593Smuzhiyun <0xe9 183>, 416*4882a593Smuzhiyun <0xe6 248>, 417*4882a593Smuzhiyun <0xe8 185>, 418*4882a593Smuzhiyun <0xe7 186>, 419*4882a593Smuzhiyun <0xf0 388>, 420*4882a593Smuzhiyun <0xbe 0x175>; 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun ir_key2 { 424*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 425*4882a593Smuzhiyun rockchip,key_table = 426*4882a593Smuzhiyun <0xf9 KEY_HOME>, 427*4882a593Smuzhiyun <0xbf KEY_BACK>, 428*4882a593Smuzhiyun <0xfb KEY_MENU>, 429*4882a593Smuzhiyun <0xaa KEY_REPLY>, 430*4882a593Smuzhiyun <0xb9 KEY_UP>, 431*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 432*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 433*4882a593Smuzhiyun <0xea KEY_RIGHT>, 434*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 435*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 436*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 437*4882a593Smuzhiyun <0xe7 KEY_POWER>, 438*4882a593Smuzhiyun <0xfc KEY_POWER>, 439*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 440*4882a593Smuzhiyun <0xa8 KEY_PLAYPAUSE>, 441*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 442*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 443*4882a593Smuzhiyun <0xab 183>, 444*4882a593Smuzhiyun <0xb7 388>, 445*4882a593Smuzhiyun <0xe8 388>, 446*4882a593Smuzhiyun <0xf8 184>, 447*4882a593Smuzhiyun <0xaf 185>, 448*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 449*4882a593Smuzhiyun <0xee 186>, 450*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 451*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 452*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 453*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 454*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 455*4882a593Smuzhiyun <0xa4 KEY_SETUP>, 456*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun ir_key3 { 460*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 461*4882a593Smuzhiyun rockchip,key_table = 462*4882a593Smuzhiyun <0xee KEY_REPLY>, 463*4882a593Smuzhiyun <0xf0 KEY_BACK>, 464*4882a593Smuzhiyun <0xf8 KEY_UP>, 465*4882a593Smuzhiyun <0xbb KEY_DOWN>, 466*4882a593Smuzhiyun <0xef KEY_LEFT>, 467*4882a593Smuzhiyun <0xed KEY_RIGHT>, 468*4882a593Smuzhiyun <0xfc KEY_HOME>, 469*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 470*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 471*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 472*4882a593Smuzhiyun <0xff KEY_POWER>, 473*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 474*4882a593Smuzhiyun <0xbf KEY_MENU>, 475*4882a593Smuzhiyun <0xf9 0x191>, 476*4882a593Smuzhiyun <0xf5 0x192>, 477*4882a593Smuzhiyun <0xb3 388>, 478*4882a593Smuzhiyun <0xbe KEY_1>, 479*4882a593Smuzhiyun <0xba KEY_2>, 480*4882a593Smuzhiyun <0xb2 KEY_3>, 481*4882a593Smuzhiyun <0xbd KEY_4>, 482*4882a593Smuzhiyun <0xf9 KEY_5>, 483*4882a593Smuzhiyun <0xb1 KEY_6>, 484*4882a593Smuzhiyun <0xfc KEY_7>, 485*4882a593Smuzhiyun <0xf8 KEY_8>, 486*4882a593Smuzhiyun <0xb0 KEY_9>, 487*4882a593Smuzhiyun <0xb6 KEY_0>, 488*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun&rga { 493*4882a593Smuzhiyun status = "okay"; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&rkvdec { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun vcodec-supply = <&vdd_logic>; 499*4882a593Smuzhiyun}; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun&rkvdec_mmu { 502*4882a593Smuzhiyun status = "okay"; 503*4882a593Smuzhiyun}; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun&rockchip_suspend { 506*4882a593Smuzhiyun status = "okay"; 507*4882a593Smuzhiyun rockchip,virtual-poweroff = <1>; 508*4882a593Smuzhiyun rockchip,sleep-mode-config = < 509*4882a593Smuzhiyun (0 510*4882a593Smuzhiyun |RKPM_SLP_CTR_VOL_PWM0 511*4882a593Smuzhiyun |RKPM_SLP_CTR_VOL_PWM1 512*4882a593Smuzhiyun ) 513*4882a593Smuzhiyun >; 514*4882a593Smuzhiyun}; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun&uart0 { 517*4882a593Smuzhiyun pinctrl-names = "default"; 518*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&sdio { 523*4882a593Smuzhiyun bus-width = <4>; 524*4882a593Smuzhiyun cap-sd-highspeed; 525*4882a593Smuzhiyun cap-sdio-irq; 526*4882a593Smuzhiyun disable-wp; 527*4882a593Smuzhiyun keep-power-in-suspend; 528*4882a593Smuzhiyun max-frequency = <125000000>; 529*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 530*4882a593Smuzhiyun non-removable; 531*4882a593Smuzhiyun num-slots = <1>; 532*4882a593Smuzhiyun pinctrl-names = "default"; 533*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 534*4882a593Smuzhiyun no-sd; 535*4882a593Smuzhiyun no-mmc; 536*4882a593Smuzhiyun sd-uhs-sdr104; 537*4882a593Smuzhiyun status = "okay"; 538*4882a593Smuzhiyun}; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun&sdmmc_ext { 541*4882a593Smuzhiyun bus-width = <4>; 542*4882a593Smuzhiyun cap-mmc-highspeed; 543*4882a593Smuzhiyun cap-sd-highspeed; 544*4882a593Smuzhiyun disable-wp; 545*4882a593Smuzhiyun keep-power-in-suspend; 546*4882a593Smuzhiyun max-frequency = <150000000>; 547*4882a593Smuzhiyun num-slots = <1>; 548*4882a593Smuzhiyun pinctrl-names = "default"; 549*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0ext_clk &sdmmc0ext_cmd &sdmmc0ext_dectn &sdmmc0ext_bus4>; 550*4882a593Smuzhiyun no-sdio; 551*4882a593Smuzhiyun no-mmc; 552*4882a593Smuzhiyun status = "okay"; 553*4882a593Smuzhiyun}; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun&sdmmc { 556*4882a593Smuzhiyun bus-width = <4>; 557*4882a593Smuzhiyun cap-mmc-highspeed; 558*4882a593Smuzhiyun cap-sd-highspeed; 559*4882a593Smuzhiyun disable-wp; 560*4882a593Smuzhiyun max-frequency = <150000000>; 561*4882a593Smuzhiyun num-slots = <1>; 562*4882a593Smuzhiyun pinctrl-names = "default"; 563*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; 564*4882a593Smuzhiyun no-sdio; 565*4882a593Smuzhiyun no-mmc; 566*4882a593Smuzhiyun status = "okay"; 567*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 568*4882a593Smuzhiyun}; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun&spdif { 571*4882a593Smuzhiyun #sound-dai-cells = <0>; 572*4882a593Smuzhiyun pinctrl-names = "default"; 573*4882a593Smuzhiyun pinctrl-0 = <&spdifm0_tx>; 574*4882a593Smuzhiyun status = "okay"; 575*4882a593Smuzhiyun}; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun&threshold { 578*4882a593Smuzhiyun temperature = <90000>; /* millicelsius */ 579*4882a593Smuzhiyun}; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun&target { 582*4882a593Smuzhiyun temperature = <105000>; /* millicelsius */ 583*4882a593Smuzhiyun}; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun&soc_crit { 586*4882a593Smuzhiyun temperature = <115000>; /* millicelsius */ 587*4882a593Smuzhiyun}; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun&tsadc { 590*4882a593Smuzhiyun rockchip,hw-tshut-temp = <120000>; 591*4882a593Smuzhiyun status = "okay"; 592*4882a593Smuzhiyun}; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun&tve { 595*4882a593Smuzhiyun status = "okay"; 596*4882a593Smuzhiyun}; 597*4882a593Smuzhiyun 598*4882a593Smuzhiyun&u2phy { 599*4882a593Smuzhiyun status = "okay"; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun u2phy_host: host-port { 602*4882a593Smuzhiyun status = "okay"; 603*4882a593Smuzhiyun }; 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun u2phy_otg: otg-port { 606*4882a593Smuzhiyun vbus-supply = <&vcc_otg_vbus>; 607*4882a593Smuzhiyun status = "okay"; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun}; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun&u3phy { 612*4882a593Smuzhiyun vbus-supply = <&vcc_host_vbus>; 613*4882a593Smuzhiyun status = "okay"; 614*4882a593Smuzhiyun}; 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun&u3phy_utmi { 617*4882a593Smuzhiyun status = "okay"; 618*4882a593Smuzhiyun}; 619*4882a593Smuzhiyun 620*4882a593Smuzhiyun&u3phy_pipe { 621*4882a593Smuzhiyun status = "okay"; 622*4882a593Smuzhiyun}; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun&usb20_otg { 625*4882a593Smuzhiyun status = "okay"; 626*4882a593Smuzhiyun}; 627*4882a593Smuzhiyun 628*4882a593Smuzhiyun&usb_host0_ehci { 629*4882a593Smuzhiyun status = "okay"; 630*4882a593Smuzhiyun}; 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun&usb_host0_ohci { 633*4882a593Smuzhiyun status = "okay"; 634*4882a593Smuzhiyun}; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun&usbdrd3 { 637*4882a593Smuzhiyun status = "okay"; 638*4882a593Smuzhiyun}; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun&usbdrd_dwc3 { 641*4882a593Smuzhiyun status = "okay"; 642*4882a593Smuzhiyun}; 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun&vdpu { 645*4882a593Smuzhiyun status = "okay"; 646*4882a593Smuzhiyun}; 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun&vpu_mmu { 649*4882a593Smuzhiyun status = "okay"; 650*4882a593Smuzhiyun}; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun&vepu { 653*4882a593Smuzhiyun status = "okay"; 654*4882a593Smuzhiyun}; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun&vepu_mmu { 657*4882a593Smuzhiyun status = "okay"; 658*4882a593Smuzhiyun}; 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun&vepu22 { 661*4882a593Smuzhiyun status = "okay"; 662*4882a593Smuzhiyun}; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun&vepu22_mmu { 665*4882a593Smuzhiyun status = "okay"; 666*4882a593Smuzhiyun}; 667*4882a593Smuzhiyun 668*4882a593Smuzhiyun&vop { 669*4882a593Smuzhiyun status = "okay"; 670*4882a593Smuzhiyun}; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun&vop_mmu { 673*4882a593Smuzhiyun status = "okay"; 674*4882a593Smuzhiyun}; 675