1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2*4882a593Smuzhiyun// Copyright (c) 2017-2019 Arm Ltd. 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun/dts-v1/; 5*4882a593Smuzhiyun#include "rk3328.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "Beelink A1"; 9*4882a593Smuzhiyun compatible = "azw,beelink-a1", "rockchip,rk3328"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * UART pins, as viewed with bottom of case removed: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * Front 15*4882a593Smuzhiyun * /------- 16*4882a593Smuzhiyun * L / o <- Gnd 17*4882a593Smuzhiyun * e / o <-- Rx 18*4882a593Smuzhiyun * f / o <--- Tx 19*4882a593Smuzhiyun * t / o <---- +3.3v 20*4882a593Smuzhiyun * | 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun gmac_clkin: external-gmac-clock { 27*4882a593Smuzhiyun compatible = "fixed-clock"; 28*4882a593Smuzhiyun clock-frequency = <125000000>; 29*4882a593Smuzhiyun clock-output-names = "gmac_clkin"; 30*4882a593Smuzhiyun #clock-cells = <0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun vcc_host_5v: usb3-current-switch { 34*4882a593Smuzhiyun compatible = "regulator-fixed"; 35*4882a593Smuzhiyun enable-active-high; 36*4882a593Smuzhiyun gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 37*4882a593Smuzhiyun pinctrl-names = "default"; 38*4882a593Smuzhiyun pinctrl-0 = <&usb30_host_drv>; 39*4882a593Smuzhiyun regulator-name = "vcc_host_5v"; 40*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun vcc_sys: vcc-sys { 44*4882a593Smuzhiyun compatible = "regulator-fixed"; 45*4882a593Smuzhiyun regulator-name = "vcc_sys"; 46*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 47*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun ir-receiver { 51*4882a593Smuzhiyun compatible = "gpio-ir-receiver"; 52*4882a593Smuzhiyun gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun linux,rc-map-name = "rc-beelink-gs1"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&analog_sound { 58*4882a593Smuzhiyun simple-audio-card,name = "Analog A/V"; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&codec { 63*4882a593Smuzhiyun mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun}; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun&cpu0 { 68*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 69*4882a593Smuzhiyun}; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun&cpu1 { 72*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&cpu2 { 76*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&cpu3 { 80*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&emmc { 84*4882a593Smuzhiyun bus-width = <8>; 85*4882a593Smuzhiyun cap-mmc-highspeed; 86*4882a593Smuzhiyun mmc-ddr-1_8v; 87*4882a593Smuzhiyun mmc-hs200-1_8v; 88*4882a593Smuzhiyun no-sd; 89*4882a593Smuzhiyun no-sdio; 90*4882a593Smuzhiyun non-removable; 91*4882a593Smuzhiyun pinctrl-names = "default"; 92*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 93*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 94*4882a593Smuzhiyun vqmmc-supply = <&vcc18_emmc>; 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun}; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun&gmac2io { 99*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 100*4882a593Smuzhiyun assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 101*4882a593Smuzhiyun clock_in_out = "input"; 102*4882a593Smuzhiyun phy-handle = <&rtl8211f>; 103*4882a593Smuzhiyun phy-mode = "rgmii"; 104*4882a593Smuzhiyun phy-supply = <&vcc_io>; 105*4882a593Smuzhiyun pinctrl-names = "default"; 106*4882a593Smuzhiyun pinctrl-0 = <&rgmiim1_pins>; 107*4882a593Smuzhiyun snps,aal; 108*4882a593Smuzhiyun snps,pbl = <0x4>; 109*4882a593Smuzhiyun tx_delay = <0x26>; 110*4882a593Smuzhiyun rx_delay = <0x11>; 111*4882a593Smuzhiyun status = "okay"; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun mdio { 114*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 115*4882a593Smuzhiyun #address-cells = <1>; 116*4882a593Smuzhiyun #size-cells = <0>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun rtl8211f: ethernet-phy@0 { 119*4882a593Smuzhiyun reg = <0>; 120*4882a593Smuzhiyun reset-assert-us = <10000>; 121*4882a593Smuzhiyun reset-deassert-us = <30000>; 122*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_LOW>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&gpu { 128*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&hdmi { 132*4882a593Smuzhiyun status = "okay"; 133*4882a593Smuzhiyun}; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun&hdmiphy { 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&hdmi_sound { 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&i2c1 { 144*4882a593Smuzhiyun clock-frequency = <1000000>; 145*4882a593Smuzhiyun i2c-scl-falling-time-ns = <5>; 146*4882a593Smuzhiyun i2c-scl-rising-time-ns = <83>; 147*4882a593Smuzhiyun status = "okay"; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun pmic@18 { 150*4882a593Smuzhiyun compatible = "rockchip,rk805"; 151*4882a593Smuzhiyun reg = <0x18>; 152*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 153*4882a593Smuzhiyun interrupts = <RK_PA6 IRQ_TYPE_LEVEL_LOW>; 154*4882a593Smuzhiyun pinctrl-names = "default"; 155*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 156*4882a593Smuzhiyun rockchip,system-power-controller; 157*4882a593Smuzhiyun wakeup-source; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 160*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 161*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 162*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 163*4882a593Smuzhiyun vcc5-supply = <&vcc_io>; 164*4882a593Smuzhiyun vcc6-supply = <&vcc_io>; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun regulators { 167*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 168*4882a593Smuzhiyun regulator-name = "vdd_logic"; 169*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 170*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 171*4882a593Smuzhiyun regulator-always-on; 172*4882a593Smuzhiyun regulator-boot-on; 173*4882a593Smuzhiyun regulator-state-mem { 174*4882a593Smuzhiyun regulator-on-in-suspend; 175*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 180*4882a593Smuzhiyun regulator-name = "vdd_arm"; 181*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 182*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 183*4882a593Smuzhiyun regulator-always-on; 184*4882a593Smuzhiyun regulator-boot-on; 185*4882a593Smuzhiyun regulator-state-mem { 186*4882a593Smuzhiyun regulator-on-in-suspend; 187*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 192*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 193*4882a593Smuzhiyun regulator-always-on; 194*4882a593Smuzhiyun regulator-boot-on; 195*4882a593Smuzhiyun regulator-state-mem { 196*4882a593Smuzhiyun regulator-on-in-suspend; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 201*4882a593Smuzhiyun regulator-name = "vcc_io"; 202*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 203*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 204*4882a593Smuzhiyun regulator-always-on; 205*4882a593Smuzhiyun regulator-boot-on; 206*4882a593Smuzhiyun regulator-state-mem { 207*4882a593Smuzhiyun regulator-on-in-suspend; 208*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun vdd_18: LDO_REG1 { 213*4882a593Smuzhiyun regulator-name = "vdd_18"; 214*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 215*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 216*4882a593Smuzhiyun regulator-always-on; 217*4882a593Smuzhiyun regulator-boot-on; 218*4882a593Smuzhiyun regulator-state-mem { 219*4882a593Smuzhiyun regulator-on-in-suspend; 220*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vcc18_emmc: LDO_REG2 { 225*4882a593Smuzhiyun regulator-name = "vcc_18emmc"; 226*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 227*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 228*4882a593Smuzhiyun regulator-always-on; 229*4882a593Smuzhiyun regulator-boot-on; 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-on-in-suspend; 232*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun vdd_11: LDO_REG3 { 237*4882a593Smuzhiyun regulator-name = "vdd_11"; 238*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 239*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 240*4882a593Smuzhiyun regulator-always-on; 241*4882a593Smuzhiyun regulator-boot-on; 242*4882a593Smuzhiyun regulator-state-mem { 243*4882a593Smuzhiyun regulator-on-in-suspend; 244*4882a593Smuzhiyun regulator-suspend-microvolt = <1100000>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun}; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun&i2s0 { 252*4882a593Smuzhiyun status = "okay"; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&i2s1 { 256*4882a593Smuzhiyun status = "okay"; 257*4882a593Smuzhiyun}; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun&io_domains { 260*4882a593Smuzhiyun vccio1-supply = <&vcc_io>; 261*4882a593Smuzhiyun vccio2-supply = <&vcc18_emmc>; 262*4882a593Smuzhiyun vccio3-supply = <&vcc_io>; 263*4882a593Smuzhiyun vccio4-supply = <&vdd_18>; 264*4882a593Smuzhiyun vccio5-supply = <&vcc_io>; 265*4882a593Smuzhiyun vccio6-supply = <&vdd_18>; 266*4882a593Smuzhiyun pmuio-supply = <&vcc_io>; 267*4882a593Smuzhiyun status = "okay"; 268*4882a593Smuzhiyun}; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun&pinctrl { 271*4882a593Smuzhiyun pmic { 272*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 273*4882a593Smuzhiyun rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun usb3 { 278*4882a593Smuzhiyun usb30_host_drv: usb30-host-drv { 279*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun wifi { 284*4882a593Smuzhiyun bt_dis: bt-dis { 285*4882a593Smuzhiyun rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_output_low>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun bt_wake_host: bt-wake-host { 289*4882a593Smuzhiyun rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun chip_en: chip-en { 293*4882a593Smuzhiyun rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_output_low>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun host_wake_bt: host-wake-bt { 297*4882a593Smuzhiyun rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_output_high>; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun wl_dis: wl-dis { 301*4882a593Smuzhiyun rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_output_low>; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun wl_wake_host: wl-wake-host { 305*4882a593Smuzhiyun rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun}; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun&sdmmc { 311*4882a593Smuzhiyun bus-width = <4>; 312*4882a593Smuzhiyun cap-mmc-highspeed; 313*4882a593Smuzhiyun cap-sd-highspeed; 314*4882a593Smuzhiyun disable-wp; 315*4882a593Smuzhiyun pinctrl-names = "default"; 316*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; 317*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 318*4882a593Smuzhiyun vqmmc-supply = <&vcc_io>; 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun&tsadc { 323*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; 324*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; 325*4882a593Smuzhiyun status = "okay"; 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun&uart2 { 329*4882a593Smuzhiyun status = "okay"; 330*4882a593Smuzhiyun}; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun&u2phy { 333*4882a593Smuzhiyun status = "okay"; 334*4882a593Smuzhiyun}; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun&u2phy_host { 337*4882a593Smuzhiyun status = "okay"; 338*4882a593Smuzhiyun}; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun&u2phy_otg { 341*4882a593Smuzhiyun status = "okay"; 342*4882a593Smuzhiyun}; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun&usb20_otg { 345*4882a593Smuzhiyun dr_mode = "host"; 346*4882a593Smuzhiyun status = "okay"; 347*4882a593Smuzhiyun}; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun&usb_host0_ehci { 350*4882a593Smuzhiyun pinctrl-names = "default"; 351*4882a593Smuzhiyun pinctrl-0 = <&bt_dis &bt_wake_host &chip_en &host_wake_bt &wl_dis &wl_wake_host>; 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun}; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun&vop { 356*4882a593Smuzhiyun status = "okay"; 357*4882a593Smuzhiyun}; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun&vop_mmu { 360*4882a593Smuzhiyun status = "okay"; 361*4882a593Smuzhiyun}; 362