1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6#include "px30.dtsi" 7 8&cru { 9 assigned-clocks = <&cru PLL_NPLL>; 10 assigned-clock-rates = <1040000000>; 11}; 12 13&display_subsystem { 14 ports = <&vopb_out>; 15}; 16 17&gpu_opp_table { 18 opp-520000000 { 19 opp-hz = /bits/ 64 <520000000>; 20 opp-microvolt = <1175000>; 21 opp-microvolt-L0 = <1175000>; 22 opp-microvolt-L1 = <1150000>; 23 opp-microvolt-L2 = <1100000>; 24 opp-microvolt-L3 = <1050000>; 25 }; 26}; 27 28&rgb { 29 phys = <&video_phy>; 30 phy-names = "phy"; 31 pinctrl-names = "default", "sleep"; 32 pinctrl-0 = <&lcdc_m1_rgb_pins>; 33 pinctrl-1 = <&lcdc_m1_sleep_pins>; 34}; 35 36&pinctrl { 37 lcdc { 38 lcdc_m1_rgb_pins: lcdc-m1-rgb-pins { 39 rockchip,pins = 40 <3 RK_PA0 1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ 41 <3 RK_PA4 1 &pcfg_pull_none_8ma>, /* LCDC_D0 */ 42 <3 RK_PA6 1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ 43 <3 RK_PB2 1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ 44 <3 RK_PB3 1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ 45 <3 RK_PB5 1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ 46 <3 RK_PC0 1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ 47 <3 RK_PC1 1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ 48 <3 RK_PC2 1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ 49 <3 RK_PC3 1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ 50 <3 RK_PC4 1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ 51 <3 RK_PC5 1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ 52 <3 RK_PC6 1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ 53 <3 RK_PC7 1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ 54 <3 RK_PD0 1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ 55 <3 RK_PD1 1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ 56 <3 RK_PD2 1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ 57 <3 RK_PD3 1 &pcfg_pull_none_8ma>; /* LCDC_D23 */ 58 }; 59 60 lcdc_m1_sleep_pins: lcdc-m1-sleep-pins { 61 rockchip,pins = 62 <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ 63 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */ 64 <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ 65 <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ 66 <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ 67 <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ 68 <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ 69 <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ 70 <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ 71 <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ 72 <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ 73 <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ 74 <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ 75 <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ 76 <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ 77 <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ 78 <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ 79 <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */ 80 }; 81 }; 82}; 83 84/delete-node/ &dsi_in_vopl; 85/delete-node/ &lvds_vopl_in; 86/delete-node/ &rgb_in_vopl; 87/delete-node/ &vopl; 88/delete-node/ &vopl_mmu; 89