1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h> 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun adc-keys { 14*4882a593Smuzhiyun compatible = "adc-keys"; 15*4882a593Smuzhiyun io-channels = <&saradc 2>; 16*4882a593Smuzhiyun io-channel-names = "buttons"; 17*4882a593Smuzhiyun poll-interval = <100>; 18*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun esc-key { 21*4882a593Smuzhiyun linux,code = <KEY_ESC>; 22*4882a593Smuzhiyun label = "esc"; 23*4882a593Smuzhiyun press-threshold-microvolt = <1310000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun home-key { 27*4882a593Smuzhiyun linux,code = <KEY_HOME>; 28*4882a593Smuzhiyun label = "home"; 29*4882a593Smuzhiyun press-threshold-microvolt = <624000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun menu-key { 33*4882a593Smuzhiyun linux,code = <KEY_MENU>; 34*4882a593Smuzhiyun label = "menu"; 35*4882a593Smuzhiyun press-threshold-microvolt = <987000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun vol-down-key { 39*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 40*4882a593Smuzhiyun label = "volume down"; 41*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun vol-up-key { 45*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 46*4882a593Smuzhiyun label = "volume up"; 47*4882a593Smuzhiyun press-threshold-microvolt = <17000>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun backlight: backlight { 52*4882a593Smuzhiyun compatible = "pwm-backlight"; 53*4882a593Smuzhiyun pwms = <&pwm1 0 25000 0>; 54*4882a593Smuzhiyun brightness-levels = < 55*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 56*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 57*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 58*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 59*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 60*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 61*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 62*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 63*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 64*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 65*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 66*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 67*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 68*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 69*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 70*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 71*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 72*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 73*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 74*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 75*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 76*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 77*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 78*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 79*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 80*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 81*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 82*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 83*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 84*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 85*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 86*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 87*4882a593Smuzhiyun default-brightness-level = <200>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun rk817-sound { 91*4882a593Smuzhiyun compatible = "rockchip,multicodecs-card"; 92*4882a593Smuzhiyun rockchip,card-name = "rockchip-rk817"; 93*4882a593Smuzhiyun hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; 94*4882a593Smuzhiyun io-channels = <&saradc 1>; 95*4882a593Smuzhiyun io-channel-names = "adc-detect"; 96*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 97*4882a593Smuzhiyun poll-interval = <100>; 98*4882a593Smuzhiyun rockchip,format = "i2s"; 99*4882a593Smuzhiyun rockchip,mclk-fs = <256>; 100*4882a593Smuzhiyun rockchip,cpu = <&i2s1_2ch>; 101*4882a593Smuzhiyun rockchip,codec = <&rk817_codec>; 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&hp_det>; 104*4882a593Smuzhiyun play-pause-key { 105*4882a593Smuzhiyun label = "playpause"; 106*4882a593Smuzhiyun linux,code = <KEY_PLAYPAUSE>; 107*4882a593Smuzhiyun press-threshold-microvolt = <2000>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 112*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 113*4882a593Smuzhiyun /*clocks = <&rk817 1>;*/ 114*4882a593Smuzhiyun /*clock-names = "ext_clock";*/ 115*4882a593Smuzhiyun pinctrl-names = "default"; 116*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* 119*4882a593Smuzhiyun * On the module itself this is one of these (depending 120*4882a593Smuzhiyun * on the actual card populated): 121*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 122*4882a593Smuzhiyun * - PDN (power down when low) 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun test-power { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun vccsys: vccsys { 132*4882a593Smuzhiyun compatible = "regulator-fixed"; 133*4882a593Smuzhiyun regulator-name = "vcc3v8_sys"; 134*4882a593Smuzhiyun regulator-always-on; 135*4882a593Smuzhiyun regulator-boot-on; 136*4882a593Smuzhiyun regulator-min-microvolt = <3800000>; 137*4882a593Smuzhiyun regulator-max-microvolt = <3800000>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun wireless-wlan { 141*4882a593Smuzhiyun compatible = "wlan-platdata"; 142*4882a593Smuzhiyun wifi_chip_type = "AP6210"; 143*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; 144*4882a593Smuzhiyun WIFI,poweren_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 145*4882a593Smuzhiyun status = "okay"; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun wireless-bluetooth { 149*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 150*4882a593Smuzhiyun clocks = <&rk817 1>; 151*4882a593Smuzhiyun clock-names = "ext_clock"; 152*4882a593Smuzhiyun uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; 153*4882a593Smuzhiyun pinctrl-names = "default","rts_gpio"; 154*4882a593Smuzhiyun pinctrl-0 = <&uart1_rts>; 155*4882a593Smuzhiyun pinctrl-1 = <&uart1_rts_gpio>; 156*4882a593Smuzhiyun BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 157*4882a593Smuzhiyun BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 158*4882a593Smuzhiyun BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun vcc18_lcd_n: vcc18-lcd-n { 163*4882a593Smuzhiyun compatible = "regulator-fixed"; 164*4882a593Smuzhiyun regulator-name = "vcc18_lcd_n"; 165*4882a593Smuzhiyun regulator-boot-on; 166*4882a593Smuzhiyun gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 167*4882a593Smuzhiyun enable-active-high; 168*4882a593Smuzhiyun regulator-state-mem { 169*4882a593Smuzhiyun regulator-off-in-suspend; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&bus_apll { 175*4882a593Smuzhiyun bus-supply = <&vdd_logic>; 176*4882a593Smuzhiyun status = "okay"; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&cpu0 { 180*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 181*4882a593Smuzhiyun}; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun&display_subsystem { 184*4882a593Smuzhiyun status = "okay"; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&dsi { 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun panel@0 { 191*4882a593Smuzhiyun compatible = "sitronix,st7703", "simple-panel-dsi"; 192*4882a593Smuzhiyun reg = <0>; 193*4882a593Smuzhiyun backlight = <&backlight>; 194*4882a593Smuzhiyun power-supply = <&vcc18_lcd_n>; 195*4882a593Smuzhiyun prepare-delay-ms = <2>; 196*4882a593Smuzhiyun reset-delay-ms = <1>; 197*4882a593Smuzhiyun init-delay-ms = <20>; 198*4882a593Smuzhiyun enable-delay-ms = <120>; 199*4882a593Smuzhiyun disable-delay-ms = <50>; 200*4882a593Smuzhiyun unprepare-delay-ms = <20>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun width-mm = <68>; 203*4882a593Smuzhiyun height-mm = <121>; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 206*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 207*4882a593Smuzhiyun dsi,format = <MIPI_DSI_FMT_RGB888>; 208*4882a593Smuzhiyun dsi,lanes = <4>; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun panel-init-sequence = [ 211*4882a593Smuzhiyun 05 fa 01 11 212*4882a593Smuzhiyun 39 00 04 b9 f1 12 83 213*4882a593Smuzhiyun 39 00 1c ba 33 81 05 f9 0e 0e 00 00 00 214*4882a593Smuzhiyun 00 00 00 00 00 44 25 00 91 0a 215*4882a593Smuzhiyun 00 00 02 4f 01 00 00 37 216*4882a593Smuzhiyun 15 00 02 b8 25 217*4882a593Smuzhiyun 39 00 04 bf 02 11 00 218*4882a593Smuzhiyun 39 00 0b b3 0c 10 0a 50 03 ff 00 00 00 219*4882a593Smuzhiyun 00 220*4882a593Smuzhiyun 39 00 0a c0 73 73 50 50 00 00 08 70 00 221*4882a593Smuzhiyun 15 00 02 bc 46 222*4882a593Smuzhiyun 15 00 02 cc 0b 223*4882a593Smuzhiyun 15 00 02 b4 80 224*4882a593Smuzhiyun 39 00 04 b2 c8 12 30 225*4882a593Smuzhiyun 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 226*4882a593Smuzhiyun 00 ff 00 c0 10 227*4882a593Smuzhiyun 39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67 228*4882a593Smuzhiyun 77 33 33 229*4882a593Smuzhiyun 39 00 07 c6 00 00 ff ff 01 ff 230*4882a593Smuzhiyun 39 00 03 b5 09 09 231*4882a593Smuzhiyun 39 00 03 b6 87 95 232*4882a593Smuzhiyun 39 00 40 e9 c2 10 05 05 10 05 a0 12 31 233*4882a593Smuzhiyun 23 3f 81 0a a0 37 18 00 80 01 234*4882a593Smuzhiyun 00 00 00 00 80 01 00 00 00 48 235*4882a593Smuzhiyun f8 86 42 08 88 88 80 88 88 88 236*4882a593Smuzhiyun 58 f8 87 53 18 88 88 81 88 88 237*4882a593Smuzhiyun 88 00 00 00 01 00 00 00 00 00 238*4882a593Smuzhiyun 00 00 00 00 239*4882a593Smuzhiyun 39 00 3e ea 00 1a 00 00 00 00 02 00 00 240*4882a593Smuzhiyun 00 00 00 1f 88 81 35 78 88 88 241*4882a593Smuzhiyun 85 88 88 88 0f 88 80 24 68 88 242*4882a593Smuzhiyun 88 84 88 88 88 23 10 00 00 1c 243*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 00 00 244*4882a593Smuzhiyun 00 00 00 00 00 30 05 a0 00 00 245*4882a593Smuzhiyun 00 00 246*4882a593Smuzhiyun 39 00 23 e0 00 06 08 2a 31 3f 38 36 07 247*4882a593Smuzhiyun 0c 0d 11 13 12 13 11 18 00 06 248*4882a593Smuzhiyun 08 2a 31 3f 38 36 07 0c 0d 11 249*4882a593Smuzhiyun 13 12 13 11 18 250*4882a593Smuzhiyun 05 32 01 29 251*4882a593Smuzhiyun ]; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun panel-exit-sequence = [ 254*4882a593Smuzhiyun 05 00 01 28 255*4882a593Smuzhiyun 05 00 01 10 256*4882a593Smuzhiyun ]; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun display-timings { 259*4882a593Smuzhiyun native-mode = <&timing0>; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun timing0: timing0 { 262*4882a593Smuzhiyun clock-frequency = <66000000>; 263*4882a593Smuzhiyun hactive = <720>; 264*4882a593Smuzhiyun vactive = <1280>; 265*4882a593Smuzhiyun hfront-porch = <40>; 266*4882a593Smuzhiyun hsync-len = <10>; 267*4882a593Smuzhiyun hback-porch = <40>; 268*4882a593Smuzhiyun vfront-porch = <22>; 269*4882a593Smuzhiyun vsync-len = <4>; 270*4882a593Smuzhiyun vback-porch = <11>; 271*4882a593Smuzhiyun hsync-active = <0>; 272*4882a593Smuzhiyun vsync-active = <0>; 273*4882a593Smuzhiyun de-active = <0>; 274*4882a593Smuzhiyun pixelclk-active = <0>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun ports { 279*4882a593Smuzhiyun #address-cells = <1>; 280*4882a593Smuzhiyun #size-cells = <0>; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun port@0 { 283*4882a593Smuzhiyun reg = <0>; 284*4882a593Smuzhiyun panel_in_dsi: endpoint { 285*4882a593Smuzhiyun remote-endpoint = <&dsi_out_panel>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun ports { 292*4882a593Smuzhiyun #address-cells = <1>; 293*4882a593Smuzhiyun #size-cells = <0>; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun port@1 { 296*4882a593Smuzhiyun reg = <1>; 297*4882a593Smuzhiyun dsi_out_panel: endpoint { 298*4882a593Smuzhiyun remote-endpoint = <&panel_in_dsi>; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&dsi_in_vopb { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun}; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun&route_dsi { 309*4882a593Smuzhiyun connect = <&vopb_out_dsi>; 310*4882a593Smuzhiyun status = "okay"; 311*4882a593Smuzhiyun}; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun&dfi { 314*4882a593Smuzhiyun status = "okay"; 315*4882a593Smuzhiyun}; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun&dmc { 318*4882a593Smuzhiyun center-supply = <&vdd_logic>; 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun&emmc { 323*4882a593Smuzhiyun bus-width = <8>; 324*4882a593Smuzhiyun cap-mmc-highspeed; 325*4882a593Smuzhiyun mmc-hs200-1_8v; 326*4882a593Smuzhiyun no-sdio; 327*4882a593Smuzhiyun no-sd; 328*4882a593Smuzhiyun disable-wp; 329*4882a593Smuzhiyun non-removable; 330*4882a593Smuzhiyun num-slots = <1>; 331*4882a593Smuzhiyun status = "okay"; 332*4882a593Smuzhiyun}; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun&gpu { 335*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 336*4882a593Smuzhiyun status = "okay"; 337*4882a593Smuzhiyun}; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun&i2c0 { 340*4882a593Smuzhiyun status = "okay"; 341*4882a593Smuzhiyun clock-frequency = <400000>; 342*4882a593Smuzhiyun i2c-scl-rising-time-ns = <280>; 343*4882a593Smuzhiyun i2c-scl-falling-time-ns = <16>; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun rk817: pmic@20 { 346*4882a593Smuzhiyun compatible = "rockchip,rk817"; 347*4882a593Smuzhiyun reg = <0x20>; 348*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 349*4882a593Smuzhiyun interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 350*4882a593Smuzhiyun pinctrl-names = "default", "pmic-sleep", 351*4882a593Smuzhiyun "pmic-power-off", "pmic-reset"; 352*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 353*4882a593Smuzhiyun pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 354*4882a593Smuzhiyun pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 355*4882a593Smuzhiyun pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>; 356*4882a593Smuzhiyun rockchip,system-power-controller; 357*4882a593Smuzhiyun wakeup-source; 358*4882a593Smuzhiyun #clock-cells = <1>; 359*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 360*4882a593Smuzhiyun //fb-inner-reg-idxs = <2>; 361*4882a593Smuzhiyun /* 1: rst regs (default in codes), 0: rst the pmic */ 362*4882a593Smuzhiyun pmic-reset-func = <1>; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun vcc1-supply = <&vccsys>; 365*4882a593Smuzhiyun vcc2-supply = <&vccsys>; 366*4882a593Smuzhiyun vcc3-supply = <&vccsys>; 367*4882a593Smuzhiyun vcc4-supply = <&vccsys>; 368*4882a593Smuzhiyun vcc5-supply = <&vccsys>; 369*4882a593Smuzhiyun vcc6-supply = <&vccsys>; 370*4882a593Smuzhiyun vcc7-supply = <&vcc_3v0>; 371*4882a593Smuzhiyun vcc8-supply = <&vccsys>; 372*4882a593Smuzhiyun vcc9-supply = <&dcdc_boost>; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun pwrkey { 375*4882a593Smuzhiyun status = "okay"; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun pinctrl_rk8xx: pinctrl_rk8xx { 379*4882a593Smuzhiyun gpio-controller; 380*4882a593Smuzhiyun #gpio-cells = <2>; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun rk817_ts_gpio1: rk817_ts_gpio1 { 383*4882a593Smuzhiyun pins = "gpio_ts"; 384*4882a593Smuzhiyun function = "pin_fun1"; 385*4882a593Smuzhiyun /* output-low; */ 386*4882a593Smuzhiyun /* input-enable; */ 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun rk817_gt_gpio2: rk817_gt_gpio2 { 390*4882a593Smuzhiyun pins = "gpio_gt"; 391*4882a593Smuzhiyun function = "pin_fun1"; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun rk817_pin_ts: rk817_pin_ts { 395*4882a593Smuzhiyun pins = "gpio_ts"; 396*4882a593Smuzhiyun function = "pin_fun0"; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun rk817_pin_gt: rk817_pin_gt { 400*4882a593Smuzhiyun pins = "gpio_gt"; 401*4882a593Smuzhiyun function = "pin_fun0"; 402*4882a593Smuzhiyun }; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun rk817_slppin_null: rk817_slppin_null { 405*4882a593Smuzhiyun pins = "gpio_slp"; 406*4882a593Smuzhiyun function = "pin_fun0"; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun rk817_slppin_slp: rk817_slppin_slp { 410*4882a593Smuzhiyun pins = "gpio_slp"; 411*4882a593Smuzhiyun function = "pin_fun1"; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun rk817_slppin_pwrdn: rk817_slppin_pwrdn { 415*4882a593Smuzhiyun pins = "gpio_slp"; 416*4882a593Smuzhiyun function = "pin_fun2"; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun rk817_slppin_rst: rk817_slppin_rst { 420*4882a593Smuzhiyun pins = "gpio_slp"; 421*4882a593Smuzhiyun function = "pin_fun3"; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun regulators { 426*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 427*4882a593Smuzhiyun regulator-always-on; 428*4882a593Smuzhiyun regulator-boot-on; 429*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 430*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 431*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 432*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 433*4882a593Smuzhiyun regulator-name = "vdd_logic"; 434*4882a593Smuzhiyun regulator-state-mem { 435*4882a593Smuzhiyun regulator-on-in-suspend; 436*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 437*4882a593Smuzhiyun }; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 441*4882a593Smuzhiyun regulator-always-on; 442*4882a593Smuzhiyun regulator-boot-on; 443*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 444*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 445*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 446*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 447*4882a593Smuzhiyun regulator-name = "vdd_arm"; 448*4882a593Smuzhiyun regulator-state-mem { 449*4882a593Smuzhiyun regulator-off-in-suspend; 450*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 455*4882a593Smuzhiyun regulator-always-on; 456*4882a593Smuzhiyun regulator-boot-on; 457*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 458*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 459*4882a593Smuzhiyun regulator-state-mem { 460*4882a593Smuzhiyun regulator-on-in-suspend; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun vcc_3v0: DCDC_REG4 { 465*4882a593Smuzhiyun regulator-always-on; 466*4882a593Smuzhiyun regulator-boot-on; 467*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 468*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 469*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 470*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 471*4882a593Smuzhiyun regulator-state-mem { 472*4882a593Smuzhiyun regulator-off-in-suspend; 473*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun vcc_1v0: LDO_REG1 { 478*4882a593Smuzhiyun regulator-always-on; 479*4882a593Smuzhiyun regulator-boot-on; 480*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 481*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 482*4882a593Smuzhiyun regulator-name = "vcc_1v0"; 483*4882a593Smuzhiyun regulator-state-mem { 484*4882a593Smuzhiyun regulator-on-in-suspend; 485*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun vcc1v8_soc: LDO_REG2 { 490*4882a593Smuzhiyun regulator-always-on; 491*4882a593Smuzhiyun regulator-boot-on; 492*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 493*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun regulator-name = "vcc1v8_soc"; 496*4882a593Smuzhiyun regulator-state-mem { 497*4882a593Smuzhiyun regulator-on-in-suspend; 498*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun vdd1v0_soc: LDO_REG3 { 503*4882a593Smuzhiyun regulator-always-on; 504*4882a593Smuzhiyun regulator-boot-on; 505*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 506*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun regulator-name = "vcc1v0_soc"; 509*4882a593Smuzhiyun regulator-state-mem { 510*4882a593Smuzhiyun regulator-on-in-suspend; 511*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun }; 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun vcc3v0_pmu: LDO_REG4 { 516*4882a593Smuzhiyun regulator-always-on; 517*4882a593Smuzhiyun regulator-boot-on; 518*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 519*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun regulator-name = "vcc3v0_pmu"; 522*4882a593Smuzhiyun regulator-state-mem { 523*4882a593Smuzhiyun regulator-on-in-suspend; 524*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 530*4882a593Smuzhiyun regulator-always-on; 531*4882a593Smuzhiyun regulator-boot-on; 532*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 533*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun regulator-name = "vccio_sd"; 536*4882a593Smuzhiyun regulator-state-mem { 537*4882a593Smuzhiyun regulator-on-in-suspend; 538*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun vcc_sd: LDO_REG6 { 543*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 544*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun regulator-name = "vcc_sd"; 547*4882a593Smuzhiyun regulator-state-mem { 548*4882a593Smuzhiyun regulator-on-in-suspend; 549*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun vcc2v8_dvp: LDO_REG7 { 555*4882a593Smuzhiyun regulator-always-on; 556*4882a593Smuzhiyun regulator-boot-on; 557*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 558*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun regulator-name = "vcc2v8_dvp"; 561*4882a593Smuzhiyun regulator-state-mem { 562*4882a593Smuzhiyun regulator-off-in-suspend; 563*4882a593Smuzhiyun regulator-suspend-microvolt = <2800000>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG8 { 568*4882a593Smuzhiyun regulator-always-on; 569*4882a593Smuzhiyun regulator-boot-on; 570*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 571*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 574*4882a593Smuzhiyun regulator-state-mem { 575*4882a593Smuzhiyun regulator-on-in-suspend; 576*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 577*4882a593Smuzhiyun }; 578*4882a593Smuzhiyun }; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun vdd1v5_dvp: LDO_REG9 { 581*4882a593Smuzhiyun regulator-always-on; 582*4882a593Smuzhiyun regulator-boot-on; 583*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 584*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 585*4882a593Smuzhiyun 586*4882a593Smuzhiyun regulator-name = "vdd1v5_dvp"; 587*4882a593Smuzhiyun regulator-state-mem { 588*4882a593Smuzhiyun regulator-off-in-suspend; 589*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 590*4882a593Smuzhiyun }; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun dcdc_boost: BOOST { 594*4882a593Smuzhiyun regulator-always-on; 595*4882a593Smuzhiyun regulator-boot-on; 596*4882a593Smuzhiyun regulator-min-microvolt = <4700000>; 597*4882a593Smuzhiyun regulator-max-microvolt = <5400000>; 598*4882a593Smuzhiyun regulator-name = "boost"; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun otg_switch: OTG_SWITCH { 602*4882a593Smuzhiyun regulator-name = "otg_switch"; 603*4882a593Smuzhiyun }; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun battery { 607*4882a593Smuzhiyun compatible = "rk817,battery"; 608*4882a593Smuzhiyun ocv_table = <3500 3625 3685 3697 3718 3735 3748 609*4882a593Smuzhiyun 3760 3774 3788 3802 3816 3834 3853 610*4882a593Smuzhiyun 3877 3908 3946 3975 4018 4071 4106>; 611*4882a593Smuzhiyun design_capacity = <2500>; 612*4882a593Smuzhiyun design_qmax = <2750>; 613*4882a593Smuzhiyun bat_res = <100>; 614*4882a593Smuzhiyun sleep_enter_current = <300>; 615*4882a593Smuzhiyun sleep_exit_current = <300>; 616*4882a593Smuzhiyun sleep_filter_current = <100>; 617*4882a593Smuzhiyun power_off_thresd = <3500>; 618*4882a593Smuzhiyun zero_algorithm_vol = <3850>; 619*4882a593Smuzhiyun max_soc_offset = <60>; 620*4882a593Smuzhiyun monitor_sec = <5>; 621*4882a593Smuzhiyun sample_res = <10>; 622*4882a593Smuzhiyun virtual_power = <1>; 623*4882a593Smuzhiyun }; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun charger { 626*4882a593Smuzhiyun compatible = "rk817,charger"; 627*4882a593Smuzhiyun min_input_voltage = <4500>; 628*4882a593Smuzhiyun max_input_current = <1500>; 629*4882a593Smuzhiyun max_chrg_current = <2000>; 630*4882a593Smuzhiyun max_chrg_voltage = <4200>; 631*4882a593Smuzhiyun chrg_term_mode = <0>; 632*4882a593Smuzhiyun chrg_finish_cur = <300>; 633*4882a593Smuzhiyun virtual_power = <0>; 634*4882a593Smuzhiyun dc_det_adc = <0>; 635*4882a593Smuzhiyun extcon = <&u2phy>; 636*4882a593Smuzhiyun }; 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun rk817_codec: codec { 639*4882a593Smuzhiyun #sound-dai-cells = <0>; 640*4882a593Smuzhiyun compatible = "rockchip,rk817-codec"; 641*4882a593Smuzhiyun clocks = <&cru SCLK_I2S1_OUT>; 642*4882a593Smuzhiyun clock-names = "mclk"; 643*4882a593Smuzhiyun pinctrl-names = "default"; 644*4882a593Smuzhiyun pinctrl-0 = <&i2s1_2ch_mclk>; 645*4882a593Smuzhiyun hp-volume = <20>; 646*4882a593Smuzhiyun spk-volume = <3>; 647*4882a593Smuzhiyun status = "okay"; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun}; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun&i2c1 { 653*4882a593Smuzhiyun status = "okay"; 654*4882a593Smuzhiyun clock-frequency = <400000>; 655*4882a593Smuzhiyun i2c-scl-rising-time-ns = <275>; 656*4882a593Smuzhiyun i2c-scl-falling-time-ns = <16>; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun sensor@f { 659*4882a593Smuzhiyun status = "okay"; 660*4882a593Smuzhiyun compatible = "ak8963"; 661*4882a593Smuzhiyun reg = <0x0f>; 662*4882a593Smuzhiyun type = <SENSOR_TYPE_COMPASS>; 663*4882a593Smuzhiyun irq_enable = <0>; 664*4882a593Smuzhiyun poll_delay_ms = <30>; 665*4882a593Smuzhiyun layout = <1>; 666*4882a593Smuzhiyun reprobe_en = <1>; 667*4882a593Smuzhiyun }; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun gt1x: gt1x@14 { 670*4882a593Smuzhiyun compatible = "goodix,gt1x"; 671*4882a593Smuzhiyun reg = <0x14>; 672*4882a593Smuzhiyun power-supply = <&vcc18_lcd_n>; 673*4882a593Smuzhiyun goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 674*4882a593Smuzhiyun goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>; 675*4882a593Smuzhiyun }; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun sensor@4c { 678*4882a593Smuzhiyun status = "okay"; 679*4882a593Smuzhiyun compatible = "gs_mma7660"; 680*4882a593Smuzhiyun reg = <0x4c>; 681*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 682*4882a593Smuzhiyun irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 683*4882a593Smuzhiyun irq_enable = <0>; 684*4882a593Smuzhiyun poll_delay_ms = <30>; 685*4882a593Smuzhiyun layout = <1>; 686*4882a593Smuzhiyun reprobe_en = <1>; 687*4882a593Smuzhiyun }; 688*4882a593Smuzhiyun}; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun&i2c2 { 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&i2s1_2ch { 695*4882a593Smuzhiyun status = "okay"; 696*4882a593Smuzhiyun #sound-dai-cells = <0>; 697*4882a593Smuzhiyun}; 698*4882a593Smuzhiyun 699*4882a593Smuzhiyun&io_domains { 700*4882a593Smuzhiyun status = "okay"; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun vccio1-supply = <&vcc1v8_soc>; 703*4882a593Smuzhiyun vccio2-supply = <&vccio_sd>; 704*4882a593Smuzhiyun vccio3-supply = <&vcc1v8_dvp>; 705*4882a593Smuzhiyun vccio4-supply = <&vcc_3v0>; 706*4882a593Smuzhiyun vccio5-supply = <&vcc_3v0>; 707*4882a593Smuzhiyun}; 708*4882a593Smuzhiyun 709*4882a593Smuzhiyun&isp_mmu { 710*4882a593Smuzhiyun status = "okay"; 711*4882a593Smuzhiyun}; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun&nandc0 { 714*4882a593Smuzhiyun status = "okay"; 715*4882a593Smuzhiyun}; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun&pinctrl { 718*4882a593Smuzhiyun headphone { 719*4882a593Smuzhiyun hp_det: hp-det { 720*4882a593Smuzhiyun rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 721*4882a593Smuzhiyun }; 722*4882a593Smuzhiyun }; 723*4882a593Smuzhiyun 724*4882a593Smuzhiyun pmic { 725*4882a593Smuzhiyun pmic_int: pmic_int { 726*4882a593Smuzhiyun rockchip,pins = 727*4882a593Smuzhiyun <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 728*4882a593Smuzhiyun }; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun soc_slppin_gpio: soc_slppin_gpio { 731*4882a593Smuzhiyun rockchip,pins = 732*4882a593Smuzhiyun <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 733*4882a593Smuzhiyun }; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun soc_slppin_slp: soc_slppin_slp { 736*4882a593Smuzhiyun rockchip,pins = 737*4882a593Smuzhiyun <0 RK_PA4 1 &pcfg_pull_none>; 738*4882a593Smuzhiyun }; 739*4882a593Smuzhiyun 740*4882a593Smuzhiyun soc_slppin_rst: soc_slppin_rst { 741*4882a593Smuzhiyun rockchip,pins = 742*4882a593Smuzhiyun <0 RK_PA4 2 &pcfg_pull_none>; 743*4882a593Smuzhiyun }; 744*4882a593Smuzhiyun }; 745*4882a593Smuzhiyun 746*4882a593Smuzhiyun sdio-pwrseq { 747*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 748*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 749*4882a593Smuzhiyun }; 750*4882a593Smuzhiyun }; 751*4882a593Smuzhiyun}; 752*4882a593Smuzhiyun 753*4882a593Smuzhiyun&pmu_io_domains { 754*4882a593Smuzhiyun status = "okay"; 755*4882a593Smuzhiyun 756*4882a593Smuzhiyun pmuio1-supply = <&vcc3v0_pmu>; 757*4882a593Smuzhiyun pmuio2-supply = <&vcc3v0_pmu>; 758*4882a593Smuzhiyun}; 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun&pwm1 { 761*4882a593Smuzhiyun status = "okay"; 762*4882a593Smuzhiyun}; 763*4882a593Smuzhiyun 764*4882a593Smuzhiyun&rk_rga { 765*4882a593Smuzhiyun status = "okay"; 766*4882a593Smuzhiyun}; 767*4882a593Smuzhiyun 768*4882a593Smuzhiyun&rockchip_suspend { 769*4882a593Smuzhiyun status = "okay"; 770*4882a593Smuzhiyun rockchip,sleep-debug-en = <1>; 771*4882a593Smuzhiyun}; 772*4882a593Smuzhiyun 773*4882a593Smuzhiyun&saradc { 774*4882a593Smuzhiyun status = "okay"; 775*4882a593Smuzhiyun vref-supply = <&vcc1v8_soc>; 776*4882a593Smuzhiyun}; 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun&sdmmc { 779*4882a593Smuzhiyun bus-width = <4>; 780*4882a593Smuzhiyun cap-mmc-highspeed; 781*4882a593Smuzhiyun cap-sd-highspeed; 782*4882a593Smuzhiyun no-sdio; 783*4882a593Smuzhiyun no-mmc; 784*4882a593Smuzhiyun card-detect-delay = <800>; 785*4882a593Smuzhiyun ignore-pm-notify; 786*4882a593Smuzhiyun /*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/ 787*4882a593Smuzhiyun sd-uhs-sdr12; 788*4882a593Smuzhiyun sd-uhs-sdr25; 789*4882a593Smuzhiyun sd-uhs-sdr50; 790*4882a593Smuzhiyun sd-uhs-sdr104; 791*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 792*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 793*4882a593Smuzhiyun status = "disabled"; 794*4882a593Smuzhiyun}; 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun&sdio { 797*4882a593Smuzhiyun bus-width = <4>; 798*4882a593Smuzhiyun cap-sd-highspeed; 799*4882a593Smuzhiyun no-sd; 800*4882a593Smuzhiyun no-mmc; 801*4882a593Smuzhiyun ignore-pm-notify; 802*4882a593Smuzhiyun keep-power-in-suspend; 803*4882a593Smuzhiyun non-removable; 804*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 805*4882a593Smuzhiyun sd-uhs-sdr104; 806*4882a593Smuzhiyun status = "okay"; 807*4882a593Smuzhiyun}; 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun&tsadc { 810*4882a593Smuzhiyun pinctrl-names = "gpio", "otpout"; 811*4882a593Smuzhiyun pinctrl-0 = <&tsadc_otp_pin>; 812*4882a593Smuzhiyun pinctrl-1 = <&tsadc_otp_out>; 813*4882a593Smuzhiyun status = "okay"; 814*4882a593Smuzhiyun}; 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun&u2phy { 817*4882a593Smuzhiyun status = "okay"; 818*4882a593Smuzhiyun 819*4882a593Smuzhiyun u2phy_host: host-port { 820*4882a593Smuzhiyun status = "okay"; 821*4882a593Smuzhiyun }; 822*4882a593Smuzhiyun 823*4882a593Smuzhiyun u2phy_otg: otg-port { 824*4882a593Smuzhiyun status = "okay"; 825*4882a593Smuzhiyun }; 826*4882a593Smuzhiyun}; 827*4882a593Smuzhiyun 828*4882a593Smuzhiyun&usb20_otg { 829*4882a593Smuzhiyun status = "okay"; 830*4882a593Smuzhiyun}; 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun&uart1 { 833*4882a593Smuzhiyun pinctrl-names = "default"; 834*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer &uart1_cts>; 835*4882a593Smuzhiyun status = "okay"; 836*4882a593Smuzhiyun}; 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun&vopb { 839*4882a593Smuzhiyun status = "okay"; 840*4882a593Smuzhiyun}; 841*4882a593Smuzhiyun 842*4882a593Smuzhiyun&vopb_mmu { 843*4882a593Smuzhiyun status = "okay"; 844*4882a593Smuzhiyun}; 845*4882a593Smuzhiyun 846*4882a593Smuzhiyun&mpp_srv { 847*4882a593Smuzhiyun status = "okay"; 848*4882a593Smuzhiyun}; 849*4882a593Smuzhiyun 850*4882a593Smuzhiyun&vdpu { 851*4882a593Smuzhiyun status = "okay"; 852*4882a593Smuzhiyun}; 853*4882a593Smuzhiyun 854*4882a593Smuzhiyun&vepu { 855*4882a593Smuzhiyun status = "okay"; 856*4882a593Smuzhiyun}; 857*4882a593Smuzhiyun 858*4882a593Smuzhiyun&vpu_mmu { 859*4882a593Smuzhiyun status = "okay"; 860*4882a593Smuzhiyun}; 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun&hevc { 863*4882a593Smuzhiyun status = "okay"; 864*4882a593Smuzhiyun}; 865*4882a593Smuzhiyun 866*4882a593Smuzhiyun&hevc_mmu { 867*4882a593Smuzhiyun status = "okay"; 868*4882a593Smuzhiyun}; 869