xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3308k.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
7*4882a593Smuzhiyun#include "rk3308.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	uboot-wide-temperature {
11*4882a593Smuzhiyun		status = "okay";
12*4882a593Smuzhiyun		compatible = "rockchip,uboot-wide-temperature";
13*4882a593Smuzhiyun	};
14*4882a593Smuzhiyun};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun&cpu0_opp_table {
17*4882a593Smuzhiyun	rockchip,high-temp = <55000>;
18*4882a593Smuzhiyun	rockchip,high-temp-max-freq = <1008000>;
19*4882a593Smuzhiyun};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun&rk3308bs_cpu0_opp_table {
22*4882a593Smuzhiyun	rockchip,high-temp = <55000>;
23*4882a593Smuzhiyun	rockchip,high-temp-max-freq = <1008000>;
24*4882a593Smuzhiyun};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun&rockchip_suspend {
27*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
28*4882a593Smuzhiyun		(0
29*4882a593Smuzhiyun		| RKPM_PMU_HW_PLLS_PD
30*4882a593Smuzhiyun		| RKPM_PWM_VOLTAGE_DEFAULT
31*4882a593Smuzhiyun		)
32*4882a593Smuzhiyun	>;
33*4882a593Smuzhiyun};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun&thermal_zones {
36*4882a593Smuzhiyun	soc-thermal {
37*4882a593Smuzhiyun		sustainable-power = <422>;
38*4882a593Smuzhiyun		rk3308bs-sustainable-power = <363>;
39*4882a593Smuzhiyun		k_pu = <6>;
40*4882a593Smuzhiyun		k_po = <1024>;
41*4882a593Smuzhiyun		k_i = <0>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		trips {
44*4882a593Smuzhiyun			trip-point@0 {
45*4882a593Smuzhiyun				temperature = <55000>;
46*4882a593Smuzhiyun			};
47*4882a593Smuzhiyun			trip-point@1 {
48*4882a593Smuzhiyun				temperature = <90000>;
49*4882a593Smuzhiyun			};
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun};
53