xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk1808-evb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include <dt-bindings/display/media-bus-format.h>
5*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
6*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
7*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
8*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
9*4882a593Smuzhiyun#include "rk1808.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Rockchip RK1808 EVB";
13*4882a593Smuzhiyun	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	adc_key: adc-keys {
16*4882a593Smuzhiyun		compatible = "adc-keys";
17*4882a593Smuzhiyun		autorepeat;
18*4882a593Smuzhiyun		io-channels = <&saradc 2>;
19*4882a593Smuzhiyun		io-channel-names = "buttons";
20*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
21*4882a593Smuzhiyun		poll-interval = <100>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	backlight: backlight {
25*4882a593Smuzhiyun		compatible = "pwm-backlight";
26*4882a593Smuzhiyun		pwms = <&pwm1 0 25000 0>;
27*4882a593Smuzhiyun		brightness-levels = <
28*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
29*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
30*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
31*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
32*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
33*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
34*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
35*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
36*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
37*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
38*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
39*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
40*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
41*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
42*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
43*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
44*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
45*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
46*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
47*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
48*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
49*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
50*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
51*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
52*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
53*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
54*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
55*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
56*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
57*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
58*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
59*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
60*4882a593Smuzhiyun		default-brightness-level = <200>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	display_subsystem: display-subsystem {
64*4882a593Smuzhiyun		compatible = "rockchip,display-subsystem";
65*4882a593Smuzhiyun		ports = <&vop_lite_out>, <&vop_raw_out>;
66*4882a593Smuzhiyun		logo-memory-region = <&drm_logo>;
67*4882a593Smuzhiyun		status = "disabled";
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		route {
70*4882a593Smuzhiyun			route_csi: route-csi {
71*4882a593Smuzhiyun				status = "disabled";
72*4882a593Smuzhiyun				logo,uboot = "logo.bmp";
73*4882a593Smuzhiyun				logo,kernel = "logo_kernel.bmp";
74*4882a593Smuzhiyun				logo,mode = "center";
75*4882a593Smuzhiyun				charge_logo,mode = "center";
76*4882a593Smuzhiyun				connect = <&vop_raw_out_csi>;
77*4882a593Smuzhiyun			};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun			route_dsi: route-dsi {
80*4882a593Smuzhiyun				status = "disabled";
81*4882a593Smuzhiyun				logo,uboot = "logo.bmp";
82*4882a593Smuzhiyun				logo,kernel = "logo_kernel.bmp";
83*4882a593Smuzhiyun				logo,mode = "center";
84*4882a593Smuzhiyun				charge_logo,mode = "center";
85*4882a593Smuzhiyun				connect = <&vop_lite_out_dsi>;
86*4882a593Smuzhiyun			};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun			route_rgb: route-rgb {
89*4882a593Smuzhiyun				status = "disabled";
90*4882a593Smuzhiyun				logo,uboot = "logo.bmp";
91*4882a593Smuzhiyun				logo,kernel = "logo_kernel.bmp";
92*4882a593Smuzhiyun				logo,mode = "center";
93*4882a593Smuzhiyun				charge_logo,mode = "center";
94*4882a593Smuzhiyun				connect = <&vop_lite_out_rgb>;
95*4882a593Smuzhiyun			};
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	fiq-debugger {
100*4882a593Smuzhiyun		compatible = "rockchip,fiq-debugger";
101*4882a593Smuzhiyun		rockchip,serial-id = <2>;
102*4882a593Smuzhiyun		rockchip,wake-irq = <0>;
103*4882a593Smuzhiyun		/* If enable uart uses irq instead of fiq */
104*4882a593Smuzhiyun		rockchip,irq-mode-enable = <0>;
105*4882a593Smuzhiyun		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
106*4882a593Smuzhiyun		interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
107*4882a593Smuzhiyun		status = "okay";
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	reserved-memory {
111*4882a593Smuzhiyun		#address-cells = <2>;
112*4882a593Smuzhiyun		#size-cells = <2>;
113*4882a593Smuzhiyun		ranges;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		drm_logo: drm-logo@00000000 {
116*4882a593Smuzhiyun			compatible = "rockchip,drm-logo";
117*4882a593Smuzhiyun			reg = <0x0 0x0 0x0 0x0>;
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		ramoops: ramoops@110000 {
121*4882a593Smuzhiyun			compatible = "ramoops";
122*4882a593Smuzhiyun			reg = <0x0 0x110000 0x0 0xf0000>;
123*4882a593Smuzhiyun			record-size = <0x30000>;
124*4882a593Smuzhiyun			console-size = <0xc0000>;
125*4882a593Smuzhiyun			ftrace-size = <0x00000>;
126*4882a593Smuzhiyun			pmsg-size = <0x00000>;
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun	rk809_sound: rk809-sound {
131*4882a593Smuzhiyun		status = "disabled";
132*4882a593Smuzhiyun		compatible = "simple-audio-card";
133*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
134*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rk809-codec";
135*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
136*4882a593Smuzhiyun		simple-audio-card,widgets =
137*4882a593Smuzhiyun			"Microphone", "Mic Jack",
138*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
139*4882a593Smuzhiyun		simple-audio-card,routing =
140*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
141*4882a593Smuzhiyun			"IN1P", "Mic Jack",
142*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
143*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
144*4882a593Smuzhiyun		simple-audio-card,cpu {
145*4882a593Smuzhiyun			sound-dai = <&i2s1>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun		simple-audio-card,codec {
148*4882a593Smuzhiyun			sound-dai = <&rk809_codec>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
153*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
154*4882a593Smuzhiyun		pinctrl-names = "default";
155*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		/*
158*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
159*4882a593Smuzhiyun		 * on the actual card populated):
160*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
161*4882a593Smuzhiyun		 * - PDN (power down when low)
162*4882a593Smuzhiyun		 */
163*4882a593Smuzhiyun		reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	vcc_otg_vbus: otg-vbus-regulator {
167*4882a593Smuzhiyun		compatible = "regulator-fixed";
168*4882a593Smuzhiyun		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
169*4882a593Smuzhiyun		pinctrl-names = "default";
170*4882a593Smuzhiyun		pinctrl-0 = <&otg_vbus_drv>;
171*4882a593Smuzhiyun		regulator-name = "vcc_otg_vbus";
172*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
173*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
174*4882a593Smuzhiyun		enable-active-high;
175*4882a593Smuzhiyun	};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
178*4882a593Smuzhiyun		compatible = "regulator-fixed";
179*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
180*4882a593Smuzhiyun		regulator-always-on;
181*4882a593Smuzhiyun		regulator-boot-on;
182*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
183*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
187*4882a593Smuzhiyun		compatible = "regulator-fixed";
188*4882a593Smuzhiyun		regulator-name = "vcc_phy";
189*4882a593Smuzhiyun		regulator-always-on;
190*4882a593Smuzhiyun		regulator-boot-on;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	wireless_bluetooth: wireless-bluetooth {
194*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
195*4882a593Smuzhiyun		uart_rts_gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_LOW>;
196*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
197*4882a593Smuzhiyun		pinctrl-0 = <&uart4_rts>;
198*4882a593Smuzhiyun		pinctrl-1 = <&uart4_rts_gpio>;
199*4882a593Smuzhiyun		BT,power_gpio    = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
200*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
201*4882a593Smuzhiyun		status = "okay";
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	wireless_wlan: wireless-wlan {
205*4882a593Smuzhiyun		compatible = "wlan-platdata";
206*4882a593Smuzhiyun		rockchip,grf = <&grf>;
207*4882a593Smuzhiyun		pinctrl-names = "default";
208*4882a593Smuzhiyun		pinctrl-0 = <&wifi_wake_host>;
209*4882a593Smuzhiyun		wifi_chip_type = "ap6212";
210*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
211*4882a593Smuzhiyun		status = "okay";
212*4882a593Smuzhiyun	};
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&cpu0 {
216*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&cpu1 {
220*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&combphy {
224*4882a593Smuzhiyun	status = "okay";
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&emmc {
228*4882a593Smuzhiyun	bus-width = <8>;
229*4882a593Smuzhiyun	cap-mmc-highspeed;
230*4882a593Smuzhiyun	max-frequency = <200000000>;
231*4882a593Smuzhiyun	mmc-hs200-1_8v;
232*4882a593Smuzhiyun	no-sdio;
233*4882a593Smuzhiyun	no-sd;
234*4882a593Smuzhiyun	non-removable;
235*4882a593Smuzhiyun	num-slots = <1>;
236*4882a593Smuzhiyun	status = "okay";
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun&gmac {
240*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
241*4882a593Smuzhiyun	phy-mode = "rgmii";
242*4882a593Smuzhiyun	clock_in_out = "input";
243*4882a593Smuzhiyun	snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>;
244*4882a593Smuzhiyun	snps,reset-active-low;
245*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
246*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
247*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_GMAC>;
248*4882a593Smuzhiyun	assigned-clock-parents = <&gmac_clkin>;
249*4882a593Smuzhiyun	tx_delay = <0x50>;
250*4882a593Smuzhiyun	rx_delay = <0x3a>;
251*4882a593Smuzhiyun	status = "okay";
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&i2c0 {
255*4882a593Smuzhiyun	status = "okay";
256*4882a593Smuzhiyun	clock-frequency = <400000>;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun	vdd_npu: tcs4525@1c {
259*4882a593Smuzhiyun		compatible = "tcs,tcs4525";
260*4882a593Smuzhiyun		reg = <0x1c>;
261*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
262*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
263*4882a593Smuzhiyun		pinctrl-0 = <&vsel_gpio>;
264*4882a593Smuzhiyun		vsel-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
265*4882a593Smuzhiyun		regulator-name = "vdd_npu";
266*4882a593Smuzhiyun		regulator-min-microvolt = <750000>;
267*4882a593Smuzhiyun		regulator-max-microvolt = <950000>;
268*4882a593Smuzhiyun		regulator-ramp-delay = <2300>;
269*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <0>;
270*4882a593Smuzhiyun		regulator-boot-on;
271*4882a593Smuzhiyun		regulator-state-mem {
272*4882a593Smuzhiyun			regulator-off-in-suspend;
273*4882a593Smuzhiyun		};
274*4882a593Smuzhiyun	};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun	rk809: pmic@20 {
277*4882a593Smuzhiyun		compatible = "rockchip,rk809";
278*4882a593Smuzhiyun		reg = <0x20>;
279*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
280*4882a593Smuzhiyun		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
281*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-sleep",
282*4882a593Smuzhiyun				"pmic-power-off", "pmic-reset";
283*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
284*4882a593Smuzhiyun		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
285*4882a593Smuzhiyun		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
286*4882a593Smuzhiyun		pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_null>;
287*4882a593Smuzhiyun		rockchip,system-power-controller;
288*4882a593Smuzhiyun		wakeup-source;
289*4882a593Smuzhiyun		#clock-cells = <1>;
290*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
291*4882a593Smuzhiyun		//fb-inner-reg-idxs = <2>;
292*4882a593Smuzhiyun		/* 1: rst regs (default in codes), 0: rst the pmic */
293*4882a593Smuzhiyun		pmic-reset-func = <0>;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
296*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
297*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
298*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
299*4882a593Smuzhiyun		vcc5-supply = <&vcc_buck5>;
300*4882a593Smuzhiyun		vcc6-supply = <&vcc_buck5>;
301*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
302*4882a593Smuzhiyun		vcc8-supply = <&vcc_3v3>;
303*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun		pwrkey {
306*4882a593Smuzhiyun			status = "okay";
307*4882a593Smuzhiyun		};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun		rtc {
310*4882a593Smuzhiyun			status = "okay";
311*4882a593Smuzhiyun		};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun		pinctrl_rk8xx: pinctrl_rk8xx {
314*4882a593Smuzhiyun			gpio-controller;
315*4882a593Smuzhiyun			#gpio-cells = <2>;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun			rk817_slppin_null: rk817_slppin_null {
318*4882a593Smuzhiyun				pins = "gpio_slp";
319*4882a593Smuzhiyun				function = "pin_fun0";
320*4882a593Smuzhiyun			};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun			rk817_slppin_slp: rk817_slppin_slp {
323*4882a593Smuzhiyun				pins = "gpio_slp";
324*4882a593Smuzhiyun				function = "pin_fun1";
325*4882a593Smuzhiyun			};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
328*4882a593Smuzhiyun				pins = "gpio_slp";
329*4882a593Smuzhiyun				function = "pin_fun2";
330*4882a593Smuzhiyun			};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun			rk817_slppin_rst: rk817_slppin_rst {
333*4882a593Smuzhiyun				pins = "gpio_slp";
334*4882a593Smuzhiyun				function = "pin_fun3";
335*4882a593Smuzhiyun			};
336*4882a593Smuzhiyun		};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun		regulators {
339*4882a593Smuzhiyun			vdd_log: DCDC_REG1 {
340*4882a593Smuzhiyun				regulator-always-on;
341*4882a593Smuzhiyun				regulator-boot-on;
342*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
343*4882a593Smuzhiyun				regulator-max-microvolt = <950000>;
344*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
345*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
346*4882a593Smuzhiyun				regulator-name = "vdd_log";
347*4882a593Smuzhiyun				regulator-state-mem {
348*4882a593Smuzhiyun					regulator-on-in-suspend;
349*4882a593Smuzhiyun					regulator-suspend-microvolt = <800000>;
350*4882a593Smuzhiyun				};
351*4882a593Smuzhiyun			};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun			vdd_cpu: DCDC_REG2 {
354*4882a593Smuzhiyun				regulator-always-on;
355*4882a593Smuzhiyun				regulator-boot-on;
356*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
357*4882a593Smuzhiyun				regulator-max-microvolt = <950000>;
358*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
359*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
360*4882a593Smuzhiyun				regulator-name = "vdd_cpu";
361*4882a593Smuzhiyun				regulator-state-mem {
362*4882a593Smuzhiyun					regulator-off-in-suspend;
363*4882a593Smuzhiyun				};
364*4882a593Smuzhiyun			};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
367*4882a593Smuzhiyun				regulator-always-on;
368*4882a593Smuzhiyun				regulator-boot-on;
369*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
370*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
371*4882a593Smuzhiyun				regulator-state-mem {
372*4882a593Smuzhiyun					regulator-on-in-suspend;
373*4882a593Smuzhiyun				};
374*4882a593Smuzhiyun			};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun			vcc_3v3: DCDC_REG4 {
377*4882a593Smuzhiyun				regulator-always-on;
378*4882a593Smuzhiyun				regulator-boot-on;
379*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
380*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
381*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
382*4882a593Smuzhiyun				regulator-name = "vcc_3v3";
383*4882a593Smuzhiyun				regulator-state-mem {
384*4882a593Smuzhiyun					regulator-on-in-suspend;
385*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
386*4882a593Smuzhiyun				};
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun			vdda_0v8: LDO_REG1 {
390*4882a593Smuzhiyun				regulator-always-on;
391*4882a593Smuzhiyun				regulator-boot-on;
392*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
393*4882a593Smuzhiyun				regulator-max-microvolt = <800000>;
394*4882a593Smuzhiyun				regulator-name = "vdda_0v8";
395*4882a593Smuzhiyun				regulator-state-mem {
396*4882a593Smuzhiyun					regulator-on-in-suspend;
397*4882a593Smuzhiyun					regulator-suspend-microvolt = <800000>;
398*4882a593Smuzhiyun				};
399*4882a593Smuzhiyun			};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun			vcc_1v8: LDO_REG2 {
402*4882a593Smuzhiyun				regulator-always-on;
403*4882a593Smuzhiyun				regulator-boot-on;
404*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
405*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
408*4882a593Smuzhiyun				regulator-state-mem {
409*4882a593Smuzhiyun					regulator-on-in-suspend;
410*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
411*4882a593Smuzhiyun				};
412*4882a593Smuzhiyun			};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun			vdd_0v8: LDO_REG3 {
415*4882a593Smuzhiyun				regulator-always-on;
416*4882a593Smuzhiyun				regulator-boot-on;
417*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
418*4882a593Smuzhiyun				regulator-max-microvolt = <800000>;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun				regulator-name = "vdd_0v8";
421*4882a593Smuzhiyun				regulator-state-mem {
422*4882a593Smuzhiyun					regulator-on-in-suspend;
423*4882a593Smuzhiyun					regulator-suspend-microvolt = <800000>;
424*4882a593Smuzhiyun				};
425*4882a593Smuzhiyun			};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun			vcca_1v8: LDO_REG4 {
428*4882a593Smuzhiyun				regulator-always-on;
429*4882a593Smuzhiyun				regulator-boot-on;
430*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
431*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
434*4882a593Smuzhiyun				regulator-state-mem {
435*4882a593Smuzhiyun					regulator-on-in-suspend;
436*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun				};
439*4882a593Smuzhiyun			};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG5 {
442*4882a593Smuzhiyun				regulator-always-on;
443*4882a593Smuzhiyun				regulator-boot-on;
444*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
445*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
448*4882a593Smuzhiyun				regulator-state-mem {
449*4882a593Smuzhiyun					regulator-on-in-suspend;
450*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
451*4882a593Smuzhiyun				};
452*4882a593Smuzhiyun			};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun			vdd1v5_dvp: LDO_REG6 {
455*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
456*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun				regulator-name = "vdd1v5_dvp";
459*4882a593Smuzhiyun				regulator-state-mem {
460*4882a593Smuzhiyun					regulator-on-in-suspend;
461*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun				};
464*4882a593Smuzhiyun			};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG7 {
467*4882a593Smuzhiyun				regulator-always-on;
468*4882a593Smuzhiyun				regulator-boot-on;
469*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
470*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
473*4882a593Smuzhiyun				regulator-state-mem {
474*4882a593Smuzhiyun					regulator-off-in-suspend;
475*4882a593Smuzhiyun					regulator-suspend-microvolt = <2800000>;
476*4882a593Smuzhiyun				};
477*4882a593Smuzhiyun			};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun			vccio_sd: LDO_REG8 {
480*4882a593Smuzhiyun				regulator-always-on;
481*4882a593Smuzhiyun				regulator-boot-on;
482*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
483*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun				regulator-name = "vccio_sd";
486*4882a593Smuzhiyun				regulator-state-mem {
487*4882a593Smuzhiyun					regulator-on-in-suspend;
488*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
489*4882a593Smuzhiyun				};
490*4882a593Smuzhiyun			};
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun			vcc3v3_sd: LDO_REG9 {
493*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
494*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun				regulator-name = "vcc3v3_sd";
497*4882a593Smuzhiyun				regulator-state-mem {
498*4882a593Smuzhiyun					regulator-on-in-suspend;
499*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
500*4882a593Smuzhiyun				};
501*4882a593Smuzhiyun			};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun			vcc_buck5: DCDC_REG5 {
504*4882a593Smuzhiyun				regulator-always-on;
505*4882a593Smuzhiyun				regulator-boot-on;
506*4882a593Smuzhiyun				regulator-min-microvolt = <2200000>;
507*4882a593Smuzhiyun				regulator-max-microvolt = <2200000>;
508*4882a593Smuzhiyun				regulator-name = "vcc_buck5";
509*4882a593Smuzhiyun				regulator-state-mem {
510*4882a593Smuzhiyun					regulator-on-in-suspend;
511*4882a593Smuzhiyun					regulator-suspend-microvolt = <2200000>;
512*4882a593Smuzhiyun				};
513*4882a593Smuzhiyun			};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun			vcc5v0_host: SWITCH_REG1 {
516*4882a593Smuzhiyun				regulator-always-on;
517*4882a593Smuzhiyun				regulator-boot-on;
518*4882a593Smuzhiyun				regulator-name = "vcc5v0_host";
519*4882a593Smuzhiyun			};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun			vccio_3v3: SWITCH_REG2 {
522*4882a593Smuzhiyun				regulator-always-on;
523*4882a593Smuzhiyun				regulator-boot-on;
524*4882a593Smuzhiyun				regulator-name = "vccio_3v3";
525*4882a593Smuzhiyun			};
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun		};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun		rk809_codec: codec {
530*4882a593Smuzhiyun			#sound-dai-cells = <0>;
531*4882a593Smuzhiyun			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
532*4882a593Smuzhiyun			clocks = <&cru SCLK_I2S1_2CH_OUT>;
533*4882a593Smuzhiyun			clock-names = "mclk";
534*4882a593Smuzhiyun			pinctrl-names = "default";
535*4882a593Smuzhiyun			pinctrl-0 = <&i2s1_2ch_mclk>;
536*4882a593Smuzhiyun			hp-volume = <20>;
537*4882a593Smuzhiyun			spk-volume = <3>;
538*4882a593Smuzhiyun			status = "okay";
539*4882a593Smuzhiyun		};
540*4882a593Smuzhiyun	};
541*4882a593Smuzhiyun};
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun&i2c1 {
544*4882a593Smuzhiyun	status = "okay";
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun	gt1x: gt1x@14 {
547*4882a593Smuzhiyun		compatible = "goodix,gt1x";
548*4882a593Smuzhiyun		reg = <0x14>;
549*4882a593Smuzhiyun		goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
550*4882a593Smuzhiyun		goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
551*4882a593Smuzhiyun	};
552*4882a593Smuzhiyun};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun&i2c4 {
555*4882a593Smuzhiyun	status = "okay";
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun	sensor@d {
558*4882a593Smuzhiyun		status = "okay";
559*4882a593Smuzhiyun		compatible = "ak8963";
560*4882a593Smuzhiyun		reg = <0x0d>;
561*4882a593Smuzhiyun		type = <SENSOR_TYPE_COMPASS>;
562*4882a593Smuzhiyun		irq_enable = <0>;
563*4882a593Smuzhiyun		poll_delay_ms = <30>;
564*4882a593Smuzhiyun		layout = <1>;
565*4882a593Smuzhiyun		reprobe_en = <1>;
566*4882a593Smuzhiyun	};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun	sensor@4c {
569*4882a593Smuzhiyun		status = "okay";
570*4882a593Smuzhiyun		compatible = "gs_mma7660";
571*4882a593Smuzhiyun		reg = <0x4c>;
572*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
573*4882a593Smuzhiyun		irq-gpio = <&gpio0 RK_PC6 IRQ_TYPE_LEVEL_LOW>;
574*4882a593Smuzhiyun		irq_enable = <0>;
575*4882a593Smuzhiyun		poll_delay_ms = <30>;
576*4882a593Smuzhiyun		layout = <2>;
577*4882a593Smuzhiyun		reprobe_en = <1>;
578*4882a593Smuzhiyun	};
579*4882a593Smuzhiyun};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun&npu {
582*4882a593Smuzhiyun	npu-supply = <&vdd_npu>;
583*4882a593Smuzhiyun	status = "okay";
584*4882a593Smuzhiyun};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun&pcie0 {
587*4882a593Smuzhiyun	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
588*4882a593Smuzhiyun	/* Disable usbdrd_dwc3 and usbdrd3 if using pcie0 */
589*4882a593Smuzhiyun	status = "disabled";
590*4882a593Smuzhiyun};
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun&power {
593*4882a593Smuzhiyun	npu-supply = <&vdd_npu>;
594*4882a593Smuzhiyun};
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun&pwm1 {
597*4882a593Smuzhiyun	status = "okay";
598*4882a593Smuzhiyun};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun&saradc {
601*4882a593Smuzhiyun	status = "okay";
602*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
603*4882a593Smuzhiyun};
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun&sdio {
606*4882a593Smuzhiyun	bus-width = <4>;
607*4882a593Smuzhiyun	cap-mmc-highspeed;
608*4882a593Smuzhiyun	cap-sd-highspeed;
609*4882a593Smuzhiyun	no-sd;
610*4882a593Smuzhiyun	no-mmc;
611*4882a593Smuzhiyun	keep-power-in-suspend;
612*4882a593Smuzhiyun	non-removable;
613*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
614*4882a593Smuzhiyun	sd-uhs-sdr104;
615*4882a593Smuzhiyun	status = "okay";
616*4882a593Smuzhiyun};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun&sdmmc {
619*4882a593Smuzhiyun	bus-width = <4>;
620*4882a593Smuzhiyun	cap-mmc-highspeed;
621*4882a593Smuzhiyun	cap-sd-highspeed;
622*4882a593Smuzhiyun	no-sdio;
623*4882a593Smuzhiyun	no-mmc;
624*4882a593Smuzhiyun	card-detect-delay = <300>;
625*4882a593Smuzhiyun	sd-uhs-sdr25;
626*4882a593Smuzhiyun	sd-uhs-sdr50;
627*4882a593Smuzhiyun	sd-uhs-sdr104;
628*4882a593Smuzhiyun	vmmc-supply = <&vcc3v3_sd>;
629*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
630*4882a593Smuzhiyun	status = "okay";
631*4882a593Smuzhiyun};
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun&uart4 {
634*4882a593Smuzhiyun	pinctrl-names = "default";
635*4882a593Smuzhiyun	pinctrl-0 = <&uart4_xfer &uart4_cts>;
636*4882a593Smuzhiyun	status = "okay";
637*4882a593Smuzhiyun};
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun&u2phy {
640*4882a593Smuzhiyun	status = "okay";
641*4882a593Smuzhiyun};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun&u2phy_host {
644*4882a593Smuzhiyun	status = "okay";
645*4882a593Smuzhiyun};
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun&u2phy_otg {
648*4882a593Smuzhiyun	status = "okay";
649*4882a593Smuzhiyun	vbus-supply = <&vcc_otg_vbus>;
650*4882a593Smuzhiyun};
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun&usb_host0_ehci {
653*4882a593Smuzhiyun	status = "okay";
654*4882a593Smuzhiyun};
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun&usb_host0_ohci {
657*4882a593Smuzhiyun	status = "okay";
658*4882a593Smuzhiyun};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun&usbdrd3 {
661*4882a593Smuzhiyun	status = "okay";
662*4882a593Smuzhiyun	extcon = <&u2phy>;
663*4882a593Smuzhiyun};
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun&usbdrd_dwc3 {
666*4882a593Smuzhiyun	status = "okay";
667*4882a593Smuzhiyun};
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun&pinctrl {
670*4882a593Smuzhiyun	pmic {
671*4882a593Smuzhiyun		pmic_int: pmic_int {
672*4882a593Smuzhiyun			rockchip,pins =
673*4882a593Smuzhiyun				<0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
674*4882a593Smuzhiyun		};
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun		soc_slppin_gpio: soc_slppin_gpio {
677*4882a593Smuzhiyun			rockchip,pins =
678*4882a593Smuzhiyun				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
679*4882a593Smuzhiyun		};
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun		soc_slppin_slp: soc_slppin_slp {
682*4882a593Smuzhiyun			rockchip,pins =
683*4882a593Smuzhiyun				<0 RK_PA4 1 &pcfg_pull_none>;
684*4882a593Smuzhiyun		};
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun		vsel_gpio: vsel-gpio {
687*4882a593Smuzhiyun			rockchip,pins =
688*4882a593Smuzhiyun				<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>;
689*4882a593Smuzhiyun		};
690*4882a593Smuzhiyun	};
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun	sdio-pwrseq {
693*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
694*4882a593Smuzhiyun			rockchip,pins =
695*4882a593Smuzhiyun				<4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
696*4882a593Smuzhiyun		};
697*4882a593Smuzhiyun	};
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun	usb2 {
700*4882a593Smuzhiyun		otg_vbus_drv: otg-vbus-drv {
701*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
702*4882a593Smuzhiyun		};
703*4882a593Smuzhiyun	};
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun	wireless-bluetooth {
706*4882a593Smuzhiyun		uart4_rts_gpio: uart4-rts-gpio {
707*4882a593Smuzhiyun			rockchip,pins = <4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
708*4882a593Smuzhiyun		};
709*4882a593Smuzhiyun	};
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun	wireless-wlan {
712*4882a593Smuzhiyun		wifi_wake_host: wifi-wake-host {
713*4882a593Smuzhiyun			rockchip,pins =
714*4882a593Smuzhiyun				<4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
715*4882a593Smuzhiyun		};
716*4882a593Smuzhiyun	};
717*4882a593Smuzhiyun};
718