1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include "px30.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Rockchip PX30 EVB"; 14*4882a593Smuzhiyun compatible = "rockchip,px30-evb", "rockchip,px30"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = "serial5:115200n8"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun adc-keys { 21*4882a593Smuzhiyun compatible = "adc-keys"; 22*4882a593Smuzhiyun io-channels = <&saradc 2>; 23*4882a593Smuzhiyun io-channel-names = "buttons"; 24*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 25*4882a593Smuzhiyun poll-interval = <100>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun esc-key { 28*4882a593Smuzhiyun label = "esc"; 29*4882a593Smuzhiyun linux,code = <KEY_ESC>; 30*4882a593Smuzhiyun press-threshold-microvolt = <1310000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun home-key { 34*4882a593Smuzhiyun label = "home"; 35*4882a593Smuzhiyun linux,code = <KEY_HOME>; 36*4882a593Smuzhiyun press-threshold-microvolt = <624000>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun menu-key { 40*4882a593Smuzhiyun label = "menu"; 41*4882a593Smuzhiyun linux,code = <KEY_MENU>; 42*4882a593Smuzhiyun press-threshold-microvolt = <987000>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun vol-down-key { 46*4882a593Smuzhiyun label = "volume down"; 47*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 48*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vol-up-key { 52*4882a593Smuzhiyun label = "volume up"; 53*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 54*4882a593Smuzhiyun press-threshold-microvolt = <17000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun backlight: backlight { 59*4882a593Smuzhiyun compatible = "pwm-backlight"; 60*4882a593Smuzhiyun pwms = <&pwm1 0 25000 0>; 61*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 65*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 66*4882a593Smuzhiyun pinctrl-0 = <&emmc_reset>; 67*4882a593Smuzhiyun pinctrl-names = "default"; 68*4882a593Smuzhiyun reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 72*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 73*4882a593Smuzhiyun pinctrl-names = "default"; 74*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* 77*4882a593Smuzhiyun * On the module itself this is one of these (depending 78*4882a593Smuzhiyun * on the actual card populated): 79*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 80*4882a593Smuzhiyun * - PDN (power down when low) 81*4882a593Smuzhiyun */ 82*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun vcc5v0_sys: vccsys { 86*4882a593Smuzhiyun compatible = "regulator-fixed"; 87*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 88*4882a593Smuzhiyun regulator-always-on; 89*4882a593Smuzhiyun regulator-boot-on; 90*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 91*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&cpu0 { 96*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&cpu1 { 100*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&cpu2 { 104*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&cpu3 { 108*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&display_subsystem { 112*4882a593Smuzhiyun status = "okay"; 113*4882a593Smuzhiyun}; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun&dsi { 116*4882a593Smuzhiyun status = "okay"; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun ports { 119*4882a593Smuzhiyun mipi_out: port@1 { 120*4882a593Smuzhiyun reg = <1>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun mipi_out_panel: endpoint { 123*4882a593Smuzhiyun remote-endpoint = <&mipi_in_panel>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun panel@0 { 129*4882a593Smuzhiyun compatible = "xinpeng,xpp055c272"; 130*4882a593Smuzhiyun reg = <0>; 131*4882a593Smuzhiyun backlight = <&backlight>; 132*4882a593Smuzhiyun iovcc-supply = <&vcc_1v8>; 133*4882a593Smuzhiyun vci-supply = <&vcc3v3_lcd>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun port { 136*4882a593Smuzhiyun mipi_in_panel: endpoint { 137*4882a593Smuzhiyun remote-endpoint = <&mipi_out_panel>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&dsi_dphy { 144*4882a593Smuzhiyun status = "okay"; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&emmc { 148*4882a593Smuzhiyun cap-mmc-highspeed; 149*4882a593Smuzhiyun mmc-hs200-1_8v; 150*4882a593Smuzhiyun non-removable; 151*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 152*4882a593Smuzhiyun vmmc-supply = <&vcc_3v0>; 153*4882a593Smuzhiyun vqmmc-supply = <&vccio_flash>; 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&gmac { 158*4882a593Smuzhiyun clock_in_out = "output"; 159*4882a593Smuzhiyun phy-supply = <&vcc_rmii>; 160*4882a593Smuzhiyun snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>; 161*4882a593Smuzhiyun snps,reset-active-low; 162*4882a593Smuzhiyun snps,reset-delays-us = <0 50000 50000>; 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&gpu { 167*4882a593Smuzhiyun mali-supply = <&vdd_log>; 168*4882a593Smuzhiyun status = "okay"; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun&i2c0 { 172*4882a593Smuzhiyun status = "okay"; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun rk809: pmic@20 { 175*4882a593Smuzhiyun compatible = "rockchip,rk809"; 176*4882a593Smuzhiyun reg = <0x20>; 177*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 178*4882a593Smuzhiyun interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 179*4882a593Smuzhiyun pinctrl-names = "default"; 180*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 181*4882a593Smuzhiyun rockchip,system-power-controller; 182*4882a593Smuzhiyun wakeup-source; 183*4882a593Smuzhiyun #clock-cells = <0>; 184*4882a593Smuzhiyun clock-output-names = "xin32k"; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 187*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 188*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 189*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 190*4882a593Smuzhiyun vcc5-supply = <&vcc3v3_sys>; 191*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 192*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 193*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 194*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun regulators { 197*4882a593Smuzhiyun vdd_log: DCDC_REG1 { 198*4882a593Smuzhiyun regulator-name = "vdd_log"; 199*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 200*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 201*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 202*4882a593Smuzhiyun regulator-always-on; 203*4882a593Smuzhiyun regulator-boot-on; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun regulator-state-mem { 206*4882a593Smuzhiyun regulator-on-in-suspend; 207*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 212*4882a593Smuzhiyun regulator-name = "vdd_arm"; 213*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 214*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 215*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 216*4882a593Smuzhiyun regulator-always-on; 217*4882a593Smuzhiyun regulator-boot-on; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun regulator-state-mem { 220*4882a593Smuzhiyun regulator-off-in-suspend; 221*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 226*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 227*4882a593Smuzhiyun regulator-always-on; 228*4882a593Smuzhiyun regulator-boot-on; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-on-in-suspend; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vcc_3v0: vcc_rmii: DCDC_REG4 { 236*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 237*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 238*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 239*4882a593Smuzhiyun regulator-always-on; 240*4882a593Smuzhiyun regulator-boot-on; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun regulator-state-mem { 243*4882a593Smuzhiyun regulator-on-in-suspend; 244*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun vcc3v3_sys: DCDC_REG5 { 249*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 250*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 251*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 252*4882a593Smuzhiyun regulator-always-on; 253*4882a593Smuzhiyun regulator-boot-on; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun regulator-state-mem { 256*4882a593Smuzhiyun regulator-on-in-suspend; 257*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun vcc_1v0: LDO_REG1 { 262*4882a593Smuzhiyun regulator-name = "vcc_1v0"; 263*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 264*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 265*4882a593Smuzhiyun regulator-always-on; 266*4882a593Smuzhiyun regulator-boot-on; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun regulator-state-mem { 269*4882a593Smuzhiyun regulator-on-in-suspend; 270*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun vcc_1v8: vccio_flash: vccio_sdio: LDO_REG2 { 275*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 276*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 277*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 278*4882a593Smuzhiyun regulator-always-on; 279*4882a593Smuzhiyun regulator-boot-on; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun regulator-state-mem { 282*4882a593Smuzhiyun regulator-on-in-suspend; 283*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun vdd_1v0: LDO_REG3 { 288*4882a593Smuzhiyun regulator-name = "vdd_1v0"; 289*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 290*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 291*4882a593Smuzhiyun regulator-always-on; 292*4882a593Smuzhiyun regulator-boot-on; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun regulator-state-mem { 295*4882a593Smuzhiyun regulator-on-in-suspend; 296*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun vcc3v0_pmu: LDO_REG4 { 301*4882a593Smuzhiyun regulator-name = "vcc3v0_pmu"; 302*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 303*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 304*4882a593Smuzhiyun regulator-always-on; 305*4882a593Smuzhiyun regulator-boot-on; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun regulator-state-mem { 308*4882a593Smuzhiyun regulator-on-in-suspend; 309*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 314*4882a593Smuzhiyun regulator-name = "vccio_sd"; 315*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 316*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 317*4882a593Smuzhiyun regulator-always-on; 318*4882a593Smuzhiyun regulator-boot-on; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun regulator-state-mem { 321*4882a593Smuzhiyun regulator-on-in-suspend; 322*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun vcc_sd: LDO_REG6 { 327*4882a593Smuzhiyun regulator-name = "vcc_sd"; 328*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 329*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 330*4882a593Smuzhiyun regulator-boot-on; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun regulator-state-mem { 333*4882a593Smuzhiyun regulator-on-in-suspend; 334*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun vcc2v8_dvp: LDO_REG7 { 339*4882a593Smuzhiyun regulator-name = "vcc2v8_dvp"; 340*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 341*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 342*4882a593Smuzhiyun regulator-boot-on; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun regulator-state-mem { 345*4882a593Smuzhiyun regulator-off-in-suspend; 346*4882a593Smuzhiyun regulator-suspend-microvolt = <2800000>; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG8 { 351*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 352*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 353*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 354*4882a593Smuzhiyun regulator-boot-on; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun regulator-state-mem { 357*4882a593Smuzhiyun regulator-on-in-suspend; 358*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun vcc1v5_dvp: LDO_REG9 { 363*4882a593Smuzhiyun regulator-name = "vcc1v5_dvp"; 364*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 365*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 366*4882a593Smuzhiyun regulator-boot-on; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun regulator-state-mem { 369*4882a593Smuzhiyun regulator-off-in-suspend; 370*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun vcc3v3_lcd: SWITCH_REG1 { 375*4882a593Smuzhiyun regulator-name = "vcc3v3_lcd"; 376*4882a593Smuzhiyun regulator-boot-on; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun vcc5v0_host: SWITCH_REG2 { 380*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 381*4882a593Smuzhiyun regulator-always-on; 382*4882a593Smuzhiyun regulator-boot-on; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun}; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun&i2c1 { 389*4882a593Smuzhiyun status = "okay"; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun sensor@d { 392*4882a593Smuzhiyun compatible = "asahi-kasei,ak8963"; 393*4882a593Smuzhiyun reg = <0x0d>; 394*4882a593Smuzhiyun gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 395*4882a593Smuzhiyun vdd-supply = <&vcc3v0_pmu>; 396*4882a593Smuzhiyun mount-matrix = "1", /* x0 */ 397*4882a593Smuzhiyun "0", /* y0 */ 398*4882a593Smuzhiyun "0", /* z0 */ 399*4882a593Smuzhiyun "0", /* x1 */ 400*4882a593Smuzhiyun "1", /* y1 */ 401*4882a593Smuzhiyun "0", /* z1 */ 402*4882a593Smuzhiyun "0", /* x2 */ 403*4882a593Smuzhiyun "0", /* y2 */ 404*4882a593Smuzhiyun "1"; /* z2 */ 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun touchscreen@14 { 408*4882a593Smuzhiyun compatible = "goodix,gt1151"; 409*4882a593Smuzhiyun reg = <0x14>; 410*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 411*4882a593Smuzhiyun interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; 412*4882a593Smuzhiyun irq-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 413*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 414*4882a593Smuzhiyun VDDIO-supply = <&vcc3v3_lcd>; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun sensor@4c { 418*4882a593Smuzhiyun compatible = "fsl,mma7660"; 419*4882a593Smuzhiyun reg = <0x4c>; 420*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 421*4882a593Smuzhiyun interrupts = <RK_PB7 IRQ_TYPE_LEVEL_LOW>; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun}; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun&i2s1_2ch { 426*4882a593Smuzhiyun status = "okay"; 427*4882a593Smuzhiyun}; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun&io_domains { 430*4882a593Smuzhiyun status = "okay"; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun vccio1-supply = <&vccio_sdio>; 433*4882a593Smuzhiyun vccio2-supply = <&vccio_sd>; 434*4882a593Smuzhiyun vccio3-supply = <&vcc_3v0>; 435*4882a593Smuzhiyun vccio4-supply = <&vcc3v0_pmu>; 436*4882a593Smuzhiyun vccio5-supply = <&vcc_3v0>; 437*4882a593Smuzhiyun vccio6-supply = <&vccio_flash>; 438*4882a593Smuzhiyun}; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun&pinctrl { 441*4882a593Smuzhiyun headphone { 442*4882a593Smuzhiyun hp_det: hp-det { 443*4882a593Smuzhiyun rockchip,pins = 444*4882a593Smuzhiyun <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun emmc { 449*4882a593Smuzhiyun emmc_reset: emmc-reset { 450*4882a593Smuzhiyun rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun pmic { 455*4882a593Smuzhiyun pmic_int: pmic_int { 456*4882a593Smuzhiyun rockchip,pins = 457*4882a593Smuzhiyun <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun soc_slppin_gpio: soc_slppin_gpio { 461*4882a593Smuzhiyun rockchip,pins = 462*4882a593Smuzhiyun <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun soc_slppin_slp: soc_slppin_slp { 466*4882a593Smuzhiyun rockchip,pins = 467*4882a593Smuzhiyun <0 RK_PA4 1 &pcfg_pull_none>; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun soc_slppin_rst: soc_slppin_rst { 471*4882a593Smuzhiyun rockchip,pins = 472*4882a593Smuzhiyun <0 RK_PA4 2 &pcfg_pull_none>; 473*4882a593Smuzhiyun }; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun sdio-pwrseq { 477*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 478*4882a593Smuzhiyun rockchip,pins = 479*4882a593Smuzhiyun <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun }; 482*4882a593Smuzhiyun}; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun&pmu_io_domains { 485*4882a593Smuzhiyun status = "okay"; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun pmuio1-supply = <&vcc3v0_pmu>; 488*4882a593Smuzhiyun pmuio2-supply = <&vcc3v0_pmu>; 489*4882a593Smuzhiyun}; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun&pwm1 { 492*4882a593Smuzhiyun status = "okay"; 493*4882a593Smuzhiyun}; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun&saradc { 496*4882a593Smuzhiyun vref-supply = <&vcc_1v8>; 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun}; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun&sdmmc { 501*4882a593Smuzhiyun cap-mmc-highspeed; 502*4882a593Smuzhiyun cap-sd-highspeed; 503*4882a593Smuzhiyun card-detect-delay = <800>; 504*4882a593Smuzhiyun sd-uhs-sdr12; 505*4882a593Smuzhiyun sd-uhs-sdr25; 506*4882a593Smuzhiyun sd-uhs-sdr50; 507*4882a593Smuzhiyun sd-uhs-sdr104; 508*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 509*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 510*4882a593Smuzhiyun status = "okay"; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&sdio { 514*4882a593Smuzhiyun cap-sd-highspeed; 515*4882a593Smuzhiyun keep-power-in-suspend; 516*4882a593Smuzhiyun non-removable; 517*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 518*4882a593Smuzhiyun sd-uhs-sdr104; 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&tsadc { 523*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; 524*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; 525*4882a593Smuzhiyun status = "okay"; 526*4882a593Smuzhiyun}; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun&u2phy { 529*4882a593Smuzhiyun status = "okay"; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun u2phy_host: host-port { 532*4882a593Smuzhiyun status = "okay"; 533*4882a593Smuzhiyun }; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun u2phy_otg: otg-port { 536*4882a593Smuzhiyun status = "okay"; 537*4882a593Smuzhiyun }; 538*4882a593Smuzhiyun}; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun&uart1 { 541*4882a593Smuzhiyun pinctrl-names = "default"; 542*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer &uart1_cts>; 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&uart5 { 547*4882a593Smuzhiyun status = "okay"; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&usb20_otg { 551*4882a593Smuzhiyun status = "okay"; 552*4882a593Smuzhiyun}; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun&usb_host0_ehci { 555*4882a593Smuzhiyun status = "okay"; 556*4882a593Smuzhiyun}; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun&usb_host0_ohci { 559*4882a593Smuzhiyun status = "okay"; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&vopb { 563*4882a593Smuzhiyun status = "okay"; 564*4882a593Smuzhiyun}; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun&vopb_mmu { 567*4882a593Smuzhiyun status = "okay"; 568*4882a593Smuzhiyun}; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun&vopl { 571*4882a593Smuzhiyun status = "okay"; 572*4882a593Smuzhiyun}; 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun&vopl_mmu { 575*4882a593Smuzhiyun status = "okay"; 576*4882a593Smuzhiyun}; 577