1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include "px30-evb-ddr3-v10-linux.dts" 8 9/ { 10 model = "Rockchip linux PX30 evb ddr3 board"; 11 compatible = "rockchip,px30-evb-ddr3-v11-linux", "rockchip,px30"; 12}; 13 14&dsi { 15 status = "okay"; 16 17 panel@0 { 18 compatible = "sitronix,st7703", "simple-panel-dsi"; 19 reg = <0>; 20 power-supply = <&vcc3v3_lcd>; 21 backlight = <&backlight>; 22 prepare-delay-ms = <0>; 23 reset-delay-ms = <0>; 24 init-delay-ms = <80>; 25 enable-delay-ms = <0>; 26 disable-delay-ms = <10>; 27 unprepare-delay-ms = <60>; 28 29 width-mm = <68>; 30 height-mm = <121>; 31 32 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 33 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 34 dsi,format = <MIPI_DSI_FMT_RGB888>; 35 dsi,lanes = <4>; 36 37 panel-init-sequence = [ 38 39 00 04 ff 98 81 03 39 15 00 02 01 00 40 15 00 02 02 00 41 15 00 02 03 53 42 15 00 02 04 53 43 15 00 02 05 13 44 15 00 02 06 04 45 15 00 02 07 02 46 15 00 02 08 02 47 15 00 02 09 00 48 15 00 02 0a 00 49 15 00 02 0b 00 50 15 00 02 0c 00 51 15 00 02 0d 00 52 15 00 02 0e 00 53 15 00 02 0f 00 54 55 15 00 02 10 00 56 15 00 02 11 00 57 15 00 02 12 00 58 15 00 02 13 00 59 15 00 02 14 00 60 15 00 02 15 08 61 15 00 02 16 10 62 15 00 02 17 00 63 15 00 02 18 08 64 15 00 02 19 00 65 15 00 02 1a 00 66 15 00 02 1b 00 67 15 00 02 1c 00 68 15 00 02 1d 00 69 15 00 02 1e c0 70 15 00 02 1f 80 71 72 15 00 02 20 02 73 15 00 02 21 09 74 15 00 02 22 00 75 15 00 02 23 00 76 15 00 02 24 00 77 15 00 02 25 00 78 15 00 02 26 00 79 15 00 02 27 00 80 15 00 02 28 55 81 15 00 02 29 03 82 15 00 02 2a 00 83 15 00 02 2b 00 84 15 00 02 2c 00 85 15 00 02 2d 00 86 15 00 02 2e 00 87 15 00 02 2f 00 88 89 15 00 02 30 00 90 15 00 02 31 00 91 15 00 02 32 00 92 15 00 02 33 00 93 15 00 02 34 04 94 15 00 02 35 05 95 15 00 02 36 05 96 15 00 02 37 00 97 15 00 02 38 3c 98 15 00 02 39 35 99 15 00 02 3a 00 100 15 00 02 3b 40 101 15 00 02 3c 00 102 15 00 02 3d 00 103 15 00 02 3e 00 104 15 00 02 3f 00 105 106 15 00 02 40 00 107 15 00 02 41 88 108 15 00 02 42 00 109 15 00 02 43 00 110 15 00 02 44 1f 111 112 15 00 02 50 01 113 15 00 02 51 23 114 15 00 02 52 45 115 15 00 02 53 67 116 15 00 02 54 89 117 15 00 02 55 ab 118 15 00 02 56 01 119 15 00 02 57 23 120 15 00 02 58 45 121 15 00 02 59 67 122 15 00 02 5a 89 123 15 00 02 5b ab 124 15 00 02 5c cd 125 15 00 02 5d ef 126 15 00 02 5e 03 127 15 00 02 5f 14 128 129 15 00 02 60 15 130 15 00 02 61 0c 131 15 00 02 62 0d 132 15 00 02 63 0e 133 15 00 02 64 0f 134 15 00 02 65 10 135 15 00 02 66 11 136 15 00 02 67 08 137 15 00 02 68 02 138 15 00 02 69 0a 139 15 00 02 6a 02 140 15 00 02 6b 02 141 15 00 02 6c 02 142 15 00 02 6d 02 143 15 00 02 6e 02 144 15 00 02 6f 02 145 146 15 00 02 70 02 147 15 00 02 71 02 148 15 00 02 72 06 149 15 00 02 73 02 150 15 00 02 74 02 151 15 00 02 75 14 152 15 00 02 76 15 153 15 00 02 77 0f 154 15 00 02 78 0e 155 15 00 02 79 0d 156 15 00 02 7a 0c 157 15 00 02 7b 11 158 15 00 02 7c 10 159 15 00 02 7d 06 160 15 00 02 7e 02 161 15 00 02 7f 0a 162 163 15 00 02 80 02 164 15 00 02 81 02 165 15 00 02 82 02 166 15 00 02 83 02 167 15 00 02 84 02 168 15 00 02 85 02 169 15 00 02 86 02 170 15 00 02 87 02 171 15 00 02 88 08 172 15 00 02 89 02 173 15 00 02 8a 02 174 175 39 00 04 ff 98 81 04 176 15 00 02 00 80 177 15 00 02 70 00 178 15 00 02 71 00 179 15 00 02 66 fe 180 15 00 02 82 15 181 15 00 02 84 15 182 15 00 02 85 15 183 15 00 02 3a 24 184 15 00 02 32 ac 185 15 00 02 8c 80 186 15 00 02 3c f5 187 15 00 02 88 33 188 189 39 00 04 ff 98 81 01 190 15 00 02 22 0a 191 15 00 02 31 00 192 15 00 02 53 78 193 15 00 02 50 5b 194 15 00 02 51 5b 195 15 00 02 60 20 196 15 00 02 61 00 197 15 00 02 62 0d 198 15 00 02 63 00 199 200 15 00 02 a0 00 201 15 00 02 a1 10 202 15 00 02 a2 1c 203 15 00 02 a3 13 204 15 00 02 a4 15 205 15 00 02 a5 26 206 15 00 02 a6 1a 207 15 00 02 a7 1d 208 15 00 02 a8 67 209 15 00 02 a9 1c 210 15 00 02 aa 29 211 15 00 02 ab 5b 212 15 00 02 ac 26 213 15 00 02 ad 28 214 15 00 02 ae 5c 215 15 00 02 af 30 216 15 00 02 b0 31 217 15 00 02 b1 2e 218 15 00 02 b2 32 219 15 00 02 b3 00 220 221 15 00 02 c0 00 222 15 00 02 c1 10 223 15 00 02 c2 1c 224 15 00 02 c3 13 225 15 00 02 c4 15 226 15 00 02 c5 26 227 15 00 02 c6 1a 228 15 00 02 c7 1d 229 15 00 02 c8 67 230 15 00 02 c9 1c 231 15 00 02 ca 29 232 15 00 02 cb 5b 233 15 00 02 cc 26 234 15 00 02 cd 28 235 15 00 02 ce 5c 236 15 00 02 cf 30 237 15 00 02 d0 31 238 15 00 02 d1 2e 239 15 00 02 d2 32 240 15 00 02 d3 00 241 39 00 04 ff 98 81 00 242 05 00 01 11 243 05 01 01 29 244 ]; 245 246 panel-exit-sequence = [ 247 05 00 01 28 248 05 00 01 10 249 ]; 250 251 display-timings { 252 native-mode = <&timing1>; 253 254 timing1: timing1 { 255 clock-frequency = <64000000>; 256 hactive = <720>; 257 vactive = <1280>; 258 hfront-porch = <40>; 259 hsync-len = <10>; 260 hback-porch = <40>; 261 vfront-porch = <22>; 262 vsync-len = <4>; 263 vback-porch = <11>; 264 hsync-active = <0>; 265 vsync-active = <0>; 266 de-active = <0>; 267 pixelclk-active = <0>; 268 }; 269 }; 270 271 ports { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 275 port@0 { 276 reg = <0>; 277 panel_in_dsi: endpoint { 278 remote-endpoint = <&dsi_out_panel>; 279 }; 280 }; 281 }; 282 283 }; 284 285 ports { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 289 port@1 { 290 reg = <1>; 291 dsi_out_panel: endpoint { 292 remote-endpoint = <&panel_in_dsi>; 293 }; 294 }; 295 }; 296}; 297