1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 12*4882a593Smuzhiyun#include "px30.dtsi" 13*4882a593Smuzhiyun#include "px30-android.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Rockchip PX30 evb ddr3 lvds board"; 17*4882a593Smuzhiyun compatible = "rockchip,px30-evb-ddr3-lvds-v10", "rockchip,px30"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun adc-keys { 20*4882a593Smuzhiyun compatible = "adc-keys"; 21*4882a593Smuzhiyun io-channels = <&saradc 2>; 22*4882a593Smuzhiyun io-channel-names = "buttons"; 23*4882a593Smuzhiyun poll-interval = <100>; 24*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun esc-key { 27*4882a593Smuzhiyun linux,code = <KEY_ESC>; 28*4882a593Smuzhiyun label = "esc"; 29*4882a593Smuzhiyun press-threshold-microvolt = <1270000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun home-key { 33*4882a593Smuzhiyun linux,code = <KEY_HOME>; 34*4882a593Smuzhiyun label = "home"; 35*4882a593Smuzhiyun press-threshold-microvolt = <602000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun menu-key { 39*4882a593Smuzhiyun linux,code = <KEY_MENU>; 40*4882a593Smuzhiyun label = "menu"; 41*4882a593Smuzhiyun press-threshold-microvolt = <952000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun vol-down-key { 45*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 46*4882a593Smuzhiyun label = "volume down"; 47*4882a593Smuzhiyun press-threshold-microvolt = <290000>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun vol-up-key { 51*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 52*4882a593Smuzhiyun label = "volume up"; 53*4882a593Smuzhiyun press-threshold-microvolt = <17000>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun backlight: backlight { 58*4882a593Smuzhiyun compatible = "pwm-backlight"; 59*4882a593Smuzhiyun pwms = <&pwm1 0 25000 0>; 60*4882a593Smuzhiyun brightness-levels = < 61*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 62*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 63*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 64*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 65*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 66*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 67*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 68*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 69*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 70*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 71*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 72*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 73*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 74*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 75*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 76*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 77*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 78*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 79*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 80*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 81*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 82*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 83*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 84*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 85*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 86*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 87*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 88*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 89*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 90*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 91*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 92*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 93*4882a593Smuzhiyun default-brightness-level = <200>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun panel { 97*4882a593Smuzhiyun compatible = "samsung,lsl070nl01", "simple-panel"; 98*4882a593Smuzhiyun backlight = <&backlight>; 99*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd>; 100*4882a593Smuzhiyun enable-delay-ms = <20>; 101*4882a593Smuzhiyun prepare-delay-ms = <20>; 102*4882a593Smuzhiyun unprepare-delay-ms = <20>; 103*4882a593Smuzhiyun disable-delay-ms = <20>; 104*4882a593Smuzhiyun bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun width-mm = <217>; 107*4882a593Smuzhiyun height-mm = <136>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun display-timings { 110*4882a593Smuzhiyun native-mode = <&timing0>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun timing0: timing0 { 113*4882a593Smuzhiyun clock-frequency = <49500000>; 114*4882a593Smuzhiyun hactive = <1024>; 115*4882a593Smuzhiyun vactive = <600>; 116*4882a593Smuzhiyun hback-porch = <90>; 117*4882a593Smuzhiyun hfront-porch = <90>; 118*4882a593Smuzhiyun vback-porch = <10>; 119*4882a593Smuzhiyun vfront-porch = <10>; 120*4882a593Smuzhiyun hsync-len = <90>; 121*4882a593Smuzhiyun vsync-len = <10>; 122*4882a593Smuzhiyun hsync-active = <0>; 123*4882a593Smuzhiyun vsync-active = <0>; 124*4882a593Smuzhiyun de-active = <0>; 125*4882a593Smuzhiyun pixelclk-active = <0>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun port { 130*4882a593Smuzhiyun panel_in_lvds: endpoint { 131*4882a593Smuzhiyun remote-endpoint = <&lvds_out_panel>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 137*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 138*4882a593Smuzhiyun /*clocks = <&rk809 1>;*/ 139*4882a593Smuzhiyun /*clock-names = "ext_clock";*/ 140*4882a593Smuzhiyun pinctrl-names = "default"; 141*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* 144*4882a593Smuzhiyun * On the module itself this is one of these (depending 145*4882a593Smuzhiyun * on the actual card populated): 146*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 147*4882a593Smuzhiyun * - PDN (power down when low) 148*4882a593Smuzhiyun */ 149*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 153*4882a593Smuzhiyun compatible = "regulator-fixed"; 154*4882a593Smuzhiyun regulator-name = "vcc_phy"; 155*4882a593Smuzhiyun regulator-always-on; 156*4882a593Smuzhiyun regulator-boot-on; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun vcc5v0_sys: vccsys { 160*4882a593Smuzhiyun compatible = "regulator-fixed"; 161*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 162*4882a593Smuzhiyun regulator-always-on; 163*4882a593Smuzhiyun regulator-boot-on; 164*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 165*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun wireless-wlan { 169*4882a593Smuzhiyun compatible = "wlan-platdata"; 170*4882a593Smuzhiyun wifi_chip_type = "AP6210"; 171*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; 172*4882a593Smuzhiyun status = "okay"; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun wireless-bluetooth { 176*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 177*4882a593Smuzhiyun /*clocks = <&rk809 1>;*/ 178*4882a593Smuzhiyun /*clock-names = "ext_clock";*/ 179*4882a593Smuzhiyun uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; 180*4882a593Smuzhiyun pinctrl-names = "default","rts_gpio"; 181*4882a593Smuzhiyun pinctrl-0 = <&uart1_rts>; 182*4882a593Smuzhiyun pinctrl-1 = <&uart1_rts_gpio>; 183*4882a593Smuzhiyun BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 184*4882a593Smuzhiyun BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 185*4882a593Smuzhiyun BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 186*4882a593Smuzhiyun status = "okay"; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun}; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun&cpu0 { 191*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&display_subsystem { 195*4882a593Smuzhiyun status = "okay"; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&dfi { 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&dmc { 203*4882a593Smuzhiyun center-supply = <&vdd_logic>; 204*4882a593Smuzhiyun status = "okay"; 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&emmc { 208*4882a593Smuzhiyun bus-width = <8>; 209*4882a593Smuzhiyun cap-mmc-highspeed; 210*4882a593Smuzhiyun mmc-hs200-1_8v; 211*4882a593Smuzhiyun no-sdio; 212*4882a593Smuzhiyun no-sd; 213*4882a593Smuzhiyun disable-wp; 214*4882a593Smuzhiyun non-removable; 215*4882a593Smuzhiyun num-slots = <1>; 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&gmac { 220*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 221*4882a593Smuzhiyun clock_in_out = "output"; 222*4882a593Smuzhiyun snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>; 223*4882a593Smuzhiyun snps,reset-active-low; 224*4882a593Smuzhiyun snps,reset-delays-us = <0 50000 50000>; 225*4882a593Smuzhiyun status = "okay"; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&gpu { 229*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&i2c0 { 234*4882a593Smuzhiyun status = "okay"; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun rk809: pmic@20 { 237*4882a593Smuzhiyun compatible = "rockchip,rk809"; 238*4882a593Smuzhiyun reg = <0x20>; 239*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 240*4882a593Smuzhiyun interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 241*4882a593Smuzhiyun pinctrl-names = "default"; 242*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 243*4882a593Smuzhiyun rockchip,system-power-controller; 244*4882a593Smuzhiyun wakeup-source; 245*4882a593Smuzhiyun #clock-cells = <1>; 246*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 249*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 250*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 251*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 252*4882a593Smuzhiyun vcc5-supply = <&vcc3v3_sys>; 253*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 254*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 255*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 256*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun regulators { 259*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 260*4882a593Smuzhiyun regulator-always-on; 261*4882a593Smuzhiyun regulator-boot-on; 262*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 263*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 264*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 265*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 266*4882a593Smuzhiyun regulator-name = "vdd_logic"; 267*4882a593Smuzhiyun regulator-state-mem { 268*4882a593Smuzhiyun regulator-on-in-suspend; 269*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 274*4882a593Smuzhiyun regulator-always-on; 275*4882a593Smuzhiyun regulator-boot-on; 276*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 277*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 278*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 279*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 280*4882a593Smuzhiyun regulator-name = "vdd_arm"; 281*4882a593Smuzhiyun regulator-state-mem { 282*4882a593Smuzhiyun regulator-off-in-suspend; 283*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 288*4882a593Smuzhiyun regulator-always-on; 289*4882a593Smuzhiyun regulator-boot-on; 290*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 291*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 292*4882a593Smuzhiyun regulator-state-mem { 293*4882a593Smuzhiyun regulator-on-in-suspend; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun vcc_3v0: DCDC_REG4 { 298*4882a593Smuzhiyun regulator-always-on; 299*4882a593Smuzhiyun regulator-boot-on; 300*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 301*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 302*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 303*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 304*4882a593Smuzhiyun regulator-state-mem { 305*4882a593Smuzhiyun regulator-off-in-suspend; 306*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun vcc_1v0: LDO_REG1 { 311*4882a593Smuzhiyun regulator-always-on; 312*4882a593Smuzhiyun regulator-boot-on; 313*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 314*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 315*4882a593Smuzhiyun regulator-name = "vcc_1v0"; 316*4882a593Smuzhiyun regulator-state-mem { 317*4882a593Smuzhiyun regulator-on-in-suspend; 318*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun vcc1v8_soc: LDO_REG2 { 323*4882a593Smuzhiyun regulator-always-on; 324*4882a593Smuzhiyun regulator-boot-on; 325*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 326*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun regulator-name = "vcc1v8_soc"; 329*4882a593Smuzhiyun regulator-state-mem { 330*4882a593Smuzhiyun regulator-on-in-suspend; 331*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun vdd1v0_soc: LDO_REG3 { 336*4882a593Smuzhiyun regulator-always-on; 337*4882a593Smuzhiyun regulator-boot-on; 338*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 339*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun regulator-name = "vcc1v0_soc"; 342*4882a593Smuzhiyun regulator-state-mem { 343*4882a593Smuzhiyun regulator-on-in-suspend; 344*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun vcc3v0_pmu: LDO_REG4 { 349*4882a593Smuzhiyun regulator-always-on; 350*4882a593Smuzhiyun regulator-boot-on; 351*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 352*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun regulator-name = "vcc3v0_pmu"; 355*4882a593Smuzhiyun regulator-state-mem { 356*4882a593Smuzhiyun regulator-on-in-suspend; 357*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 363*4882a593Smuzhiyun regulator-always-on; 364*4882a593Smuzhiyun regulator-boot-on; 365*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 366*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun regulator-name = "vccio_sd"; 369*4882a593Smuzhiyun regulator-state-mem { 370*4882a593Smuzhiyun regulator-on-in-suspend; 371*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun vcc_sd: LDO_REG6 { 376*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 377*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun regulator-name = "vcc_sd"; 380*4882a593Smuzhiyun regulator-state-mem { 381*4882a593Smuzhiyun regulator-on-in-suspend; 382*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun vcc2v8_dvp: LDO_REG7 { 388*4882a593Smuzhiyun regulator-always-on; 389*4882a593Smuzhiyun regulator-boot-on; 390*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 391*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun regulator-name = "vcc2v8_dvp"; 394*4882a593Smuzhiyun regulator-state-mem { 395*4882a593Smuzhiyun regulator-off-in-suspend; 396*4882a593Smuzhiyun regulator-suspend-microvolt = <2800000>; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG8 { 401*4882a593Smuzhiyun regulator-always-on; 402*4882a593Smuzhiyun regulator-boot-on; 403*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 404*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 407*4882a593Smuzhiyun regulator-state-mem { 408*4882a593Smuzhiyun regulator-on-in-suspend; 409*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun vdd1v5_dvp: LDO_REG9 { 414*4882a593Smuzhiyun regulator-always-on; 415*4882a593Smuzhiyun regulator-boot-on; 416*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 417*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun regulator-name = "vdd1v5_dvp"; 420*4882a593Smuzhiyun regulator-state-mem { 421*4882a593Smuzhiyun regulator-off-in-suspend; 422*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun vcc3v3_sys: DCDC_REG5 { 427*4882a593Smuzhiyun regulator-always-on; 428*4882a593Smuzhiyun regulator-boot-on; 429*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 430*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 431*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 432*4882a593Smuzhiyun regulator-state-mem { 433*4882a593Smuzhiyun regulator-on-in-suspend; 434*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun }; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun vcc3v3_lcd: SWITCH_REG1 { 439*4882a593Smuzhiyun regulator-boot-on; 440*4882a593Smuzhiyun regulator-name = "vcc3v3_lcd"; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun vcc5v0_host: SWITCH_REG2 { 444*4882a593Smuzhiyun regulator-always-on; 445*4882a593Smuzhiyun regulator-boot-on; 446*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun }; 449*4882a593Smuzhiyun }; 450*4882a593Smuzhiyun}; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun&i2c1 { 453*4882a593Smuzhiyun status = "okay"; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun sensor@f { 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun compatible = "ak8963"; 458*4882a593Smuzhiyun reg = <0x0f>; 459*4882a593Smuzhiyun type = <SENSOR_TYPE_COMPASS>; 460*4882a593Smuzhiyun irq_enable = <0>; 461*4882a593Smuzhiyun poll_delay_ms = <30>; 462*4882a593Smuzhiyun layout = <1>; 463*4882a593Smuzhiyun reprobe_en = <1>; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun gt1x: gt1x@14 { 467*4882a593Smuzhiyun compatible = "goodix,gt1x"; 468*4882a593Smuzhiyun reg = <0x14>; 469*4882a593Smuzhiyun goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 470*4882a593Smuzhiyun goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>; 471*4882a593Smuzhiyun }; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun sensor@4c { 474*4882a593Smuzhiyun status = "okay"; 475*4882a593Smuzhiyun compatible = "gs_mma7660"; 476*4882a593Smuzhiyun reg = <0x4c>; 477*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 478*4882a593Smuzhiyun irq-gpio = <&gpio0 RK_PB7 IRQ_TYPE_LEVEL_LOW>; 479*4882a593Smuzhiyun irq_enable = <0>; 480*4882a593Smuzhiyun poll_delay_ms = <30>; 481*4882a593Smuzhiyun layout = <2>; 482*4882a593Smuzhiyun reprobe_en = <1>; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun}; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun&io_domains { 487*4882a593Smuzhiyun status = "okay"; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun vccio1-supply = <&vcc1v8_soc>; 490*4882a593Smuzhiyun vccio2-supply = <&vccio_sd>; 491*4882a593Smuzhiyun vccio3-supply = <&vcc_3v0>; 492*4882a593Smuzhiyun vccio4-supply = <&vcc3v0_pmu>; 493*4882a593Smuzhiyun vccio5-supply = <&vcc_3v0>; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&lvds { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun ports { 500*4882a593Smuzhiyun port@1 { 501*4882a593Smuzhiyun reg = <1>; 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun lvds_out_panel: endpoint { 504*4882a593Smuzhiyun remote-endpoint = <&panel_in_lvds>; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun }; 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun}; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun&lvds_in_vopb { 511*4882a593Smuzhiyun status = "okay"; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&lvds_in_vopl { 515*4882a593Smuzhiyun status = "disabled"; 516*4882a593Smuzhiyun}; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun&route_lvds { 519*4882a593Smuzhiyun connect = <&vopb_out_lvds>; 520*4882a593Smuzhiyun status = "okay"; 521*4882a593Smuzhiyun}; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun&nandc0 { 524*4882a593Smuzhiyun status = "okay"; 525*4882a593Smuzhiyun}; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun&pinctrl { 528*4882a593Smuzhiyun pmic { 529*4882a593Smuzhiyun pmic_int: pmic_int { 530*4882a593Smuzhiyun rockchip,pins = 531*4882a593Smuzhiyun <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun }; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun sdio-pwrseq { 536*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 537*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 538*4882a593Smuzhiyun }; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&pmu_io_domains { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun pmuio1-supply = <&vcc3v0_pmu>; 546*4882a593Smuzhiyun pmuio2-supply = <&vcc3v0_pmu>; 547*4882a593Smuzhiyun}; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun&pwm1 { 550*4882a593Smuzhiyun status = "okay"; 551*4882a593Smuzhiyun}; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun&rk_rga { 554*4882a593Smuzhiyun status = "okay"; 555*4882a593Smuzhiyun}; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun&saradc { 558*4882a593Smuzhiyun status = "okay"; 559*4882a593Smuzhiyun vref-supply = <&vcc1v8_soc>; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&sdmmc { 563*4882a593Smuzhiyun bus-width = <4>; 564*4882a593Smuzhiyun cap-mmc-highspeed; 565*4882a593Smuzhiyun cap-sd-highspeed; 566*4882a593Smuzhiyun no-sdio; 567*4882a593Smuzhiyun no-mmc; 568*4882a593Smuzhiyun card-detect-delay = <800>; 569*4882a593Smuzhiyun ignore-pm-notify; 570*4882a593Smuzhiyun /*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/ 571*4882a593Smuzhiyun sd-uhs-sdr12; 572*4882a593Smuzhiyun sd-uhs-sdr25; 573*4882a593Smuzhiyun sd-uhs-sdr50; 574*4882a593Smuzhiyun sd-uhs-sdr104; 575*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 576*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 577*4882a593Smuzhiyun status = "okay"; 578*4882a593Smuzhiyun}; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun&sdio { 581*4882a593Smuzhiyun bus-width = <4>; 582*4882a593Smuzhiyun cap-sd-highspeed; 583*4882a593Smuzhiyun no-sd; 584*4882a593Smuzhiyun no-mmc; 585*4882a593Smuzhiyun ignore-pm-notify; 586*4882a593Smuzhiyun keep-power-in-suspend; 587*4882a593Smuzhiyun non-removable; 588*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 589*4882a593Smuzhiyun sd-uhs-sdr104; 590*4882a593Smuzhiyun status = "okay"; 591*4882a593Smuzhiyun}; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun&tsadc { 594*4882a593Smuzhiyun pinctrl-names = "gpio", "otpout"; 595*4882a593Smuzhiyun pinctrl-0 = <&tsadc_otp_gpio>; 596*4882a593Smuzhiyun pinctrl-1 = <&tsadc_otp_out>; 597*4882a593Smuzhiyun status = "okay"; 598*4882a593Smuzhiyun}; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun&uart1 { 601*4882a593Smuzhiyun pinctrl-names = "default"; 602*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer &uart1_cts>; 603*4882a593Smuzhiyun status = "okay"; 604*4882a593Smuzhiyun}; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun&u2phy { 607*4882a593Smuzhiyun status = "okay"; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun u2phy_host: host-port { 610*4882a593Smuzhiyun status = "okay"; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun u2phy_otg: otg-port { 614*4882a593Smuzhiyun status = "okay"; 615*4882a593Smuzhiyun }; 616*4882a593Smuzhiyun}; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun&usb20_otg { 619*4882a593Smuzhiyun status = "okay"; 620*4882a593Smuzhiyun}; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun&usb_host0_ehci { 623*4882a593Smuzhiyun status = "okay"; 624*4882a593Smuzhiyun}; 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun&usb_host0_ohci { 627*4882a593Smuzhiyun status = "okay"; 628*4882a593Smuzhiyun}; 629*4882a593Smuzhiyun 630*4882a593Smuzhiyun&vopb { 631*4882a593Smuzhiyun status = "okay"; 632*4882a593Smuzhiyun}; 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun&vopb_mmu { 635*4882a593Smuzhiyun status = "okay"; 636*4882a593Smuzhiyun}; 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun&vopl { 639*4882a593Smuzhiyun status = "okay"; 640*4882a593Smuzhiyun}; 641*4882a593Smuzhiyun 642*4882a593Smuzhiyun&vopl_mmu { 643*4882a593Smuzhiyun status = "okay"; 644*4882a593Smuzhiyun}; 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun&mpp_srv { 647*4882a593Smuzhiyun status = "okay"; 648*4882a593Smuzhiyun}; 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun&vdpu { 651*4882a593Smuzhiyun status = "okay"; 652*4882a593Smuzhiyun}; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun&vepu { 655*4882a593Smuzhiyun status = "okay"; 656*4882a593Smuzhiyun}; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun&vpu_mmu { 659*4882a593Smuzhiyun status = "okay"; 660*4882a593Smuzhiyun}; 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun&hevc { 663*4882a593Smuzhiyun status = "okay"; 664*4882a593Smuzhiyun}; 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun&hevc_mmu { 667*4882a593Smuzhiyun status = "okay"; 668*4882a593Smuzhiyun}; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun&firmware_android { 671*4882a593Smuzhiyun compatible = "android,firmware"; 672*4882a593Smuzhiyun fstab { 673*4882a593Smuzhiyun compatible = "android,fstab"; 674*4882a593Smuzhiyun system { 675*4882a593Smuzhiyun compatible = "android,system"; 676*4882a593Smuzhiyun dev = "/dev/block/by-name/system"; 677*4882a593Smuzhiyun type = "ext4"; 678*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 679*4882a593Smuzhiyun fsmgr_flags = "wait"; 680*4882a593Smuzhiyun }; 681*4882a593Smuzhiyun vendor { 682*4882a593Smuzhiyun compatible = "android,vendor"; 683*4882a593Smuzhiyun dev = "/dev/block/by-name/vendor"; 684*4882a593Smuzhiyun type = "ext4"; 685*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 686*4882a593Smuzhiyun fsmgr_flags = "wait"; 687*4882a593Smuzhiyun }; 688*4882a593Smuzhiyun }; 689*4882a593Smuzhiyun}; 690