xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
7*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
10*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
11*4882a593Smuzhiyun#include <dt-bindings/display/media-bus-format.h>
12*4882a593Smuzhiyun#include "px30.dtsi"
13*4882a593Smuzhiyun#include "px30-android.dtsi"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Rockchip PX30 AD R35 MB board";
17*4882a593Smuzhiyun	compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30";
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	adc-keys {
20*4882a593Smuzhiyun		compatible = "adc-keys";
21*4882a593Smuzhiyun		io-channels = <&saradc 2>;
22*4882a593Smuzhiyun		io-channel-names = "buttons";
23*4882a593Smuzhiyun		poll-interval = <100>;
24*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		esc-key {
27*4882a593Smuzhiyun			linux,code = <KEY_ESC>;
28*4882a593Smuzhiyun			label = "esc";
29*4882a593Smuzhiyun			press-threshold-microvolt = <1270000>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		home-key {
33*4882a593Smuzhiyun			linux,code = <KEY_HOME>;
34*4882a593Smuzhiyun			label = "home";
35*4882a593Smuzhiyun			press-threshold-microvolt = <602000>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		menu-key {
39*4882a593Smuzhiyun			linux,code = <KEY_MENU>;
40*4882a593Smuzhiyun			label = "menu";
41*4882a593Smuzhiyun			press-threshold-microvolt = <952000>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		vol-down-key {
45*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
46*4882a593Smuzhiyun			label = "volume down";
47*4882a593Smuzhiyun			press-threshold-microvolt = <290000>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		vol-up-key {
51*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
52*4882a593Smuzhiyun			label = "volume up";
53*4882a593Smuzhiyun			press-threshold-microvolt = <17000>;
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	backlight: backlight {
58*4882a593Smuzhiyun		compatible = "pwm-backlight";
59*4882a593Smuzhiyun		pwms = <&pwm1 0 25000 0>;
60*4882a593Smuzhiyun		brightness-levels = <
61*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
62*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
63*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
64*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
65*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
66*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
67*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
68*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
69*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
70*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
71*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
72*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
73*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
74*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
75*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
76*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
77*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
78*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
79*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
80*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
81*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
82*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
83*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
84*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
85*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
86*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
87*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
88*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
89*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
90*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
91*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
92*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
93*4882a593Smuzhiyun		default-brightness-level = <200>;
94*4882a593Smuzhiyun		enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
98*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
99*4882a593Smuzhiyun		pinctrl-names = "default";
100*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		/*
103*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
104*4882a593Smuzhiyun		 * on the actual card populated):
105*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
106*4882a593Smuzhiyun		 * - PDN (power down when low)
107*4882a593Smuzhiyun		 */
108*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
112*4882a593Smuzhiyun		compatible = "regulator-fixed";
113*4882a593Smuzhiyun		regulator-name = "vcc_phy";
114*4882a593Smuzhiyun		regulator-always-on;
115*4882a593Smuzhiyun		regulator-boot-on;
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	vcc5v0_sys: vccsys {
119*4882a593Smuzhiyun		compatible = "regulator-fixed";
120*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
121*4882a593Smuzhiyun		regulator-always-on;
122*4882a593Smuzhiyun		regulator-boot-on;
123*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
124*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&cpu0 {
129*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&display_subsystem {
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&dfi {
137*4882a593Smuzhiyun	status = "okay";
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&dmc {
141*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
142*4882a593Smuzhiyun	status = "okay";
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun&emmc {
146*4882a593Smuzhiyun	bus-width = <8>;
147*4882a593Smuzhiyun	cap-mmc-highspeed;
148*4882a593Smuzhiyun	mmc-hs200-1_8v;
149*4882a593Smuzhiyun	no-sdio;
150*4882a593Smuzhiyun	no-sd;
151*4882a593Smuzhiyun	disable-wp;
152*4882a593Smuzhiyun	non-removable;
153*4882a593Smuzhiyun	num-slots = <1>;
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&gpu {
158*4882a593Smuzhiyun	mali-supply = <&vdd_logic>;
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&i2c0 {
163*4882a593Smuzhiyun	status = "okay";
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	rk809: pmic@20 {
166*4882a593Smuzhiyun		compatible = "rockchip,rk809";
167*4882a593Smuzhiyun		reg = <0x20>;
168*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
169*4882a593Smuzhiyun		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
170*4882a593Smuzhiyun		pinctrl-names = "default";
171*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
172*4882a593Smuzhiyun		rockchip,system-power-controller;
173*4882a593Smuzhiyun		wakeup-source;
174*4882a593Smuzhiyun		#clock-cells = <1>;
175*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
178*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
179*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
180*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
181*4882a593Smuzhiyun		vcc5-supply = <&vcc3v3_sys>;
182*4882a593Smuzhiyun		vcc6-supply = <&vcc3v3_sys>;
183*4882a593Smuzhiyun		vcc7-supply = <&vcc3v3_sys>;
184*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
185*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		regulators {
188*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
189*4882a593Smuzhiyun				regulator-always-on;
190*4882a593Smuzhiyun				regulator-boot-on;
191*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
192*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
193*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
194*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
195*4882a593Smuzhiyun				regulator-name = "vdd_logic";
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun				regulator-state-mem {
198*4882a593Smuzhiyun					regulator-on-in-suspend;
199*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
200*4882a593Smuzhiyun				};
201*4882a593Smuzhiyun			};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
204*4882a593Smuzhiyun				regulator-always-on;
205*4882a593Smuzhiyun				regulator-boot-on;
206*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
207*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
208*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
209*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
210*4882a593Smuzhiyun				regulator-name = "vdd_arm";
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun				regulator-state-mem {
213*4882a593Smuzhiyun					regulator-off-in-suspend;
214*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
215*4882a593Smuzhiyun				};
216*4882a593Smuzhiyun			};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
219*4882a593Smuzhiyun				regulator-always-on;
220*4882a593Smuzhiyun				regulator-boot-on;
221*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
222*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun				regulator-state-mem {
225*4882a593Smuzhiyun					regulator-on-in-suspend;
226*4882a593Smuzhiyun				};
227*4882a593Smuzhiyun			};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun			vcc_3v0: DCDC_REG4 {
230*4882a593Smuzhiyun				regulator-always-on;
231*4882a593Smuzhiyun				regulator-boot-on;
232*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
233*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
234*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
235*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun				regulator-state-mem {
238*4882a593Smuzhiyun					regulator-off-in-suspend;
239*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
240*4882a593Smuzhiyun				};
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun			vcc_1v0: LDO_REG1 {
244*4882a593Smuzhiyun				regulator-always-on;
245*4882a593Smuzhiyun				regulator-boot-on;
246*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
247*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
248*4882a593Smuzhiyun				regulator-name = "vcc_1v0";
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun				regulator-state-mem {
251*4882a593Smuzhiyun					regulator-on-in-suspend;
252*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
253*4882a593Smuzhiyun				};
254*4882a593Smuzhiyun			};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun			vcc1v8_soc: LDO_REG2 {
257*4882a593Smuzhiyun				regulator-always-on;
258*4882a593Smuzhiyun				regulator-boot-on;
259*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
260*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
261*4882a593Smuzhiyun				regulator-name = "vcc1v8_soc";
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun				regulator-state-mem {
264*4882a593Smuzhiyun					regulator-on-in-suspend;
265*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
266*4882a593Smuzhiyun				};
267*4882a593Smuzhiyun			};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun			vdd1v0_soc: LDO_REG3 {
270*4882a593Smuzhiyun				regulator-always-on;
271*4882a593Smuzhiyun				regulator-boot-on;
272*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
273*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
274*4882a593Smuzhiyun				regulator-name = "vcc1v0_soc";
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun				regulator-state-mem {
277*4882a593Smuzhiyun					regulator-on-in-suspend;
278*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
279*4882a593Smuzhiyun				};
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun			vcc3v0_pmu: LDO_REG4 {
283*4882a593Smuzhiyun				regulator-always-on;
284*4882a593Smuzhiyun				regulator-boot-on;
285*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
286*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
287*4882a593Smuzhiyun				regulator-name = "vcc3v0_pmu";
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun				regulator-state-mem {
290*4882a593Smuzhiyun					regulator-on-in-suspend;
291*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun				};
294*4882a593Smuzhiyun			};
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
297*4882a593Smuzhiyun				regulator-always-on;
298*4882a593Smuzhiyun				regulator-boot-on;
299*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
300*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
301*4882a593Smuzhiyun				regulator-name = "vccio_sd";
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun				regulator-state-mem {
304*4882a593Smuzhiyun					regulator-on-in-suspend;
305*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
306*4882a593Smuzhiyun				};
307*4882a593Smuzhiyun			};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun			vcc_sd: LDO_REG6 {
310*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
311*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
312*4882a593Smuzhiyun				regulator-name = "vcc_sd";
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun				regulator-state-mem {
315*4882a593Smuzhiyun					regulator-on-in-suspend;
316*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun				};
319*4882a593Smuzhiyun			};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG7 {
322*4882a593Smuzhiyun				regulator-always-on;
323*4882a593Smuzhiyun				regulator-boot-on;
324*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
325*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
326*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun				regulator-state-mem {
329*4882a593Smuzhiyun					regulator-off-in-suspend;
330*4882a593Smuzhiyun					regulator-suspend-microvolt = <2800000>;
331*4882a593Smuzhiyun				};
332*4882a593Smuzhiyun			};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG8 {
335*4882a593Smuzhiyun				regulator-always-on;
336*4882a593Smuzhiyun				regulator-boot-on;
337*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
338*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
339*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun				regulator-state-mem {
342*4882a593Smuzhiyun					regulator-on-in-suspend;
343*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
344*4882a593Smuzhiyun				};
345*4882a593Smuzhiyun			};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun			vdd1v5_dvp: LDO_REG9 {
348*4882a593Smuzhiyun				regulator-always-on;
349*4882a593Smuzhiyun				regulator-boot-on;
350*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
351*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
352*4882a593Smuzhiyun				regulator-name = "vdd1v5_dvp";
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun				regulator-state-mem {
355*4882a593Smuzhiyun					regulator-off-in-suspend;
356*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
357*4882a593Smuzhiyun				};
358*4882a593Smuzhiyun			};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun			vcc3v3_sys: DCDC_REG5 {
361*4882a593Smuzhiyun				regulator-always-on;
362*4882a593Smuzhiyun				regulator-boot-on;
363*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
364*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
365*4882a593Smuzhiyun				regulator-name = "vcc3v3_sys";
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun				regulator-state-mem {
368*4882a593Smuzhiyun					regulator-on-in-suspend;
369*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
370*4882a593Smuzhiyun				};
371*4882a593Smuzhiyun			};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun			vcc3v3_lcd: SWITCH_REG1 {
374*4882a593Smuzhiyun				regulator-boot-on;
375*4882a593Smuzhiyun				regulator-name = "vcc3v3_lcd";
376*4882a593Smuzhiyun			};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun			vcc5v0_host: SWITCH_REG2 {
379*4882a593Smuzhiyun				regulator-always-on;
380*4882a593Smuzhiyun				regulator-boot-on;
381*4882a593Smuzhiyun				regulator-name = "vcc5v0_host";
382*4882a593Smuzhiyun			};
383*4882a593Smuzhiyun		};
384*4882a593Smuzhiyun	};
385*4882a593Smuzhiyun};
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun&io_domains {
388*4882a593Smuzhiyun	vccio1-supply = <&vcc1v8_soc>;
389*4882a593Smuzhiyun	vccio2-supply = <&vccio_sd>;
390*4882a593Smuzhiyun	vccio3-supply = <&vcc_3v0>;
391*4882a593Smuzhiyun	vccio4-supply = <&vcc3v0_pmu>;
392*4882a593Smuzhiyun	vccio5-supply = <&vcc_3v0>;
393*4882a593Smuzhiyun	status = "okay";
394*4882a593Smuzhiyun};
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun&nandc0 {
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun&pmu_io_domains {
401*4882a593Smuzhiyun	pmuio1-supply = <&vcc3v0_pmu>;
402*4882a593Smuzhiyun	pmuio2-supply = <&vcc3v0_pmu>;
403*4882a593Smuzhiyun	status = "okay";
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&pwm1 {
407*4882a593Smuzhiyun	status = "okay";
408*4882a593Smuzhiyun};
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun&saradc {
411*4882a593Smuzhiyun	vref-supply = <&vcc1v8_soc>;
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&sdmmc {
416*4882a593Smuzhiyun	bus-width = <4>;
417*4882a593Smuzhiyun	cap-mmc-highspeed;
418*4882a593Smuzhiyun	cap-sd-highspeed;
419*4882a593Smuzhiyun	no-sdio;
420*4882a593Smuzhiyun	no-mmc;
421*4882a593Smuzhiyun	card-detect-delay = <800>;
422*4882a593Smuzhiyun	ignore-pm-notify;
423*4882a593Smuzhiyun	sd-uhs-sdr12;
424*4882a593Smuzhiyun	sd-uhs-sdr25;
425*4882a593Smuzhiyun	sd-uhs-sdr50;
426*4882a593Smuzhiyun	sd-uhs-sdr104;
427*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
428*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
429*4882a593Smuzhiyun	status = "okay";
430*4882a593Smuzhiyun};
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun&sdio {
433*4882a593Smuzhiyun	bus-width = <4>;
434*4882a593Smuzhiyun	cap-sd-highspeed;
435*4882a593Smuzhiyun	no-sd;
436*4882a593Smuzhiyun	no-mmc;
437*4882a593Smuzhiyun	ignore-pm-notify;
438*4882a593Smuzhiyun	keep-power-in-suspend;
439*4882a593Smuzhiyun	non-removable;
440*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
441*4882a593Smuzhiyun	sd-uhs-sdr104;
442*4882a593Smuzhiyun	status = "okay";
443*4882a593Smuzhiyun};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun&tsadc {
446*4882a593Smuzhiyun	pinctrl-names = "init", "default";
447*4882a593Smuzhiyun	pinctrl-0 = <&tsadc_otp_gpio>;
448*4882a593Smuzhiyun	pinctrl-1 = <&tsadc_otp_out>;
449*4882a593Smuzhiyun	status = "okay";
450*4882a593Smuzhiyun};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun&uart1 {
453*4882a593Smuzhiyun	pinctrl-names = "default";
454*4882a593Smuzhiyun	pinctrl-0 = <&uart1_xfer &uart1_cts>;
455*4882a593Smuzhiyun	status = "okay";
456*4882a593Smuzhiyun};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun&u2phy {
459*4882a593Smuzhiyun	status = "okay";
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun	u2phy_host: host-port {
462*4882a593Smuzhiyun		status = "okay";
463*4882a593Smuzhiyun	};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun	u2phy_otg: otg-port {
466*4882a593Smuzhiyun		status = "okay";
467*4882a593Smuzhiyun	};
468*4882a593Smuzhiyun};
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun&usb20_otg {
471*4882a593Smuzhiyun	status = "okay";
472*4882a593Smuzhiyun};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun&usb_host0_ehci {
475*4882a593Smuzhiyun	status = "okay";
476*4882a593Smuzhiyun};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun&usb_host0_ohci {
479*4882a593Smuzhiyun	status = "okay";
480*4882a593Smuzhiyun};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun&vopb {
483*4882a593Smuzhiyun	status = "okay";
484*4882a593Smuzhiyun};
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun&vopb_mmu {
487*4882a593Smuzhiyun	status = "okay";
488*4882a593Smuzhiyun};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun&vopl {
491*4882a593Smuzhiyun	status = "okay";
492*4882a593Smuzhiyun};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun&vopl_mmu {
495*4882a593Smuzhiyun	status = "okay";
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&mpp_srv {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&vdpu {
503*4882a593Smuzhiyun	status = "okay";
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun&vepu {
507*4882a593Smuzhiyun	status = "okay";
508*4882a593Smuzhiyun};
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun&vpu_mmu {
511*4882a593Smuzhiyun	status = "okay";
512*4882a593Smuzhiyun};
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun&hevc {
515*4882a593Smuzhiyun	status = "okay";
516*4882a593Smuzhiyun};
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun&hevc_mmu {
519*4882a593Smuzhiyun	status = "okay";
520*4882a593Smuzhiyun};
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun&dsi {
523*4882a593Smuzhiyun	status = "okay";
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	panel@0 {
526*4882a593Smuzhiyun		compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi";
527*4882a593Smuzhiyun		reg = <0>;
528*4882a593Smuzhiyun		power-supply = <&vcc3v3_lcd>;
529*4882a593Smuzhiyun		backlight = <&backlight>;
530*4882a593Smuzhiyun		prepare-delay-ms = <20>;
531*4882a593Smuzhiyun		reset-delay-ms = <20>;
532*4882a593Smuzhiyun		init-delay-ms = <20>;
533*4882a593Smuzhiyun		enable-delay-ms = <20>;
534*4882a593Smuzhiyun		disable-delay-ms = <20>;
535*4882a593Smuzhiyun		unprepare-delay-ms = <20>;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun		width-mm = <135>;
538*4882a593Smuzhiyun		height-mm = <216>;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
541*4882a593Smuzhiyun			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
542*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
543*4882a593Smuzhiyun		dsi,lanes = <4>;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun		panel-init-sequence = [
546*4882a593Smuzhiyun			15 00 02 E0 00
547*4882a593Smuzhiyun			15 00 02 E1 93
548*4882a593Smuzhiyun			15 00 02 E2 65
549*4882a593Smuzhiyun			15 00 02 E3 F8
550*4882a593Smuzhiyun			15 00 02 80 03
551*4882a593Smuzhiyun			15 00 02 E0 04
552*4882a593Smuzhiyun			15 00 02 2B 2B
553*4882a593Smuzhiyun			15 00 02 2D 03
554*4882a593Smuzhiyun			15 00 02 2E 44
555*4882a593Smuzhiyun			15 00 02 E0 01
556*4882a593Smuzhiyun			15 00 02 00 00
557*4882a593Smuzhiyun			15 00 02 01 6D
558*4882a593Smuzhiyun			15 00 02 0C 74
559*4882a593Smuzhiyun			15 00 02 17 00
560*4882a593Smuzhiyun			15 00 02 18 A7
561*4882a593Smuzhiyun			15 00 02 19 01
562*4882a593Smuzhiyun			15 00 02 1A 00
563*4882a593Smuzhiyun			15 00 02 1B A7
564*4882a593Smuzhiyun			15 00 02 1C 01
565*4882a593Smuzhiyun			15 00 02 1F 6A
566*4882a593Smuzhiyun			15 00 02 20 23
567*4882a593Smuzhiyun			15 00 02 21 23
568*4882a593Smuzhiyun			15 00 02 22 0E
569*4882a593Smuzhiyun			15 00 02 35 28
570*4882a593Smuzhiyun			15 00 02 37 59
571*4882a593Smuzhiyun			15 00 02 38 05
572*4882a593Smuzhiyun			15 00 02 39 04
573*4882a593Smuzhiyun			15 00 02 3A 08
574*4882a593Smuzhiyun			15 00 02 3B 08
575*4882a593Smuzhiyun			15 00 02 3C 7C
576*4882a593Smuzhiyun			15 00 02 3D FF
577*4882a593Smuzhiyun			15 00 02 3E FF
578*4882a593Smuzhiyun			15 00 02 3F FF
579*4882a593Smuzhiyun			15 00 02 40 06
580*4882a593Smuzhiyun			15 00 02 41 A0
581*4882a593Smuzhiyun			15 00 02 43 08
582*4882a593Smuzhiyun			15 00 02 44 0B
583*4882a593Smuzhiyun			15 00 02 45 88
584*4882a593Smuzhiyun			15 00 02 4B 04
585*4882a593Smuzhiyun			15 00 02 55 01
586*4882a593Smuzhiyun			15 00 02 56 01
587*4882a593Smuzhiyun			15 00 02 57 8D
588*4882a593Smuzhiyun			15 00 02 58 0A
589*4882a593Smuzhiyun			15 00 02 59 0A
590*4882a593Smuzhiyun			15 00 02 5A 28
591*4882a593Smuzhiyun			15 00 02 5B 1E
592*4882a593Smuzhiyun			15 00 02 5C 16
593*4882a593Smuzhiyun			15 00 02 5D 76
594*4882a593Smuzhiyun			15 00 02 5E 58
595*4882a593Smuzhiyun			15 00 02 5F 46
596*4882a593Smuzhiyun			15 00 02 60 39
597*4882a593Smuzhiyun			15 00 02 61 37
598*4882a593Smuzhiyun			15 00 02 62 2A
599*4882a593Smuzhiyun			15 00 02 63 2F
600*4882a593Smuzhiyun			15 00 02 64 18
601*4882a593Smuzhiyun			15 00 02 65 39
602*4882a593Smuzhiyun			15 00 02 66 38
603*4882a593Smuzhiyun			15 00 02 67 3A
604*4882a593Smuzhiyun			15 00 02 68 5A
605*4882a593Smuzhiyun			15 00 02 69 46
606*4882a593Smuzhiyun			15 00 02 6A 4C
607*4882a593Smuzhiyun			15 00 02 6B 3F
608*4882a593Smuzhiyun			15 00 02 6C 3D
609*4882a593Smuzhiyun			15 00 02 6D 2F
610*4882a593Smuzhiyun			15 00 02 6E 1E
611*4882a593Smuzhiyun			15 00 02 6F 00
612*4882a593Smuzhiyun			15 00 02 70 76
613*4882a593Smuzhiyun			15 00 02 71 58
614*4882a593Smuzhiyun			15 00 02 72 46
615*4882a593Smuzhiyun			15 00 02 73 39
616*4882a593Smuzhiyun			15 00 02 74 33
617*4882a593Smuzhiyun			15 00 02 75 22
618*4882a593Smuzhiyun			15 00 02 76 27
619*4882a593Smuzhiyun			15 00 02 77 14
620*4882a593Smuzhiyun			15 00 02 78 29
621*4882a593Smuzhiyun			15 00 02 79 2A
622*4882a593Smuzhiyun			15 00 02 7A 28
623*4882a593Smuzhiyun			15 00 02 7B 46
624*4882a593Smuzhiyun			15 00 02 7C 38
625*4882a593Smuzhiyun			15 00 02 7D 3E
626*4882a593Smuzhiyun			15 00 02 7E 31
627*4882a593Smuzhiyun			15 00 02 7F 29
628*4882a593Smuzhiyun			15 00 02 80 1B
629*4882a593Smuzhiyun			15 00 02 81 0A
630*4882a593Smuzhiyun			15 00 02 82 00
631*4882a593Smuzhiyun			15 00 02 E0 02
632*4882a593Smuzhiyun			15 00 02 00 44
633*4882a593Smuzhiyun			15 00 02 01 44
634*4882a593Smuzhiyun			15 00 02 02 45
635*4882a593Smuzhiyun			15 00 02 03 45
636*4882a593Smuzhiyun			15 00 02 04 46
637*4882a593Smuzhiyun			15 00 02 05 46
638*4882a593Smuzhiyun			15 00 02 06 47
639*4882a593Smuzhiyun			15 00 02 07 47
640*4882a593Smuzhiyun			15 00 02 08 1D
641*4882a593Smuzhiyun			15 00 02 09 1D
642*4882a593Smuzhiyun			15 00 02 0A 1D
643*4882a593Smuzhiyun			15 00 02 0B 1D
644*4882a593Smuzhiyun			15 00 02 0C 1D
645*4882a593Smuzhiyun			15 00 02 0D 1D
646*4882a593Smuzhiyun			15 00 02 0E 1D
647*4882a593Smuzhiyun			15 00 02 0F 57
648*4882a593Smuzhiyun			15 00 02 10 57
649*4882a593Smuzhiyun			15 00 02 11 58
650*4882a593Smuzhiyun			15 00 02 12 58
651*4882a593Smuzhiyun			15 00 02 13 40
652*4882a593Smuzhiyun			15 00 02 14 55
653*4882a593Smuzhiyun			15 00 02 15 55
654*4882a593Smuzhiyun			15 00 02 16 44
655*4882a593Smuzhiyun			15 00 02 17 44
656*4882a593Smuzhiyun			15 00 02 18 45
657*4882a593Smuzhiyun			15 00 02 19 45
658*4882a593Smuzhiyun			15 00 02 1A 46
659*4882a593Smuzhiyun			15 00 02 1B 46
660*4882a593Smuzhiyun			15 00 02 1C 47
661*4882a593Smuzhiyun			15 00 02 1D 47
662*4882a593Smuzhiyun			15 00 02 1E 1D
663*4882a593Smuzhiyun			15 00 02 1F 1D
664*4882a593Smuzhiyun			15 00 02 20 1D
665*4882a593Smuzhiyun			15 00 02 21 1D
666*4882a593Smuzhiyun			15 00 02 22 1D
667*4882a593Smuzhiyun			15 00 02 23 1D
668*4882a593Smuzhiyun			15 00 02 24 1D
669*4882a593Smuzhiyun			15 00 02 25 57
670*4882a593Smuzhiyun			15 00 02 26 57
671*4882a593Smuzhiyun			15 00 02 27 58
672*4882a593Smuzhiyun			15 00 02 28 58
673*4882a593Smuzhiyun			15 00 02 29 40
674*4882a593Smuzhiyun			15 00 02 2A 55
675*4882a593Smuzhiyun			15 00 02 2B 55
676*4882a593Smuzhiyun			15 00 02 58 40
677*4882a593Smuzhiyun			15 00 02 59 00
678*4882a593Smuzhiyun			15 00 02 5A 00
679*4882a593Smuzhiyun			15 00 02 5B 00
680*4882a593Smuzhiyun			15 00 02 5C 0A
681*4882a593Smuzhiyun			15 00 02 5D 10
682*4882a593Smuzhiyun			15 00 02 5E 01
683*4882a593Smuzhiyun			15 00 02 5F 02
684*4882a593Smuzhiyun			15 00 02 60 00
685*4882a593Smuzhiyun			15 00 02 61 01
686*4882a593Smuzhiyun			15 00 02 62 02
687*4882a593Smuzhiyun			15 00 02 63 0B
688*4882a593Smuzhiyun			15 00 02 64 6A
689*4882a593Smuzhiyun			15 00 02 65 00
690*4882a593Smuzhiyun			15 00 02 66 00
691*4882a593Smuzhiyun			15 00 02 67 31
692*4882a593Smuzhiyun			15 00 02 68 0B
693*4882a593Smuzhiyun			15 00 02 69 1E
694*4882a593Smuzhiyun			15 00 02 6A 6A
695*4882a593Smuzhiyun			15 00 02 6B 04
696*4882a593Smuzhiyun			15 00 02 6C 00
697*4882a593Smuzhiyun			15 00 02 6D 04
698*4882a593Smuzhiyun			15 00 02 6E 00
699*4882a593Smuzhiyun			15 00 02 6F 88
700*4882a593Smuzhiyun			15 00 02 70 00
701*4882a593Smuzhiyun			15 00 02 71 00
702*4882a593Smuzhiyun			15 00 02 72 06
703*4882a593Smuzhiyun			15 00 02 73 7B
704*4882a593Smuzhiyun			15 00 02 74 00
705*4882a593Smuzhiyun			15 00 02 75 F8
706*4882a593Smuzhiyun			15 00 02 76 00
707*4882a593Smuzhiyun			15 00 02 77 0D
708*4882a593Smuzhiyun			15 00 02 78 14
709*4882a593Smuzhiyun			15 00 02 79 00
710*4882a593Smuzhiyun			15 00 02 7A 00
711*4882a593Smuzhiyun			15 00 02 7B 00
712*4882a593Smuzhiyun			15 00 02 7C 00
713*4882a593Smuzhiyun			15 00 02 7D 03
714*4882a593Smuzhiyun			15 00 02 7E 7B
715*4882a593Smuzhiyun			15 00 02 E0 00
716*4882a593Smuzhiyun			15 00 02 E6 02
717*4882a593Smuzhiyun			15 00 02 E7 06
718*4882a593Smuzhiyun			15 80 01 11
719*4882a593Smuzhiyun			15 16 01 29
720*4882a593Smuzhiyun		];
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun		panel-exit-sequence = [
723*4882a593Smuzhiyun			05 00 01 28
724*4882a593Smuzhiyun			05 00 01 10
725*4882a593Smuzhiyun		];
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun		display-timings {
728*4882a593Smuzhiyun			native-mode = <&timing0>;
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun			timing0: timing0 {
731*4882a593Smuzhiyun				clock-frequency = <68500000>;
732*4882a593Smuzhiyun				hactive = <800>;
733*4882a593Smuzhiyun				hfront-porch = <16>;
734*4882a593Smuzhiyun				hsync-len = <16>;
735*4882a593Smuzhiyun				hback-porch = <48>;
736*4882a593Smuzhiyun				vactive = <1280>;
737*4882a593Smuzhiyun				vfront-porch = <8>;
738*4882a593Smuzhiyun				vsync-len = <4>;
739*4882a593Smuzhiyun				vback-porch = <4>;
740*4882a593Smuzhiyun				hsync-active = <0>;
741*4882a593Smuzhiyun				vsync-active = <0>;
742*4882a593Smuzhiyun				de-active = <0>;
743*4882a593Smuzhiyun				pixelclk-active = <0>;
744*4882a593Smuzhiyun			};
745*4882a593Smuzhiyun		};
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun		ports {
748*4882a593Smuzhiyun			#address-cells = <1>;
749*4882a593Smuzhiyun			#size-cells = <0>;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun			port@0 {
752*4882a593Smuzhiyun				reg = <0>;
753*4882a593Smuzhiyun				panel_in_dsi: endpoint {
754*4882a593Smuzhiyun					remote-endpoint = <&dsi_out_panel>;
755*4882a593Smuzhiyun				};
756*4882a593Smuzhiyun			};
757*4882a593Smuzhiyun		};
758*4882a593Smuzhiyun	};
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun	ports {
761*4882a593Smuzhiyun		#address-cells = <1>;
762*4882a593Smuzhiyun		#size-cells = <0>;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun		port@1 {
765*4882a593Smuzhiyun			reg = <1>;
766*4882a593Smuzhiyun			dsi_out_panel: endpoint {
767*4882a593Smuzhiyun				remote-endpoint = <&panel_in_dsi>;
768*4882a593Smuzhiyun			};
769*4882a593Smuzhiyun		};
770*4882a593Smuzhiyun	};
771*4882a593Smuzhiyun};
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun&dsi_in_vopl {
774*4882a593Smuzhiyun	status = "disabled";
775*4882a593Smuzhiyun};
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun&dsi_in_vopb {
778*4882a593Smuzhiyun	status = "okay";
779*4882a593Smuzhiyun};
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun&route_dsi {
782*4882a593Smuzhiyun	connect = <&vopb_out_dsi>;
783*4882a593Smuzhiyun	status = "okay";
784*4882a593Smuzhiyun};
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun&pinctrl {
787*4882a593Smuzhiyun	pmic {
788*4882a593Smuzhiyun		pmic_int: pmic_int {
789*4882a593Smuzhiyun			rockchip,pins =
790*4882a593Smuzhiyun				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
791*4882a593Smuzhiyun		};
792*4882a593Smuzhiyun	};
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun	sdio-pwrseq {
795*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
796*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
797*4882a593Smuzhiyun		};
798*4882a593Smuzhiyun	};
799*4882a593Smuzhiyun};
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun&firmware_android {
802*4882a593Smuzhiyun	compatible = "android,firmware";
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun	fstab {
805*4882a593Smuzhiyun		compatible = "android,fstab";
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun		system {
808*4882a593Smuzhiyun			compatible = "android,system";
809*4882a593Smuzhiyun			dev = "/dev/block/by-name/system";
810*4882a593Smuzhiyun			type = "ext4";
811*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
812*4882a593Smuzhiyun			fsmgr_flags = "wait";
813*4882a593Smuzhiyun		};
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun		vendor {
816*4882a593Smuzhiyun			compatible = "android,vendor";
817*4882a593Smuzhiyun			dev = "/dev/block/by-name/vendor";
818*4882a593Smuzhiyun			type = "ext4";
819*4882a593Smuzhiyun			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
820*4882a593Smuzhiyun			fsmgr_flags = "wait";
821*4882a593Smuzhiyun		};
822*4882a593Smuzhiyun	};
823*4882a593Smuzhiyun};
824