1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/clock/rk618-cru.h> 8#include "px30-ad-r35-mb.dtsi" 9 10/ { 11 panel { 12 compatible = "chunghwa,claa101wh31-cw", "simple-panel"; 13 backlight = <&backlight>; 14 power-supply = <&vcc3v3_lcd>; 15 enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; 16 prepare-delay-ms = <120>; 17 enable-delay-ms = <120>; 18 disable-delay-ms = <120>; 19 unprepare-delay-ms = <120>; 20 bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>; 21 width-mm = <231>; 22 height-mm = <154>; 23 24 display-timings { 25 native-mode = <&timing1>; 26 27 timing1: timing1 { 28 clock-frequency = <72000000>; 29 hactive = <1280>; 30 vactive = <800>; 31 hback-porch = <60>; 32 hfront-porch = <60>; 33 vback-porch = <16>; 34 vfront-porch = <16>; 35 hsync-len = <40>; 36 vsync-len = <6>; 37 hsync-active = <0>; 38 vsync-active = <0>; 39 de-active = <0>; 40 pixelclk-active = <0>; 41 }; 42 }; 43 44 port { 45 panel_in_lvds: endpoint { 46 remote-endpoint = <&lvds_out_panel>; 47 }; 48 }; 49 }; 50}; 51 52&dmc { 53 auto-freq-en = <0>; 54}; 55 56&i2c0 { 57 status = "okay"; 58 59 rk618@50 { 60 compatible = "rockchip,rk618"; 61 reg = <0x50>; 62 pinctrl-names = "default"; 63 pinctrl-0 = <&i2s1_2ch_mclk>; 64 clocks = <&cru SCLK_I2S1_OUT>; 65 clock-names = "clkin"; 66 assigned-clocks = <&cru SCLK_I2S1_OUT>; 67 assigned-clock-rates = <12000000>; 68 reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; 69 status = "okay"; 70 71 clock: cru { 72 compatible = "rockchip,rk618-cru"; 73 clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>; 74 clock-names = "clkin", "lcdc0_dclkp"; 75 assigned-clocks = <&clock SCALER_PLLIN_CLK>, 76 <&clock VIF_PLLIN_CLK>, 77 <&clock SCALER_CLK>, 78 <&clock VIF0_PRE_CLK>, 79 <&clock CODEC_CLK>, 80 <&clock DITHER_CLK>; 81 assigned-clock-parents = <&cru SCLK_I2S1_OUT>, 82 <&clock LCDC0_CLK>, 83 <&clock SCALER_PLL_CLK>, 84 <&clock VIF_PLL_CLK>, 85 <&cru SCLK_I2S1_OUT>, 86 <&clock VIF0_CLK>; 87 #clock-cells = <1>; 88 status = "okay"; 89 }; 90 91 lvds { 92 compatible = "rockchip,rk618-lvds"; 93 clocks = <&clock LVDS_CLK>; 94 clock-names = "lvds"; 95 status = "okay"; 96 97 ports { 98 #address-cells = <1>; 99 #size-cells = <0>; 100 101 port@0 { 102 reg = <0>; 103 104 lvds_in_rgb: endpoint { 105 remote-endpoint = <&rgb_out_lvds>; 106 }; 107 }; 108 109 port@1 { 110 reg = <1>; 111 112 lvds_out_panel: endpoint { 113 remote-endpoint = <&panel_in_lvds>; 114 }; 115 }; 116 }; 117 }; 118 }; 119}; 120 121&rgb { 122 status = "okay"; 123 124 ports { 125 port@1 { 126 reg = <1>; 127 128 rgb_out_lvds: endpoint { 129 remote-endpoint = <&lvds_in_rgb>; 130 }; 131 }; 132 }; 133}; 134 135&rgb_in_vopb { 136 status = "disabled"; 137}; 138 139&rgb_in_vopl { 140 status = "okay"; 141}; 142 143&route_rgb { 144 connect = <&vopl_out_rgb>; 145 status = "okay"; 146}; 147