1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for common parts of Salvator-X board variants 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015-2016 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/* 9*4882a593Smuzhiyun * SSI-AK4613 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * This command is required when Playback/Capture 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * amixer set "DVC Out" 100% 14*4882a593Smuzhiyun * amixer set "DVC In" 100% 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * You can use Mute 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * amixer set "DVC Out Mute" on 19*4882a593Smuzhiyun * amixer set "DVC In Mute" on 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * You can use Volume Ramp 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24*4882a593Smuzhiyun * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25*4882a593Smuzhiyun * amixer set "DVC Out Ramp" on 26*4882a593Smuzhiyun * aplay xxx.wav & 27*4882a593Smuzhiyun * amixer set "DVC Out" 80% // Volume Down 28*4882a593Smuzhiyun * amixer set "DVC Out" 100% // Volume Up 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 32*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun/ { 35*4882a593Smuzhiyun aliases { 36*4882a593Smuzhiyun serial0 = &scif2; 37*4882a593Smuzhiyun serial1 = &hscif1; 38*4882a593Smuzhiyun ethernet0 = &avb; 39*4882a593Smuzhiyun mmc0 = &sdhi2; 40*4882a593Smuzhiyun mmc1 = &sdhi0; 41*4882a593Smuzhiyun mmc2 = &sdhi3; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun chosen { 45*4882a593Smuzhiyun bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 46*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun audio_clkout: audio-clkout { 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * This is same as <&rcar_sound 0> 52*4882a593Smuzhiyun * but needed to avoid cs2000/rcar_sound probe dead-lock 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun compatible = "fixed-clock"; 55*4882a593Smuzhiyun #clock-cells = <0>; 56*4882a593Smuzhiyun clock-frequency = <12288000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun backlight: backlight { 60*4882a593Smuzhiyun compatible = "pwm-backlight"; 61*4882a593Smuzhiyun pwms = <&pwm1 0 50000>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun brightness-levels = <256 128 64 16 8 4 0>; 64*4882a593Smuzhiyun default-brightness-level = <6>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun power-supply = <®_12v>; 67*4882a593Smuzhiyun enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun cvbs-in { 71*4882a593Smuzhiyun compatible = "composite-video-connector"; 72*4882a593Smuzhiyun label = "CVBS IN"; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun port { 75*4882a593Smuzhiyun cvbs_con: endpoint { 76*4882a593Smuzhiyun remote-endpoint = <&adv7482_ain7>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun hdmi-in { 82*4882a593Smuzhiyun compatible = "hdmi-connector"; 83*4882a593Smuzhiyun label = "HDMI IN"; 84*4882a593Smuzhiyun type = "a"; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun port { 87*4882a593Smuzhiyun hdmi_in_con: endpoint { 88*4882a593Smuzhiyun remote-endpoint = <&adv7482_hdmi>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun hdmi0-out { 94*4882a593Smuzhiyun compatible = "hdmi-connector"; 95*4882a593Smuzhiyun label = "HDMI0 OUT"; 96*4882a593Smuzhiyun type = "a"; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun port { 99*4882a593Smuzhiyun hdmi0_con: endpoint { 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun hdmi1-out { 105*4882a593Smuzhiyun compatible = "hdmi-connector"; 106*4882a593Smuzhiyun label = "HDMI1 OUT"; 107*4882a593Smuzhiyun type = "a"; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun port { 110*4882a593Smuzhiyun hdmi1_con: endpoint { 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun keys { 116*4882a593Smuzhiyun compatible = "gpio-keys"; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun pinctrl-0 = <&keys_pins>; 119*4882a593Smuzhiyun pinctrl-names = "default"; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun key-1 { 122*4882a593Smuzhiyun gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; 123*4882a593Smuzhiyun linux,code = <KEY_1>; 124*4882a593Smuzhiyun label = "SW4-1"; 125*4882a593Smuzhiyun wakeup-source; 126*4882a593Smuzhiyun debounce-interval = <20>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun key-2 { 129*4882a593Smuzhiyun gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; 130*4882a593Smuzhiyun linux,code = <KEY_2>; 131*4882a593Smuzhiyun label = "SW4-2"; 132*4882a593Smuzhiyun wakeup-source; 133*4882a593Smuzhiyun debounce-interval = <20>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun key-3 { 136*4882a593Smuzhiyun gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; 137*4882a593Smuzhiyun linux,code = <KEY_3>; 138*4882a593Smuzhiyun label = "SW4-3"; 139*4882a593Smuzhiyun wakeup-source; 140*4882a593Smuzhiyun debounce-interval = <20>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun key-4 { 143*4882a593Smuzhiyun gpios = <&gpio5 23 GPIO_ACTIVE_LOW>; 144*4882a593Smuzhiyun linux,code = <KEY_4>; 145*4882a593Smuzhiyun label = "SW4-4"; 146*4882a593Smuzhiyun wakeup-source; 147*4882a593Smuzhiyun debounce-interval = <20>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun key-a { 150*4882a593Smuzhiyun gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 151*4882a593Smuzhiyun linux,code = <KEY_A>; 152*4882a593Smuzhiyun label = "TSW0"; 153*4882a593Smuzhiyun wakeup-source; 154*4882a593Smuzhiyun debounce-interval = <20>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun key-b { 157*4882a593Smuzhiyun gpios = <&gpio6 12 GPIO_ACTIVE_LOW>; 158*4882a593Smuzhiyun linux,code = <KEY_B>; 159*4882a593Smuzhiyun label = "TSW1"; 160*4882a593Smuzhiyun wakeup-source; 161*4882a593Smuzhiyun debounce-interval = <20>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun key-c { 164*4882a593Smuzhiyun gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; 165*4882a593Smuzhiyun linux,code = <KEY_C>; 166*4882a593Smuzhiyun label = "TSW2"; 167*4882a593Smuzhiyun wakeup-source; 168*4882a593Smuzhiyun debounce-interval = <20>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun reg_1p8v: regulator0 { 173*4882a593Smuzhiyun compatible = "regulator-fixed"; 174*4882a593Smuzhiyun regulator-name = "fixed-1.8V"; 175*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 176*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 177*4882a593Smuzhiyun regulator-boot-on; 178*4882a593Smuzhiyun regulator-always-on; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun reg_3p3v: regulator1 { 182*4882a593Smuzhiyun compatible = "regulator-fixed"; 183*4882a593Smuzhiyun regulator-name = "fixed-3.3V"; 184*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 185*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 186*4882a593Smuzhiyun regulator-boot-on; 187*4882a593Smuzhiyun regulator-always-on; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun reg_12v: regulator2 { 191*4882a593Smuzhiyun compatible = "regulator-fixed"; 192*4882a593Smuzhiyun regulator-name = "fixed-12V"; 193*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 194*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 195*4882a593Smuzhiyun regulator-boot-on; 196*4882a593Smuzhiyun regulator-always-on; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun sound_card: sound { 200*4882a593Smuzhiyun compatible = "audio-graph-card"; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun label = "rcar-sound"; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun dais = <&rsnd_port0>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun vbus0_usb2: regulator-vbus0-usb2 { 208*4882a593Smuzhiyun compatible = "regulator-fixed"; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun regulator-name = "USB20_VBUS0"; 211*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 212*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; 215*4882a593Smuzhiyun enable-active-high; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun vcc_sdhi0: regulator-vcc-sdhi0 { 219*4882a593Smuzhiyun compatible = "regulator-fixed"; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun regulator-name = "SDHI0 Vcc"; 222*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 223*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 226*4882a593Smuzhiyun enable-active-high; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun vccq_sdhi0: regulator-vccq-sdhi0 { 230*4882a593Smuzhiyun compatible = "regulator-gpio"; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun regulator-name = "SDHI0 VccQ"; 233*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 234*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 237*4882a593Smuzhiyun gpios-states = <1>; 238*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun vcc_sdhi3: regulator-vcc-sdhi3 { 242*4882a593Smuzhiyun compatible = "regulator-fixed"; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun regulator-name = "SDHI3 Vcc"; 245*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 246*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; 249*4882a593Smuzhiyun enable-active-high; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun vccq_sdhi3: regulator-vccq-sdhi3 { 253*4882a593Smuzhiyun compatible = "regulator-gpio"; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun regulator-name = "SDHI3 VccQ"; 256*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 257*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 260*4882a593Smuzhiyun gpios-states = <1>; 261*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun vga { 265*4882a593Smuzhiyun compatible = "vga-connector"; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun port { 268*4882a593Smuzhiyun vga_in: endpoint { 269*4882a593Smuzhiyun remote-endpoint = <&adv7123_out>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun vga-encoder { 275*4882a593Smuzhiyun compatible = "adi,adv7123"; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun ports { 278*4882a593Smuzhiyun #address-cells = <1>; 279*4882a593Smuzhiyun #size-cells = <0>; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun port@0 { 282*4882a593Smuzhiyun reg = <0>; 283*4882a593Smuzhiyun adv7123_in: endpoint { 284*4882a593Smuzhiyun remote-endpoint = <&du_out_rgb>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun port@1 { 288*4882a593Smuzhiyun reg = <1>; 289*4882a593Smuzhiyun adv7123_out: endpoint { 290*4882a593Smuzhiyun remote-endpoint = <&vga_in>; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun x12_clk: x12 { 297*4882a593Smuzhiyun compatible = "fixed-clock"; 298*4882a593Smuzhiyun #clock-cells = <0>; 299*4882a593Smuzhiyun clock-frequency = <24576000>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun /* External DU dot clocks */ 303*4882a593Smuzhiyun x21_clk: x21-clock { 304*4882a593Smuzhiyun compatible = "fixed-clock"; 305*4882a593Smuzhiyun #clock-cells = <0>; 306*4882a593Smuzhiyun clock-frequency = <33000000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun x22_clk: x22-clock { 310*4882a593Smuzhiyun compatible = "fixed-clock"; 311*4882a593Smuzhiyun #clock-cells = <0>; 312*4882a593Smuzhiyun clock-frequency = <33000000>; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun x23_clk: x23-clock { 316*4882a593Smuzhiyun compatible = "fixed-clock"; 317*4882a593Smuzhiyun #clock-cells = <0>; 318*4882a593Smuzhiyun clock-frequency = <25000000>; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun&audio_clk_a { 323*4882a593Smuzhiyun clock-frequency = <22579200>; 324*4882a593Smuzhiyun}; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun&avb { 327*4882a593Smuzhiyun pinctrl-0 = <&avb_pins>; 328*4882a593Smuzhiyun pinctrl-names = "default"; 329*4882a593Smuzhiyun phy-handle = <&phy0>; 330*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 331*4882a593Smuzhiyun status = "okay"; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun phy0: ethernet-phy@0 { 334*4882a593Smuzhiyun rxc-skew-ps = <1500>; 335*4882a593Smuzhiyun reg = <0>; 336*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 337*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 338*4882a593Smuzhiyun reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun}; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun&csi20 { 343*4882a593Smuzhiyun status = "okay"; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun ports { 346*4882a593Smuzhiyun port@0 { 347*4882a593Smuzhiyun reg = <0>; 348*4882a593Smuzhiyun csi20_in: endpoint { 349*4882a593Smuzhiyun clock-lanes = <0>; 350*4882a593Smuzhiyun data-lanes = <1>; 351*4882a593Smuzhiyun remote-endpoint = <&adv7482_txb>; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun}; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun&csi40 { 358*4882a593Smuzhiyun status = "okay"; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun ports { 361*4882a593Smuzhiyun port@0 { 362*4882a593Smuzhiyun reg = <0>; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun csi40_in: endpoint { 365*4882a593Smuzhiyun clock-lanes = <0>; 366*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 367*4882a593Smuzhiyun remote-endpoint = <&adv7482_txa>; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun}; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun&du { 374*4882a593Smuzhiyun pinctrl-0 = <&du_pins>; 375*4882a593Smuzhiyun pinctrl-names = "default"; 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun ports { 379*4882a593Smuzhiyun port@0 { 380*4882a593Smuzhiyun endpoint { 381*4882a593Smuzhiyun remote-endpoint = <&adv7123_in>; 382*4882a593Smuzhiyun }; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&ehci0 { 388*4882a593Smuzhiyun dr_mode = "otg"; 389*4882a593Smuzhiyun status = "okay"; 390*4882a593Smuzhiyun}; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun&ehci1 { 393*4882a593Smuzhiyun status = "okay"; 394*4882a593Smuzhiyun}; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun&extalr_clk { 397*4882a593Smuzhiyun clock-frequency = <32768>; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&hscif1 { 401*4882a593Smuzhiyun pinctrl-0 = <&hscif1_pins>; 402*4882a593Smuzhiyun pinctrl-names = "default"; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun uart-has-rtscts; 405*4882a593Smuzhiyun /* Please only enable hscif1 or scif1 */ 406*4882a593Smuzhiyun status = "okay"; 407*4882a593Smuzhiyun}; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun&hsusb { 410*4882a593Smuzhiyun dr_mode = "otg"; 411*4882a593Smuzhiyun status = "okay"; 412*4882a593Smuzhiyun}; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun&i2c2 { 415*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 416*4882a593Smuzhiyun pinctrl-names = "default"; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun status = "okay"; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun clock-frequency = <100000>; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun ak4613: codec@10 { 423*4882a593Smuzhiyun compatible = "asahi-kasei,ak4613"; 424*4882a593Smuzhiyun #sound-dai-cells = <0>; 425*4882a593Smuzhiyun reg = <0x10>; 426*4882a593Smuzhiyun clocks = <&rcar_sound 3>; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun asahi-kasei,in1-single-end; 429*4882a593Smuzhiyun asahi-kasei,in2-single-end; 430*4882a593Smuzhiyun asahi-kasei,out1-single-end; 431*4882a593Smuzhiyun asahi-kasei,out2-single-end; 432*4882a593Smuzhiyun asahi-kasei,out3-single-end; 433*4882a593Smuzhiyun asahi-kasei,out4-single-end; 434*4882a593Smuzhiyun asahi-kasei,out5-single-end; 435*4882a593Smuzhiyun asahi-kasei,out6-single-end; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun port { 438*4882a593Smuzhiyun ak4613_endpoint: endpoint { 439*4882a593Smuzhiyun remote-endpoint = <&rsnd_endpoint0>; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun cs2000: clk_multiplier@4f { 445*4882a593Smuzhiyun #clock-cells = <0>; 446*4882a593Smuzhiyun compatible = "cirrus,cs2000-cp"; 447*4882a593Smuzhiyun reg = <0x4f>; 448*4882a593Smuzhiyun clocks = <&audio_clkout>, <&x12_clk>; 449*4882a593Smuzhiyun clock-names = "clk_in", "ref_clk"; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun assigned-clocks = <&cs2000>; 452*4882a593Smuzhiyun assigned-clock-rates = <24576000>; /* 1/1 divide */ 453*4882a593Smuzhiyun }; 454*4882a593Smuzhiyun}; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun&i2c4 { 457*4882a593Smuzhiyun status = "okay"; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun pca9654: gpio@20 { 460*4882a593Smuzhiyun compatible = "onnn,pca9654"; 461*4882a593Smuzhiyun reg = <0x20>; 462*4882a593Smuzhiyun gpio-controller; 463*4882a593Smuzhiyun #gpio-cells = <2>; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun video-receiver@70 { 467*4882a593Smuzhiyun compatible = "adi,adv7482"; 468*4882a593Smuzhiyun reg = <0x70 0x71 0x72 0x73 0x74 0x75 469*4882a593Smuzhiyun 0x60 0x61 0x62 0x63 0x64 0x65>; 470*4882a593Smuzhiyun reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", 471*4882a593Smuzhiyun "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun #address-cells = <1>; 474*4882a593Smuzhiyun #size-cells = <0>; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 477*4882a593Smuzhiyun interrupt-names = "intrq1", "intrq2"; 478*4882a593Smuzhiyun interrupts = <30 IRQ_TYPE_LEVEL_LOW>, 479*4882a593Smuzhiyun <31 IRQ_TYPE_LEVEL_LOW>; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun port@7 { 482*4882a593Smuzhiyun reg = <7>; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun adv7482_ain7: endpoint { 485*4882a593Smuzhiyun remote-endpoint = <&cvbs_con>; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun port@8 { 490*4882a593Smuzhiyun reg = <8>; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun adv7482_hdmi: endpoint { 493*4882a593Smuzhiyun remote-endpoint = <&hdmi_in_con>; 494*4882a593Smuzhiyun }; 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun port@a { 498*4882a593Smuzhiyun reg = <10>; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun adv7482_txa: endpoint { 501*4882a593Smuzhiyun clock-lanes = <0>; 502*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 503*4882a593Smuzhiyun remote-endpoint = <&csi40_in>; 504*4882a593Smuzhiyun }; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun port@b { 508*4882a593Smuzhiyun reg = <11>; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun adv7482_txb: endpoint { 511*4882a593Smuzhiyun clock-lanes = <0>; 512*4882a593Smuzhiyun data-lanes = <1>; 513*4882a593Smuzhiyun remote-endpoint = <&csi20_in>; 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun csa_vdd: adc@7c { 519*4882a593Smuzhiyun compatible = "maxim,max9611"; 520*4882a593Smuzhiyun reg = <0x7c>; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun shunt-resistor-micro-ohms = <5000>; 523*4882a593Smuzhiyun }; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun csa_dvfs: adc@7f { 526*4882a593Smuzhiyun compatible = "maxim,max9611"; 527*4882a593Smuzhiyun reg = <0x7f>; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun shunt-resistor-micro-ohms = <5000>; 530*4882a593Smuzhiyun }; 531*4882a593Smuzhiyun}; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun&i2c_dvfs { 534*4882a593Smuzhiyun status = "okay"; 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun clock-frequency = <400000>; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun pmic: pmic@30 { 539*4882a593Smuzhiyun pinctrl-0 = <&irq0_pins>; 540*4882a593Smuzhiyun pinctrl-names = "default"; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun compatible = "rohm,bd9571mwv"; 543*4882a593Smuzhiyun reg = <0x30>; 544*4882a593Smuzhiyun interrupt-parent = <&intc_ex>; 545*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 546*4882a593Smuzhiyun interrupt-controller; 547*4882a593Smuzhiyun #interrupt-cells = <2>; 548*4882a593Smuzhiyun gpio-controller; 549*4882a593Smuzhiyun #gpio-cells = <2>; 550*4882a593Smuzhiyun rohm,ddr-backup-power = <0xf>; 551*4882a593Smuzhiyun rohm,rstbmode-level; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun regulators { 554*4882a593Smuzhiyun dvfs: dvfs { 555*4882a593Smuzhiyun regulator-name = "dvfs"; 556*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 557*4882a593Smuzhiyun regulator-max-microvolt = <1030000>; 558*4882a593Smuzhiyun regulator-boot-on; 559*4882a593Smuzhiyun regulator-always-on; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun }; 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun eeprom@50 { 565*4882a593Smuzhiyun compatible = "rohm,br24t01", "atmel,24c01"; 566*4882a593Smuzhiyun reg = <0x50>; 567*4882a593Smuzhiyun pagesize = <8>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun}; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun&ohci0 { 572*4882a593Smuzhiyun dr_mode = "otg"; 573*4882a593Smuzhiyun status = "okay"; 574*4882a593Smuzhiyun}; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun&ohci1 { 577*4882a593Smuzhiyun status = "okay"; 578*4882a593Smuzhiyun}; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun&pcie_bus_clk { 581*4882a593Smuzhiyun clock-frequency = <100000000>; 582*4882a593Smuzhiyun}; 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun&pciec0 { 585*4882a593Smuzhiyun status = "okay"; 586*4882a593Smuzhiyun}; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun&pciec1 { 589*4882a593Smuzhiyun status = "okay"; 590*4882a593Smuzhiyun}; 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun&pfc { 593*4882a593Smuzhiyun pinctrl-0 = <&scif_clk_pins>; 594*4882a593Smuzhiyun pinctrl-names = "default"; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun avb_pins: avb { 597*4882a593Smuzhiyun mux { 598*4882a593Smuzhiyun groups = "avb_link", "avb_mdio", "avb_mii"; 599*4882a593Smuzhiyun function = "avb"; 600*4882a593Smuzhiyun }; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun pins_mdio { 603*4882a593Smuzhiyun groups = "avb_mdio"; 604*4882a593Smuzhiyun drive-strength = <24>; 605*4882a593Smuzhiyun }; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun pins_mii_tx { 608*4882a593Smuzhiyun pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 609*4882a593Smuzhiyun "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 610*4882a593Smuzhiyun drive-strength = <12>; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun du_pins: du { 615*4882a593Smuzhiyun groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; 616*4882a593Smuzhiyun function = "du"; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun hscif1_pins: hscif1 { 620*4882a593Smuzhiyun groups = "hscif1_data_a", "hscif1_ctrl_a"; 621*4882a593Smuzhiyun function = "hscif1"; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun i2c2_pins: i2c2 { 625*4882a593Smuzhiyun groups = "i2c2_a"; 626*4882a593Smuzhiyun function = "i2c2"; 627*4882a593Smuzhiyun }; 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun irq0_pins: irq0 { 630*4882a593Smuzhiyun groups = "intc_ex_irq0"; 631*4882a593Smuzhiyun function = "intc_ex"; 632*4882a593Smuzhiyun }; 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun keys_pins: keys { 635*4882a593Smuzhiyun pins = "GP_5_17", "GP_5_20", "GP_5_22"; 636*4882a593Smuzhiyun bias-pull-up; 637*4882a593Smuzhiyun }; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun pwm1_pins: pwm1 { 640*4882a593Smuzhiyun groups = "pwm1_a"; 641*4882a593Smuzhiyun function = "pwm1"; 642*4882a593Smuzhiyun }; 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun scif1_pins: scif1 { 645*4882a593Smuzhiyun groups = "scif1_data_a", "scif1_ctrl"; 646*4882a593Smuzhiyun function = "scif1"; 647*4882a593Smuzhiyun }; 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun scif2_pins: scif2 { 650*4882a593Smuzhiyun groups = "scif2_data_a"; 651*4882a593Smuzhiyun function = "scif2"; 652*4882a593Smuzhiyun }; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun scif_clk_pins: scif_clk { 655*4882a593Smuzhiyun groups = "scif_clk_a"; 656*4882a593Smuzhiyun function = "scif_clk"; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun sdhi0_pins: sd0 { 660*4882a593Smuzhiyun groups = "sdhi0_data4", "sdhi0_ctrl"; 661*4882a593Smuzhiyun function = "sdhi0"; 662*4882a593Smuzhiyun power-source = <3300>; 663*4882a593Smuzhiyun }; 664*4882a593Smuzhiyun 665*4882a593Smuzhiyun sdhi0_pins_uhs: sd0_uhs { 666*4882a593Smuzhiyun groups = "sdhi0_data4", "sdhi0_ctrl"; 667*4882a593Smuzhiyun function = "sdhi0"; 668*4882a593Smuzhiyun power-source = <1800>; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun 671*4882a593Smuzhiyun sdhi2_pins: sd2 { 672*4882a593Smuzhiyun groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 673*4882a593Smuzhiyun function = "sdhi2"; 674*4882a593Smuzhiyun power-source = <1800>; 675*4882a593Smuzhiyun }; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun sdhi3_pins: sd3 { 678*4882a593Smuzhiyun groups = "sdhi3_data4", "sdhi3_ctrl"; 679*4882a593Smuzhiyun function = "sdhi3"; 680*4882a593Smuzhiyun power-source = <3300>; 681*4882a593Smuzhiyun }; 682*4882a593Smuzhiyun 683*4882a593Smuzhiyun sdhi3_pins_uhs: sd3_uhs { 684*4882a593Smuzhiyun groups = "sdhi3_data4", "sdhi3_ctrl"; 685*4882a593Smuzhiyun function = "sdhi3"; 686*4882a593Smuzhiyun power-source = <1800>; 687*4882a593Smuzhiyun }; 688*4882a593Smuzhiyun 689*4882a593Smuzhiyun sound_pins: sound { 690*4882a593Smuzhiyun groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 691*4882a593Smuzhiyun function = "ssi"; 692*4882a593Smuzhiyun }; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun sound_clk_pins: sound_clk { 695*4882a593Smuzhiyun groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 696*4882a593Smuzhiyun "audio_clkout_a", "audio_clkout3_a"; 697*4882a593Smuzhiyun function = "audio_clk"; 698*4882a593Smuzhiyun }; 699*4882a593Smuzhiyun 700*4882a593Smuzhiyun usb0_pins: usb0 { 701*4882a593Smuzhiyun groups = "usb0"; 702*4882a593Smuzhiyun function = "usb0"; 703*4882a593Smuzhiyun }; 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun usb1_pins: usb1 { 706*4882a593Smuzhiyun mux { 707*4882a593Smuzhiyun groups = "usb1"; 708*4882a593Smuzhiyun function = "usb1"; 709*4882a593Smuzhiyun }; 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun ovc { 712*4882a593Smuzhiyun pins = "GP_6_27"; 713*4882a593Smuzhiyun bias-pull-up; 714*4882a593Smuzhiyun }; 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun pwen { 717*4882a593Smuzhiyun pins = "GP_6_26"; 718*4882a593Smuzhiyun bias-pull-down; 719*4882a593Smuzhiyun }; 720*4882a593Smuzhiyun }; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun usb30_pins: usb30 { 723*4882a593Smuzhiyun groups = "usb30"; 724*4882a593Smuzhiyun function = "usb30"; 725*4882a593Smuzhiyun }; 726*4882a593Smuzhiyun}; 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun&pwm1 { 729*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pins>; 730*4882a593Smuzhiyun pinctrl-names = "default"; 731*4882a593Smuzhiyun 732*4882a593Smuzhiyun status = "okay"; 733*4882a593Smuzhiyun}; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun&rcar_sound { 736*4882a593Smuzhiyun pinctrl-0 = <&sound_pins &sound_clk_pins>; 737*4882a593Smuzhiyun pinctrl-names = "default"; 738*4882a593Smuzhiyun 739*4882a593Smuzhiyun /* Single DAI */ 740*4882a593Smuzhiyun #sound-dai-cells = <0>; 741*4882a593Smuzhiyun 742*4882a593Smuzhiyun /* audio_clkout0/1/2/3 */ 743*4882a593Smuzhiyun #clock-cells = <1>; 744*4882a593Smuzhiyun clock-frequency = <12288000 11289600>; 745*4882a593Smuzhiyun 746*4882a593Smuzhiyun status = "okay"; 747*4882a593Smuzhiyun 748*4882a593Smuzhiyun /* update <audio_clk_b> to <cs2000> */ 749*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 1005>, 750*4882a593Smuzhiyun <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 751*4882a593Smuzhiyun <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 752*4882a593Smuzhiyun <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 753*4882a593Smuzhiyun <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 754*4882a593Smuzhiyun <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 755*4882a593Smuzhiyun <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 756*4882a593Smuzhiyun <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 757*4882a593Smuzhiyun <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 758*4882a593Smuzhiyun <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 759*4882a593Smuzhiyun <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 760*4882a593Smuzhiyun <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 761*4882a593Smuzhiyun <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 762*4882a593Smuzhiyun <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 763*4882a593Smuzhiyun <&audio_clk_a>, <&cs2000>, 764*4882a593Smuzhiyun <&audio_clk_c>, 765*4882a593Smuzhiyun <&cpg CPG_CORE CPG_AUDIO_CLK_I>; 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun ports { 768*4882a593Smuzhiyun #address-cells = <1>; 769*4882a593Smuzhiyun #size-cells = <0>; 770*4882a593Smuzhiyun rsnd_port0: port@0 { 771*4882a593Smuzhiyun reg = <0>; 772*4882a593Smuzhiyun rsnd_endpoint0: endpoint { 773*4882a593Smuzhiyun remote-endpoint = <&ak4613_endpoint>; 774*4882a593Smuzhiyun 775*4882a593Smuzhiyun dai-format = "left_j"; 776*4882a593Smuzhiyun bitclock-master = <&rsnd_endpoint0>; 777*4882a593Smuzhiyun frame-master = <&rsnd_endpoint0>; 778*4882a593Smuzhiyun 779*4882a593Smuzhiyun playback = <&ssi0 &src0 &dvc0>; 780*4882a593Smuzhiyun capture = <&ssi1 &src1 &dvc1>; 781*4882a593Smuzhiyun }; 782*4882a593Smuzhiyun }; 783*4882a593Smuzhiyun }; 784*4882a593Smuzhiyun}; 785*4882a593Smuzhiyun 786*4882a593Smuzhiyun&rwdt { 787*4882a593Smuzhiyun timeout-sec = <60>; 788*4882a593Smuzhiyun status = "okay"; 789*4882a593Smuzhiyun}; 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun&scif1 { 792*4882a593Smuzhiyun pinctrl-0 = <&scif1_pins>; 793*4882a593Smuzhiyun pinctrl-names = "default"; 794*4882a593Smuzhiyun 795*4882a593Smuzhiyun uart-has-rtscts; 796*4882a593Smuzhiyun /* Please only enable hscif1 or scif1 */ 797*4882a593Smuzhiyun /* status = "okay"; */ 798*4882a593Smuzhiyun}; 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun&scif2 { 801*4882a593Smuzhiyun pinctrl-0 = <&scif2_pins>; 802*4882a593Smuzhiyun pinctrl-names = "default"; 803*4882a593Smuzhiyun 804*4882a593Smuzhiyun status = "okay"; 805*4882a593Smuzhiyun}; 806*4882a593Smuzhiyun 807*4882a593Smuzhiyun&scif_clk { 808*4882a593Smuzhiyun clock-frequency = <14745600>; 809*4882a593Smuzhiyun}; 810*4882a593Smuzhiyun 811*4882a593Smuzhiyun&sdhi0 { 812*4882a593Smuzhiyun pinctrl-0 = <&sdhi0_pins>; 813*4882a593Smuzhiyun pinctrl-1 = <&sdhi0_pins_uhs>; 814*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun vmmc-supply = <&vcc_sdhi0>; 817*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi0>; 818*4882a593Smuzhiyun cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 819*4882a593Smuzhiyun wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 820*4882a593Smuzhiyun bus-width = <4>; 821*4882a593Smuzhiyun sd-uhs-sdr50; 822*4882a593Smuzhiyun sd-uhs-sdr104; 823*4882a593Smuzhiyun status = "okay"; 824*4882a593Smuzhiyun}; 825*4882a593Smuzhiyun 826*4882a593Smuzhiyun&sdhi2 { 827*4882a593Smuzhiyun /* used for on-board 8bit eMMC */ 828*4882a593Smuzhiyun pinctrl-0 = <&sdhi2_pins>; 829*4882a593Smuzhiyun pinctrl-1 = <&sdhi2_pins>; 830*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun vmmc-supply = <®_3p3v>; 833*4882a593Smuzhiyun vqmmc-supply = <®_1p8v>; 834*4882a593Smuzhiyun bus-width = <8>; 835*4882a593Smuzhiyun mmc-hs200-1_8v; 836*4882a593Smuzhiyun mmc-hs400-1_8v; 837*4882a593Smuzhiyun non-removable; 838*4882a593Smuzhiyun fixed-emmc-driver-type = <1>; 839*4882a593Smuzhiyun full-pwr-cycle-in-suspend; 840*4882a593Smuzhiyun status = "okay"; 841*4882a593Smuzhiyun}; 842*4882a593Smuzhiyun 843*4882a593Smuzhiyun&sdhi3 { 844*4882a593Smuzhiyun pinctrl-0 = <&sdhi3_pins>; 845*4882a593Smuzhiyun pinctrl-1 = <&sdhi3_pins_uhs>; 846*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 847*4882a593Smuzhiyun 848*4882a593Smuzhiyun vmmc-supply = <&vcc_sdhi3>; 849*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi3>; 850*4882a593Smuzhiyun cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 851*4882a593Smuzhiyun wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; 852*4882a593Smuzhiyun bus-width = <4>; 853*4882a593Smuzhiyun sd-uhs-sdr50; 854*4882a593Smuzhiyun sd-uhs-sdr104; 855*4882a593Smuzhiyun status = "okay"; 856*4882a593Smuzhiyun}; 857*4882a593Smuzhiyun 858*4882a593Smuzhiyun&ssi1 { 859*4882a593Smuzhiyun shared-pin; 860*4882a593Smuzhiyun}; 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun&usb_extal_clk { 863*4882a593Smuzhiyun clock-frequency = <50000000>; 864*4882a593Smuzhiyun}; 865*4882a593Smuzhiyun 866*4882a593Smuzhiyun&usb2_phy0 { 867*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins>; 868*4882a593Smuzhiyun pinctrl-names = "default"; 869*4882a593Smuzhiyun 870*4882a593Smuzhiyun vbus-supply = <&vbus0_usb2>; 871*4882a593Smuzhiyun status = "okay"; 872*4882a593Smuzhiyun}; 873*4882a593Smuzhiyun 874*4882a593Smuzhiyun&usb2_phy1 { 875*4882a593Smuzhiyun pinctrl-0 = <&usb1_pins>; 876*4882a593Smuzhiyun pinctrl-names = "default"; 877*4882a593Smuzhiyun 878*4882a593Smuzhiyun status = "okay"; 879*4882a593Smuzhiyun}; 880*4882a593Smuzhiyun 881*4882a593Smuzhiyun&usb3_peri0 { 882*4882a593Smuzhiyun phys = <&usb3_phy0>; 883*4882a593Smuzhiyun phy-names = "usb"; 884*4882a593Smuzhiyun 885*4882a593Smuzhiyun companion = <&xhci0>; 886*4882a593Smuzhiyun 887*4882a593Smuzhiyun status = "okay"; 888*4882a593Smuzhiyun}; 889*4882a593Smuzhiyun 890*4882a593Smuzhiyun&usb3_phy0 { 891*4882a593Smuzhiyun status = "okay"; 892*4882a593Smuzhiyun}; 893*4882a593Smuzhiyun 894*4882a593Smuzhiyun&usb3s0_clk { 895*4882a593Smuzhiyun clock-frequency = <100000000>; 896*4882a593Smuzhiyun}; 897*4882a593Smuzhiyun 898*4882a593Smuzhiyun&vin0 { 899*4882a593Smuzhiyun status = "okay"; 900*4882a593Smuzhiyun}; 901*4882a593Smuzhiyun 902*4882a593Smuzhiyun&vin1 { 903*4882a593Smuzhiyun status = "okay"; 904*4882a593Smuzhiyun}; 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun&vin2 { 907*4882a593Smuzhiyun status = "okay"; 908*4882a593Smuzhiyun}; 909*4882a593Smuzhiyun 910*4882a593Smuzhiyun&vin3 { 911*4882a593Smuzhiyun status = "okay"; 912*4882a593Smuzhiyun}; 913*4882a593Smuzhiyun 914*4882a593Smuzhiyun&vin4 { 915*4882a593Smuzhiyun status = "okay"; 916*4882a593Smuzhiyun}; 917*4882a593Smuzhiyun 918*4882a593Smuzhiyun&vin5 { 919*4882a593Smuzhiyun status = "okay"; 920*4882a593Smuzhiyun}; 921*4882a593Smuzhiyun 922*4882a593Smuzhiyun&vin6 { 923*4882a593Smuzhiyun status = "okay"; 924*4882a593Smuzhiyun}; 925*4882a593Smuzhiyun 926*4882a593Smuzhiyun&vin7 { 927*4882a593Smuzhiyun status = "okay"; 928*4882a593Smuzhiyun}; 929*4882a593Smuzhiyun 930*4882a593Smuzhiyun&xhci0 { 931*4882a593Smuzhiyun pinctrl-0 = <&usb30_pins>; 932*4882a593Smuzhiyun pinctrl-names = "default"; 933*4882a593Smuzhiyun 934*4882a593Smuzhiyun status = "okay"; 935*4882a593Smuzhiyun}; 936