xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/hihope-common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
4*4882a593Smuzhiyun * HiHope RZ/G2[MN] Rev.[2.0/3.0/4.0] main board common parts
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2019 Renesas Electronics Corp.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	aliases {
13*4882a593Smuzhiyun		serial0 = &scif2;
14*4882a593Smuzhiyun		serial1 = &hscif0;
15*4882a593Smuzhiyun		mmc0 = &sdhi3;
16*4882a593Smuzhiyun		mmc1 = &sdhi0;
17*4882a593Smuzhiyun		mmc2 = &sdhi2;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	chosen {
21*4882a593Smuzhiyun		bootargs = "ignore_loglevel";
22*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	hdmi0-out {
26*4882a593Smuzhiyun		compatible = "hdmi-connector";
27*4882a593Smuzhiyun		type = "a";
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		port {
30*4882a593Smuzhiyun			hdmi0_con: endpoint {
31*4882a593Smuzhiyun				remote-endpoint = <&rcar_dw_hdmi0_out>;
32*4882a593Smuzhiyun			};
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	leds {
37*4882a593Smuzhiyun		compatible = "gpio-leds";
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		led1 {
40*4882a593Smuzhiyun			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
41*4882a593Smuzhiyun		};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		led2 {
44*4882a593Smuzhiyun			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		led3 {
48*4882a593Smuzhiyun			gpios = <&gpio0  0 GPIO_ACTIVE_HIGH>;
49*4882a593Smuzhiyun		};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		led4 {
52*4882a593Smuzhiyun			gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	reg_1p8v: regulator0 {
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun		regulator-name = "fixed-1.8V";
59*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
60*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
61*4882a593Smuzhiyun		regulator-boot-on;
62*4882a593Smuzhiyun		regulator-always-on;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	reg_3p3v: regulator1 {
66*4882a593Smuzhiyun		compatible = "regulator-fixed";
67*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
68*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
69*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
70*4882a593Smuzhiyun		regulator-boot-on;
71*4882a593Smuzhiyun		regulator-always-on;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	sound_card: sound {
75*4882a593Smuzhiyun		compatible = "audio-graph-card";
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		label = "rcar-sound";
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		dais = <&rsnd_port>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	vbus0_usb2: regulator-vbus0-usb2 {
83*4882a593Smuzhiyun		compatible = "regulator-fixed";
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		regulator-name = "USB20_VBUS0";
86*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
87*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
90*4882a593Smuzhiyun		enable-active-high;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	vccq_sdhi0: regulator-vccq-sdhi0 {
94*4882a593Smuzhiyun		compatible = "regulator-gpio";
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		regulator-name = "SDHI0 VccQ";
97*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
98*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
101*4882a593Smuzhiyun		gpios-states = <1>;
102*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	x302_clk: x302-clock {
106*4882a593Smuzhiyun		compatible = "fixed-clock";
107*4882a593Smuzhiyun		#clock-cells = <0>;
108*4882a593Smuzhiyun		clock-frequency = <33000000>;
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	x304_clk: x304-clock {
112*4882a593Smuzhiyun		compatible = "fixed-clock";
113*4882a593Smuzhiyun		#clock-cells = <0>;
114*4882a593Smuzhiyun		clock-frequency = <25000000>;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun&audio_clk_a {
119*4882a593Smuzhiyun	clock-frequency = <22579200>;
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&du {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&ehci0 {
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&ehci1 {
131*4882a593Smuzhiyun	status = "okay";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&extal_clk {
135*4882a593Smuzhiyun	clock-frequency = <16666666>;
136*4882a593Smuzhiyun};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun&extalr_clk {
139*4882a593Smuzhiyun	clock-frequency = <32768>;
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&gpio6 {
143*4882a593Smuzhiyun	usb1-reset {
144*4882a593Smuzhiyun		gpio-hog;
145*4882a593Smuzhiyun		gpios = <10 GPIO_ACTIVE_LOW>;
146*4882a593Smuzhiyun		output-low;
147*4882a593Smuzhiyun		line-name = "usb1-reset";
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&hdmi0 {
152*4882a593Smuzhiyun	status = "okay";
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	ports {
155*4882a593Smuzhiyun		port@1 {
156*4882a593Smuzhiyun			reg = <1>;
157*4882a593Smuzhiyun			rcar_dw_hdmi0_out: endpoint {
158*4882a593Smuzhiyun				remote-endpoint = <&hdmi0_con>;
159*4882a593Smuzhiyun			};
160*4882a593Smuzhiyun		};
161*4882a593Smuzhiyun		port@2 {
162*4882a593Smuzhiyun			reg = <2>;
163*4882a593Smuzhiyun			dw_hdmi0_snd_in: endpoint {
164*4882a593Smuzhiyun				remote-endpoint = <&rsnd_endpoint>;
165*4882a593Smuzhiyun			};
166*4882a593Smuzhiyun		};
167*4882a593Smuzhiyun	};
168*4882a593Smuzhiyun};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun&hscif0 {
171*4882a593Smuzhiyun	pinctrl-0 = <&hscif0_pins>;
172*4882a593Smuzhiyun	pinctrl-names = "default";
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	uart-has-rtscts;
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun&hsusb {
179*4882a593Smuzhiyun	dr_mode = "otg";
180*4882a593Smuzhiyun	status = "okay";
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun&i2c4 {
184*4882a593Smuzhiyun	clock-frequency = <400000>;
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	versaclock5: clock-generator@6a {
188*4882a593Smuzhiyun		compatible = "idt,5p49v5923";
189*4882a593Smuzhiyun		reg = <0x6a>;
190*4882a593Smuzhiyun		#clock-cells = <1>;
191*4882a593Smuzhiyun		clocks = <&x304_clk>;
192*4882a593Smuzhiyun		clock-names = "xin";
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&ohci0 {
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&ohci1 {
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&pcie_bus_clk {
205*4882a593Smuzhiyun	clock-frequency = <100000000>;
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&pfc {
209*4882a593Smuzhiyun	pinctrl-0 = <&scif_clk_pins>;
210*4882a593Smuzhiyun	pinctrl-names = "default";
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	hscif0_pins: hscif0 {
213*4882a593Smuzhiyun		groups = "hscif0_data", "hscif0_ctrl";
214*4882a593Smuzhiyun		function = "hscif0";
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	scif2_pins: scif2 {
218*4882a593Smuzhiyun		groups = "scif2_data_a";
219*4882a593Smuzhiyun		function = "scif2";
220*4882a593Smuzhiyun	};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun	scif_clk_pins: scif_clk {
223*4882a593Smuzhiyun		groups = "scif_clk_a";
224*4882a593Smuzhiyun		function = "scif_clk";
225*4882a593Smuzhiyun	};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun	sdhi0_pins: sd0 {
228*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
229*4882a593Smuzhiyun		function = "sdhi0";
230*4882a593Smuzhiyun		power-source = <3300>;
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	sdhi0_pins_uhs: sd0_uhs {
234*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
235*4882a593Smuzhiyun		function = "sdhi0";
236*4882a593Smuzhiyun		power-source = <1800>;
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun	sdhi2_pins: sd2 {
240*4882a593Smuzhiyun		groups = "sdhi2_data4", "sdhi2_ctrl";
241*4882a593Smuzhiyun		function = "sdhi2";
242*4882a593Smuzhiyun		power-source = <1800>;
243*4882a593Smuzhiyun	};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun	sdhi3_pins: sd3 {
246*4882a593Smuzhiyun		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
247*4882a593Smuzhiyun		function = "sdhi3";
248*4882a593Smuzhiyun		power-source = <1800>;
249*4882a593Smuzhiyun	};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun	usb0_pins: usb0 {
252*4882a593Smuzhiyun		groups = "usb0";
253*4882a593Smuzhiyun		function = "usb0";
254*4882a593Smuzhiyun	};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun	usb1_pins: usb1 {
257*4882a593Smuzhiyun		mux {
258*4882a593Smuzhiyun			groups = "usb1";
259*4882a593Smuzhiyun			function = "usb1";
260*4882a593Smuzhiyun		};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun		ovc {
263*4882a593Smuzhiyun			pins = "GP_6_27";
264*4882a593Smuzhiyun			bias-pull-up;
265*4882a593Smuzhiyun		};
266*4882a593Smuzhiyun	};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun	usb30_pins: usb30 {
269*4882a593Smuzhiyun		groups = "usb30";
270*4882a593Smuzhiyun		function = "usb30";
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun&rwdt {
275*4882a593Smuzhiyun	timeout-sec = <60>;
276*4882a593Smuzhiyun	status = "okay";
277*4882a593Smuzhiyun};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun&scif2 {
280*4882a593Smuzhiyun	pinctrl-0 = <&scif2_pins>;
281*4882a593Smuzhiyun	pinctrl-names = "default";
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun	status = "okay";
284*4882a593Smuzhiyun};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun&scif_clk {
287*4882a593Smuzhiyun	clock-frequency = <14745600>;
288*4882a593Smuzhiyun};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun&sdhi0 {
291*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>;
292*4882a593Smuzhiyun	pinctrl-1 = <&sdhi0_pins_uhs>;
293*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
296*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi0>;
297*4882a593Smuzhiyun	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
298*4882a593Smuzhiyun	bus-width = <4>;
299*4882a593Smuzhiyun	sd-uhs-sdr50;
300*4882a593Smuzhiyun	sd-uhs-sdr104;
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun&sdhi2 {
305*4882a593Smuzhiyun	status = "okay";
306*4882a593Smuzhiyun	pinctrl-0 = <&sdhi2_pins>;
307*4882a593Smuzhiyun	pinctrl-names = "default";
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun	vmmc-supply = <&wlan_en_reg>;
310*4882a593Smuzhiyun	bus-width = <4>;
311*4882a593Smuzhiyun	non-removable;
312*4882a593Smuzhiyun	cap-power-off-card;
313*4882a593Smuzhiyun	keep-power-in-suspend;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun	#address-cells = <1>;
316*4882a593Smuzhiyun	#size-cells = <0>;
317*4882a593Smuzhiyun	wlcore: wlcore@2 {
318*4882a593Smuzhiyun		compatible = "ti,wl1837";
319*4882a593Smuzhiyun		reg = <2>;
320*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
321*4882a593Smuzhiyun		interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
322*4882a593Smuzhiyun	};
323*4882a593Smuzhiyun};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun&sdhi3 {
326*4882a593Smuzhiyun	pinctrl-0 = <&sdhi3_pins>;
327*4882a593Smuzhiyun	pinctrl-1 = <&sdhi3_pins>;
328*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
331*4882a593Smuzhiyun	vqmmc-supply = <&reg_1p8v>;
332*4882a593Smuzhiyun	bus-width = <8>;
333*4882a593Smuzhiyun	mmc-hs200-1_8v;
334*4882a593Smuzhiyun	non-removable;
335*4882a593Smuzhiyun	fixed-emmc-driver-type = <1>;
336*4882a593Smuzhiyun	status = "okay";
337*4882a593Smuzhiyun};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun&usb_extal_clk {
340*4882a593Smuzhiyun	clock-frequency = <50000000>;
341*4882a593Smuzhiyun};
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun&usb2_phy0 {
344*4882a593Smuzhiyun	pinctrl-0 = <&usb0_pins>;
345*4882a593Smuzhiyun	pinctrl-names = "default";
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun	vbus-supply = <&vbus0_usb2>;
348*4882a593Smuzhiyun	status = "okay";
349*4882a593Smuzhiyun};
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun&usb2_phy1 {
352*4882a593Smuzhiyun	pinctrl-0 = <&usb1_pins>;
353*4882a593Smuzhiyun	pinctrl-names = "default";
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun	status = "okay";
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&usb3_peri0 {
359*4882a593Smuzhiyun	phys = <&usb3_phy0>;
360*4882a593Smuzhiyun	phy-names = "usb";
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun	companion = <&xhci0>;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun	status = "okay";
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&usb3_phy0 {
368*4882a593Smuzhiyun	status = "okay";
369*4882a593Smuzhiyun};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun&usb3s0_clk {
372*4882a593Smuzhiyun	clock-frequency = <100000000>;
373*4882a593Smuzhiyun};
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun&xhci0 {
376*4882a593Smuzhiyun	pinctrl-0 = <&usb30_pins>;
377*4882a593Smuzhiyun	pinctrl-names = "default";
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun};
381