xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2020, Compass Electronics Group, LLC
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	backlight_lvds: backlight-lvds {
11*4882a593Smuzhiyun		compatible = "pwm-backlight";
12*4882a593Smuzhiyun		power-supply = <&reg_lcd>;
13*4882a593Smuzhiyun		enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_LOW>;
14*4882a593Smuzhiyun		pwms = <&pwm2 0 50000>;
15*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
16*4882a593Smuzhiyun		default-brightness-level = <6>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	backlight_rgb: backlight-rgb {
20*4882a593Smuzhiyun		compatible = "pwm-backlight";
21*4882a593Smuzhiyun		power-supply = <&reg_lcd>;
22*4882a593Smuzhiyun		enable-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
23*4882a593Smuzhiyun		pwms = <&pwm0 0 50000>;
24*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
25*4882a593Smuzhiyun		default-brightness-level = <6>;
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	hdmi0-out {
29*4882a593Smuzhiyun		compatible = "hdmi-connector";
30*4882a593Smuzhiyun		type = "a";
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		port {
33*4882a593Smuzhiyun			hdmi0_con: endpoint {
34*4882a593Smuzhiyun				remote-endpoint = <&rcar_dw_hdmi0_out>;
35*4882a593Smuzhiyun			};
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	keys {
40*4882a593Smuzhiyun		compatible = "gpio-keys";
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun		key-1 {
43*4882a593Smuzhiyun			gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
44*4882a593Smuzhiyun			linux,code = <KEY_1>;
45*4882a593Smuzhiyun			label = "Switch-1";
46*4882a593Smuzhiyun			wakeup-source;
47*4882a593Smuzhiyun			debounce-interval = <20>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun		key-2 {
50*4882a593Smuzhiyun			gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
51*4882a593Smuzhiyun			linux,code = <KEY_2>;
52*4882a593Smuzhiyun			label = "Switch-2";
53*4882a593Smuzhiyun			wakeup-source;
54*4882a593Smuzhiyun			debounce-interval = <20>;
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun		key-3 {
57*4882a593Smuzhiyun			gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
58*4882a593Smuzhiyun			linux,code = <KEY_3>;
59*4882a593Smuzhiyun			label = "Switch-3";
60*4882a593Smuzhiyun			wakeup-source;
61*4882a593Smuzhiyun			debounce-interval = <20>;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun		key-4 {
64*4882a593Smuzhiyun			gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
65*4882a593Smuzhiyun			linux,code = <KEY_4>;
66*4882a593Smuzhiyun			label = "Switch-4";
67*4882a593Smuzhiyun			wakeup-source;
68*4882a593Smuzhiyun			debounce-interval = <20>;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun		key-5 {
71*4882a593Smuzhiyun			gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
72*4882a593Smuzhiyun			linux,code = <KEY_5>;
73*4882a593Smuzhiyun			label = "Switch-4";
74*4882a593Smuzhiyun			wakeup-source;
75*4882a593Smuzhiyun			debounce-interval = <20>;
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	leds {
80*4882a593Smuzhiyun		compatible = "gpio-leds";
81*4882a593Smuzhiyun		pinctrl-0 = <&led_pins>;
82*4882a593Smuzhiyun		pinctrl-names = "default";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		led0 {
85*4882a593Smuzhiyun			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
86*4882a593Smuzhiyun			label = "LED0";
87*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun		led1 {
90*4882a593Smuzhiyun			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
91*4882a593Smuzhiyun			label = "LED1";
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun		led2 {
94*4882a593Smuzhiyun			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
95*4882a593Smuzhiyun			label = "LED2";
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun		led3 {
98*4882a593Smuzhiyun			gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
99*4882a593Smuzhiyun			label = "LED3";
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	lvds {
104*4882a593Smuzhiyun		compatible = "panel-lvds";
105*4882a593Smuzhiyun		power-supply = <&reg_lcd_reset>;
106*4882a593Smuzhiyun		width-mm = <223>;
107*4882a593Smuzhiyun		height-mm = <125>;
108*4882a593Smuzhiyun		backlight = <&backlight_lvds>;
109*4882a593Smuzhiyun		data-mapping = "vesa-24";
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		panel-timing {
112*4882a593Smuzhiyun			/* 800x480@60Hz */
113*4882a593Smuzhiyun			clock-frequency = <30000000>;
114*4882a593Smuzhiyun			hactive = <800>;
115*4882a593Smuzhiyun			vactive = <480>;
116*4882a593Smuzhiyun			hsync-len = <48>;
117*4882a593Smuzhiyun			hfront-porch = <40>;
118*4882a593Smuzhiyun			hback-porch = <40>;
119*4882a593Smuzhiyun			vfront-porch = <13>;
120*4882a593Smuzhiyun			vback-porch = <29>;
121*4882a593Smuzhiyun			vsync-len = <3>;
122*4882a593Smuzhiyun			hsync-active = <1>;
123*4882a593Smuzhiyun			vsync-active = <1>;
124*4882a593Smuzhiyun			de-active = <1>;
125*4882a593Smuzhiyun			pixelclk-active = <0>;
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		port {
129*4882a593Smuzhiyun			panel_in: endpoint {
130*4882a593Smuzhiyun				remote-endpoint = <&lvds0_out>;
131*4882a593Smuzhiyun			};
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	rgb {
136*4882a593Smuzhiyun		/* Different LCD with compatible timings */
137*4882a593Smuzhiyun		compatible = "rocktech,rk070er9427";
138*4882a593Smuzhiyun		backlight = <&backlight_rgb>;
139*4882a593Smuzhiyun		enable-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
140*4882a593Smuzhiyun		power-supply = <&reg_lcd>;
141*4882a593Smuzhiyun		port {
142*4882a593Smuzhiyun			rgb_panel: endpoint {
143*4882a593Smuzhiyun				remote-endpoint = <&du_out_rgb>;
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	reg_audio: regulator-audio {
149*4882a593Smuzhiyun		compatible = "regulator-fixed";
150*4882a593Smuzhiyun		regulator-name = "audio-1.8V";
151*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
152*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
153*4882a593Smuzhiyun		gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>;
154*4882a593Smuzhiyun		enable-active-high;
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	reg_lcd: regulator-lcd {
158*4882a593Smuzhiyun		compatible = "regulator-fixed";
159*4882a593Smuzhiyun		regulator-name = "lcd_panel_pwr";
160*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
161*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
162*4882a593Smuzhiyun		gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
163*4882a593Smuzhiyun		enable-active-high;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	reg_lcd_reset: regulator-lcd-reset {
167*4882a593Smuzhiyun		compatible = "regulator-fixed";
168*4882a593Smuzhiyun		regulator-name = "nLCD_RESET";
169*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
170*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
171*4882a593Smuzhiyun		gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
172*4882a593Smuzhiyun		enable-active-high;
173*4882a593Smuzhiyun		vin-supply = <&reg_lcd>;
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	reg_cam0: regulator-cam0 {
177*4882a593Smuzhiyun		compatible = "regulator-fixed";
178*4882a593Smuzhiyun		regulator-name = "reg_cam0";
179*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
180*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
181*4882a593Smuzhiyun		gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
182*4882a593Smuzhiyun		enable-active-high;
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun	reg_cam1: regulator-cam1 {
186*4882a593Smuzhiyun		compatible = "regulator-fixed";
187*4882a593Smuzhiyun		regulator-name = "reg_cam1";
188*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
189*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
190*4882a593Smuzhiyun		gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
191*4882a593Smuzhiyun		enable-active-high;
192*4882a593Smuzhiyun		startup-delay-us = <100000>;
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	sound_card {
196*4882a593Smuzhiyun		compatible = "audio-graph-card";
197*4882a593Smuzhiyun		label = "rcar-sound";
198*4882a593Smuzhiyun		dais = <&rsnd_port0>, <&rsnd_port1>;
199*4882a593Smuzhiyun	};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun	vccq_sdhi0: regulator-vccq-sdhi0 {
202*4882a593Smuzhiyun		compatible = "regulator-gpio";
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		regulator-name = "SDHI0 VccQ";
205*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
206*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun		gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
209*4882a593Smuzhiyun		gpios-states = <1>;
210*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
211*4882a593Smuzhiyun		regulator-always-on;
212*4882a593Smuzhiyun	};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun	/* External DU dot clocks */
215*4882a593Smuzhiyun	x302_clk: x302-clock {
216*4882a593Smuzhiyun		compatible = "fixed-clock";
217*4882a593Smuzhiyun		#clock-cells = <0>;
218*4882a593Smuzhiyun		clock-frequency = <33000000>;
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun	x304_clk: x304-clock {
222*4882a593Smuzhiyun		compatible = "fixed-clock";
223*4882a593Smuzhiyun		#clock-cells = <0>;
224*4882a593Smuzhiyun		clock-frequency = <25000000>;
225*4882a593Smuzhiyun	};
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&audio_clk_a {
229*4882a593Smuzhiyun	clock-frequency = <24576000>;
230*4882a593Smuzhiyun	assigned-clocks = <&versaclock6_bb 4>;
231*4882a593Smuzhiyun	assigned-clock-rates = <24576000>;
232*4882a593Smuzhiyun};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun&audio_clk_b {
235*4882a593Smuzhiyun	clock-frequency = <22579200>;
236*4882a593Smuzhiyun};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun&can0 {
239*4882a593Smuzhiyun	pinctrl-0 = <&can0_pins>;
240*4882a593Smuzhiyun	pinctrl-names = "default";
241*4882a593Smuzhiyun	renesas,can-clock-select = <0x0>;
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&can1 {
246*4882a593Smuzhiyun	pinctrl-0 = <&can1_pins>;
247*4882a593Smuzhiyun	pinctrl-names = "default";
248*4882a593Smuzhiyun	renesas,can-clock-select = <0x0>;
249*4882a593Smuzhiyun	status = "okay";
250*4882a593Smuzhiyun};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun&du {
253*4882a593Smuzhiyun	pinctrl-0 = <&du_pins>;
254*4882a593Smuzhiyun	pinctrl-names = "default";
255*4882a593Smuzhiyun	status = "okay";
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 724>,
258*4882a593Smuzhiyun		<&cpg CPG_MOD 723>,
259*4882a593Smuzhiyun		<&cpg CPG_MOD 722>,
260*4882a593Smuzhiyun		<&versaclock5 1>,
261*4882a593Smuzhiyun		<&x302_clk>,
262*4882a593Smuzhiyun		<&versaclock5 2>;
263*4882a593Smuzhiyun	clock-names = "du.0", "du.1", "du.2",
264*4882a593Smuzhiyun		"dclkin.0", "dclkin.1", "dclkin.2";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&du_out_rgb {
268*4882a593Smuzhiyun	remote-endpoint = <&rgb_panel>;
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&ehci0 {
272*4882a593Smuzhiyun	dr_mode = "otg";
273*4882a593Smuzhiyun	status = "okay";
274*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
275*4882a593Smuzhiyun};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun&ehci1 {
278*4882a593Smuzhiyun	status = "okay";
279*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
280*4882a593Smuzhiyun};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun&hdmi0 {
283*4882a593Smuzhiyun	status = "okay";
284*4882a593Smuzhiyun	ports {
285*4882a593Smuzhiyun		#address-cells = <1>;
286*4882a593Smuzhiyun		#size-cells = <0>;
287*4882a593Smuzhiyun		port@0 {
288*4882a593Smuzhiyun			reg = <0>;
289*4882a593Smuzhiyun			dw_hdmi0_in: endpoint {
290*4882a593Smuzhiyun				remote-endpoint = <&du_out_hdmi0>;
291*4882a593Smuzhiyun			};
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun		port@1 {
294*4882a593Smuzhiyun			reg = <1>;
295*4882a593Smuzhiyun			rcar_dw_hdmi0_out: endpoint {
296*4882a593Smuzhiyun				remote-endpoint = <&hdmi0_con>;
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun		port@2 {
300*4882a593Smuzhiyun			reg = <2>;
301*4882a593Smuzhiyun			dw_hdmi0_snd_in: endpoint {
302*4882a593Smuzhiyun				remote-endpoint = <&rsnd_endpoint1>;
303*4882a593Smuzhiyun			};
304*4882a593Smuzhiyun		};
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun&hscif1 {
309*4882a593Smuzhiyun	pinctrl-0 = <&hscif1_pins>;
310*4882a593Smuzhiyun	pinctrl-names = "default";
311*4882a593Smuzhiyun	uart-has-rtscts;
312*4882a593Smuzhiyun	status = "okay";
313*4882a593Smuzhiyun};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun&hsusb {
316*4882a593Smuzhiyun	dr_mode = "otg";
317*4882a593Smuzhiyun	status = "okay";
318*4882a593Smuzhiyun};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun&i2c2 {
321*4882a593Smuzhiyun	status = "okay";
322*4882a593Smuzhiyun	clock-frequency = <100000>;
323*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
324*4882a593Smuzhiyun	pinctrl-names = "default";
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun	gpio_exp2: gpio@21 {
327*4882a593Smuzhiyun		compatible = "onnn,pca9654";
328*4882a593Smuzhiyun		reg = <0x21>;
329*4882a593Smuzhiyun		gpio-controller;
330*4882a593Smuzhiyun		#gpio-cells = <2>;
331*4882a593Smuzhiyun	};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun	gpio_exp3: gpio@22 {
334*4882a593Smuzhiyun		compatible = "onnn,pca9654";
335*4882a593Smuzhiyun		reg = <0x22>;
336*4882a593Smuzhiyun		gpio-controller;
337*4882a593Smuzhiyun		#gpio-cells = <2>;
338*4882a593Smuzhiyun	};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun	gpio_exp4: gpio@23 {
341*4882a593Smuzhiyun		compatible = "onnn,pca9654";
342*4882a593Smuzhiyun		reg = <0x23>;
343*4882a593Smuzhiyun		gpio-controller;
344*4882a593Smuzhiyun		#gpio-cells = <2>;
345*4882a593Smuzhiyun	};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun	versaclock6_bb: clock-controller@6a {
348*4882a593Smuzhiyun		compatible = "idt,5p49v6965";
349*4882a593Smuzhiyun		reg = <0x6a>;
350*4882a593Smuzhiyun		#clock-cells = <1>;
351*4882a593Smuzhiyun		clocks = <&x304_clk>;
352*4882a593Smuzhiyun		clock-names = "xin";
353*4882a593Smuzhiyun		/* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */
354*4882a593Smuzhiyun		assigned-clocks = <&versaclock6_bb 1>,
355*4882a593Smuzhiyun				   <&versaclock6_bb 2>,
356*4882a593Smuzhiyun				   <&versaclock6_bb 3>,
357*4882a593Smuzhiyun				   <&versaclock6_bb 4>;
358*4882a593Smuzhiyun		assigned-clock-rates =	<24000000>, <24000000>, <24000000>, <24576000>;
359*4882a593Smuzhiyun	};
360*4882a593Smuzhiyun};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun&i2c0 {
363*4882a593Smuzhiyun	status = "okay";
364*4882a593Smuzhiyun	clock-frequency = <400000>;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins>;
367*4882a593Smuzhiyun	pinctrl-names = "default";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&i2c5 {
371*4882a593Smuzhiyun	status = "okay";
372*4882a593Smuzhiyun	clock-frequency = <100000>;
373*4882a593Smuzhiyun	pinctrl-0 = <&i2c5_pins>;
374*4882a593Smuzhiyun	pinctrl-names = "default";
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun	codec: wm8962@1a {
377*4882a593Smuzhiyun		compatible = "wlf,wm8962";
378*4882a593Smuzhiyun		reg = <0x1a>;
379*4882a593Smuzhiyun		DCVDD-supply = <&reg_audio>;
380*4882a593Smuzhiyun		DBVDD-supply = <&reg_audio>;
381*4882a593Smuzhiyun		AVDD-supply = <&reg_audio>;
382*4882a593Smuzhiyun		CPVDD-supply = <&reg_audio>;
383*4882a593Smuzhiyun		MICVDD-supply = <&reg_audio>;
384*4882a593Smuzhiyun		PLLVDD-supply = <&reg_audio>;
385*4882a593Smuzhiyun		SPKVDD1-supply = <&reg_audio>;
386*4882a593Smuzhiyun		SPKVDD2-supply = <&reg_audio>;
387*4882a593Smuzhiyun		gpio-cfg = <
388*4882a593Smuzhiyun			0x0000 /* 0:Default */
389*4882a593Smuzhiyun			0x0000 /* 1:Default */
390*4882a593Smuzhiyun			0x0000 /* 2:Default */
391*4882a593Smuzhiyun			0x0000 /* 3:Default */
392*4882a593Smuzhiyun			0x0000 /* 4:Default */
393*4882a593Smuzhiyun			0x0000 /* 5:Default */
394*4882a593Smuzhiyun		>;
395*4882a593Smuzhiyun		port {
396*4882a593Smuzhiyun			wm8962_endpoint: endpoint {
397*4882a593Smuzhiyun				remote-endpoint = <&rsnd_endpoint0>;
398*4882a593Smuzhiyun			};
399*4882a593Smuzhiyun		};
400*4882a593Smuzhiyun	};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun	/* 0 - lcd_reset */
403*4882a593Smuzhiyun	/* 1 - lcd_pwr */
404*4882a593Smuzhiyun	/* 2 - lcd_select */
405*4882a593Smuzhiyun	/* 3 - backlight-enable */
406*4882a593Smuzhiyun	/* 4 - Touch_shdwn */
407*4882a593Smuzhiyun	/* 5 - LCD_H_pol */
408*4882a593Smuzhiyun	/* 6 - lcd_V_pol */
409*4882a593Smuzhiyun	gpio_exp1: gpio@20 {
410*4882a593Smuzhiyun		compatible = "onnn,pca9654";
411*4882a593Smuzhiyun		reg = <0x20>;
412*4882a593Smuzhiyun		gpio-controller;
413*4882a593Smuzhiyun		#gpio-cells = <2>;
414*4882a593Smuzhiyun	};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun	touchscreen@26 {
417*4882a593Smuzhiyun		compatible = "ilitek,ili2117";
418*4882a593Smuzhiyun		reg = <0x26>;
419*4882a593Smuzhiyun		interrupt-parent = <&gpio5>;
420*4882a593Smuzhiyun		interrupts = <9 IRQ_TYPE_EDGE_RISING>;
421*4882a593Smuzhiyun		wakeup-source;
422*4882a593Smuzhiyun	};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun	hd3ss3220@47 {
425*4882a593Smuzhiyun		compatible = "ti,hd3ss3220";
426*4882a593Smuzhiyun		reg = <0x47>;
427*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
428*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun		connector {
431*4882a593Smuzhiyun			compatible = "usb-c-connector";
432*4882a593Smuzhiyun			label = "USB-C";
433*4882a593Smuzhiyun			data-role = "dual";
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun			ports {
436*4882a593Smuzhiyun				#address-cells = <1>;
437*4882a593Smuzhiyun				#size-cells = <0>;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun				port@1 {
440*4882a593Smuzhiyun					reg = <1>;
441*4882a593Smuzhiyun					hd3ss3220_ep: endpoint {
442*4882a593Smuzhiyun						remote-endpoint = <&usb3_role_switch>;
443*4882a593Smuzhiyun					};
444*4882a593Smuzhiyun				};
445*4882a593Smuzhiyun			};
446*4882a593Smuzhiyun		};
447*4882a593Smuzhiyun	};
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&lvds0 {
451*4882a593Smuzhiyun	status = "okay";
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun	ports {
454*4882a593Smuzhiyun		port@1 {
455*4882a593Smuzhiyun			lvds0_out: endpoint {
456*4882a593Smuzhiyun				remote-endpoint = <&panel_in>;
457*4882a593Smuzhiyun			};
458*4882a593Smuzhiyun		};
459*4882a593Smuzhiyun	};
460*4882a593Smuzhiyun};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun&ohci0 {
463*4882a593Smuzhiyun	dr_mode = "otg";
464*4882a593Smuzhiyun	status = "okay";
465*4882a593Smuzhiyun};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun&ohci1 {
468*4882a593Smuzhiyun	status = "okay";
469*4882a593Smuzhiyun};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun&pciec0 {
472*4882a593Smuzhiyun	status = "okay";
473*4882a593Smuzhiyun};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun&pciec1 {
476*4882a593Smuzhiyun	status = "okay";
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&pcie_bus_clk {
480*4882a593Smuzhiyun	clock-frequency = <100000000>;
481*4882a593Smuzhiyun};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun&pfc {
484*4882a593Smuzhiyun	can0_pins: can0 {
485*4882a593Smuzhiyun		groups = "can0_data_a";
486*4882a593Smuzhiyun		function = "can0";
487*4882a593Smuzhiyun	};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun	can1_pins: can1 {
490*4882a593Smuzhiyun		groups = "can1_data";
491*4882a593Smuzhiyun		function = "can1";
492*4882a593Smuzhiyun	};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun	du_pins: du {
495*4882a593Smuzhiyun		groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
496*4882a593Smuzhiyun		function = "du";
497*4882a593Smuzhiyun	};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun	i2c2_pins: i2c2 {
500*4882a593Smuzhiyun		groups = "i2c2_a";
501*4882a593Smuzhiyun		function = "i2c2";
502*4882a593Smuzhiyun	};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun	i2c5_pins: i2c5 {
505*4882a593Smuzhiyun		groups = "i2c5";
506*4882a593Smuzhiyun		function = "i2c5";
507*4882a593Smuzhiyun	};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun	led_pins: leds {
510*4882a593Smuzhiyun		/* GP_0_4 , AVS1, AVS2, GP_7_3 */
511*4882a593Smuzhiyun		pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
512*4882a593Smuzhiyun		bias-pull-down;
513*4882a593Smuzhiyun	};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun	pwm0_pins: pwm0 {
516*4882a593Smuzhiyun		groups = "pwm0";
517*4882a593Smuzhiyun		function = "pwm0";
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun	pwm2_pins: pwm2 {
521*4882a593Smuzhiyun		groups = "pwm2_a";
522*4882a593Smuzhiyun		function = "pwm2_a";
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	sdhi0_pins: sd0 {
526*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
527*4882a593Smuzhiyun		function = "sdhi0";
528*4882a593Smuzhiyun		power-source = <3300>;
529*4882a593Smuzhiyun	};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun	sdhi0_pins_uhs: sd0_uhs {
532*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
533*4882a593Smuzhiyun		function = "sdhi0";
534*4882a593Smuzhiyun		power-source = <1800>;
535*4882a593Smuzhiyun	};
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun	sound_pins: sound {
538*4882a593Smuzhiyun		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
539*4882a593Smuzhiyun		function = "ssi";
540*4882a593Smuzhiyun	};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun	sound_clk_pins: sound_clk {
543*4882a593Smuzhiyun		groups = "audio_clk_a_a";
544*4882a593Smuzhiyun		function = "audio_clk";
545*4882a593Smuzhiyun	};
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun	usb0_pins: usb0 {
548*4882a593Smuzhiyun		mux {
549*4882a593Smuzhiyun			groups = "usb0";
550*4882a593Smuzhiyun			function = "usb0";
551*4882a593Smuzhiyun		};
552*4882a593Smuzhiyun	};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun	usb1_pins: usb1 {
555*4882a593Smuzhiyun		mux {
556*4882a593Smuzhiyun			groups = "usb1";
557*4882a593Smuzhiyun			function = "usb1";
558*4882a593Smuzhiyun		};
559*4882a593Smuzhiyun	};
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun	usb30_pins: usb30 {
562*4882a593Smuzhiyun		mux {
563*4882a593Smuzhiyun			groups = "usb30";
564*4882a593Smuzhiyun			function = "usb30";
565*4882a593Smuzhiyun		};
566*4882a593Smuzhiyun	};
567*4882a593Smuzhiyun};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun&pwm0 {
570*4882a593Smuzhiyun	pinctrl-0 = <&pwm0_pins>;
571*4882a593Smuzhiyun	pinctrl-names = "default";
572*4882a593Smuzhiyun	status = "okay";
573*4882a593Smuzhiyun};
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun&pwm2 {
576*4882a593Smuzhiyun	pinctrl-0 = <&pwm2_pins>;
577*4882a593Smuzhiyun	pinctrl-names = "default";
578*4882a593Smuzhiyun	status = "okay";
579*4882a593Smuzhiyun};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun&rcar_sound {
582*4882a593Smuzhiyun	pinctrl-0 = <&sound_pins &sound_clk_pins>;
583*4882a593Smuzhiyun	pinctrl-names = "default";
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun	/* Single DAI */
586*4882a593Smuzhiyun	#sound-dai-cells = <0>;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun	/* audio_clkout0/1/2/3 */
589*4882a593Smuzhiyun	#clock-cells = <1>;
590*4882a593Smuzhiyun	clock-frequency = <11289600>;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun	status = "okay";
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 1005>,
595*4882a593Smuzhiyun		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
596*4882a593Smuzhiyun		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
597*4882a593Smuzhiyun		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
598*4882a593Smuzhiyun		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
599*4882a593Smuzhiyun		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
600*4882a593Smuzhiyun		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
601*4882a593Smuzhiyun		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
602*4882a593Smuzhiyun		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
603*4882a593Smuzhiyun		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
604*4882a593Smuzhiyun		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
605*4882a593Smuzhiyun		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
606*4882a593Smuzhiyun		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
607*4882a593Smuzhiyun		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
608*4882a593Smuzhiyun		 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
609*4882a593Smuzhiyun		 <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun	ports {
612*4882a593Smuzhiyun		#address-cells = <1>;
613*4882a593Smuzhiyun		#size-cells = <0>;
614*4882a593Smuzhiyun		rsnd_port0: port@0 {
615*4882a593Smuzhiyun			reg = <0>;
616*4882a593Smuzhiyun			rsnd_endpoint0: endpoint {
617*4882a593Smuzhiyun				remote-endpoint = <&wm8962_endpoint>;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun				dai-format = "i2s";
620*4882a593Smuzhiyun				bitclock-master = <&rsnd_endpoint0>;
621*4882a593Smuzhiyun				frame-master = <&rsnd_endpoint0>;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun				playback = <&ssi1 &dvc1 &src1>;
624*4882a593Smuzhiyun				capture = <&ssi0>;
625*4882a593Smuzhiyun			};
626*4882a593Smuzhiyun		};
627*4882a593Smuzhiyun		rsnd_port1: port@1 {
628*4882a593Smuzhiyun		    reg = <0x01>;
629*4882a593Smuzhiyun			rsnd_endpoint1: endpoint {
630*4882a593Smuzhiyun				remote-endpoint = <&dw_hdmi0_snd_in>;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun				dai-format = "i2s";
633*4882a593Smuzhiyun				bitclock-master = <&rsnd_endpoint1>;
634*4882a593Smuzhiyun				frame-master = <&rsnd_endpoint1>;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun				playback = <&ssi2>;
637*4882a593Smuzhiyun			};
638*4882a593Smuzhiyun		};
639*4882a593Smuzhiyun	};
640*4882a593Smuzhiyun};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun&rwdt {
643*4882a593Smuzhiyun	status = "okay";
644*4882a593Smuzhiyun	timeout-sec = <60>;
645*4882a593Smuzhiyun};
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun&scif0 {
648*4882a593Smuzhiyun	pinctrl-0 = <&scif0_pins>;
649*4882a593Smuzhiyun	pinctrl-names = "default";
650*4882a593Smuzhiyun	status = "okay";
651*4882a593Smuzhiyun};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun&scif5 {
654*4882a593Smuzhiyun	pinctrl-0 = <&scif5_pins>;
655*4882a593Smuzhiyun	pinctrl-names = "default";
656*4882a593Smuzhiyun	status = "okay";
657*4882a593Smuzhiyun};
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun&scif_clk {
660*4882a593Smuzhiyun	clock-frequency = <14745600>;
661*4882a593Smuzhiyun};
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun&sdhi0 {
664*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>;
665*4882a593Smuzhiyun	pinctrl-1 = <&sdhi0_pins_uhs>;
666*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
667*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
668*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi0>;
669*4882a593Smuzhiyun	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
670*4882a593Smuzhiyun	bus-width = <4>;
671*4882a593Smuzhiyun	sd-uhs-sdr50;
672*4882a593Smuzhiyun	sd-uhs-sdr104;
673*4882a593Smuzhiyun	status = "okay";
674*4882a593Smuzhiyun};
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun&ssi1 {
677*4882a593Smuzhiyun	shared-pin;
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun&tmu0 {
681*4882a593Smuzhiyun	status = "okay";
682*4882a593Smuzhiyun};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun&tmu1 {
685*4882a593Smuzhiyun	status = "okay";
686*4882a593Smuzhiyun};
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun&tmu2 {
689*4882a593Smuzhiyun	status = "okay";
690*4882a593Smuzhiyun};
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun&tmu3 {
693*4882a593Smuzhiyun	status = "okay";
694*4882a593Smuzhiyun};
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun&tmu4 {
697*4882a593Smuzhiyun	status = "okay";
698*4882a593Smuzhiyun};
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun&usb2_phy0 {
701*4882a593Smuzhiyun	pinctrl-0 = <&usb0_pins>;
702*4882a593Smuzhiyun	pinctrl-names = "default";
703*4882a593Smuzhiyun	status = "okay";
704*4882a593Smuzhiyun};
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun&usb2_phy1 {
707*4882a593Smuzhiyun	pinctrl-0 = <&usb1_pins>;
708*4882a593Smuzhiyun	pinctrl-names = "default";
709*4882a593Smuzhiyun	status = "okay";
710*4882a593Smuzhiyun};
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun&usb3_peri0 {
713*4882a593Smuzhiyun	companion = <&xhci0>;
714*4882a593Smuzhiyun	status = "okay";
715*4882a593Smuzhiyun	usb-role-switch;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun	port {
718*4882a593Smuzhiyun		usb3_role_switch: endpoint {
719*4882a593Smuzhiyun			remote-endpoint = <&hd3ss3220_ep>;
720*4882a593Smuzhiyun		};
721*4882a593Smuzhiyun	};
722*4882a593Smuzhiyun};
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun&usb3_phy0 {
725*4882a593Smuzhiyun	status = "okay";
726*4882a593Smuzhiyun};
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun&vin0 {
729*4882a593Smuzhiyun	status = "okay";
730*4882a593Smuzhiyun};
731*4882a593Smuzhiyun&vin1 {
732*4882a593Smuzhiyun	status = "okay";
733*4882a593Smuzhiyun};
734*4882a593Smuzhiyun&vin2 {
735*4882a593Smuzhiyun	status = "okay";
736*4882a593Smuzhiyun};
737*4882a593Smuzhiyun&vin3 {
738*4882a593Smuzhiyun	status = "okay";
739*4882a593Smuzhiyun};
740*4882a593Smuzhiyun&vin4 {
741*4882a593Smuzhiyun	status = "okay";
742*4882a593Smuzhiyun};
743*4882a593Smuzhiyun&vin5 {
744*4882a593Smuzhiyun	status = "okay";
745*4882a593Smuzhiyun};
746*4882a593Smuzhiyun&vin6 {
747*4882a593Smuzhiyun	status = "okay";
748*4882a593Smuzhiyun};
749*4882a593Smuzhiyun&vin7 {
750*4882a593Smuzhiyun	status = "okay";
751*4882a593Smuzhiyun};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun&xhci0
754*4882a593Smuzhiyun{
755*4882a593Smuzhiyun	pinctrl-0 = <&usb30_pins>;
756*4882a593Smuzhiyun	pinctrl-names = "default";
757*4882a593Smuzhiyun	status = "okay";
758*4882a593Smuzhiyun};
759