xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/sdm845-mtp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * SDM845 MTP board device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12*4882a593Smuzhiyun#include "sdm845.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Qualcomm Technologies, Inc. SDM845 MTP";
16*4882a593Smuzhiyun	compatible = "qcom,sdm845-mtp", "qcom,sdm845";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	aliases {
19*4882a593Smuzhiyun		serial0 = &uart9;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	chosen {
23*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	vph_pwr: vph-pwr-regulator {
27*4882a593Smuzhiyun		compatible = "regulator-fixed";
28*4882a593Smuzhiyun		regulator-name = "vph_pwr";
29*4882a593Smuzhiyun		regulator-min-microvolt = <3700000>;
30*4882a593Smuzhiyun		regulator-max-microvolt = <3700000>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	/*
34*4882a593Smuzhiyun	 * Apparently RPMh does not provide support for PM8998 S4 because it
35*4882a593Smuzhiyun	 * is always-on; model it as a fixed regulator.
36*4882a593Smuzhiyun	 */
37*4882a593Smuzhiyun	vreg_s4a_1p8: pm8998-smps4 {
38*4882a593Smuzhiyun		compatible = "regulator-fixed";
39*4882a593Smuzhiyun		regulator-name = "vreg_s4a_1p8";
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
42*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		regulator-always-on;
45*4882a593Smuzhiyun		regulator-boot-on;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		vin-supply = <&vph_pwr>;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&adsp_pas {
52*4882a593Smuzhiyun	status = "okay";
53*4882a593Smuzhiyun	firmware-name = "qcom/sdm845/adsp.mdt";
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&apps_rsc {
57*4882a593Smuzhiyun	pm8998-rpmh-regulators {
58*4882a593Smuzhiyun		compatible = "qcom,pm8998-rpmh-regulators";
59*4882a593Smuzhiyun		qcom,pmic-id = "a";
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		vdd-s1-supply = <&vph_pwr>;
62*4882a593Smuzhiyun		vdd-s2-supply = <&vph_pwr>;
63*4882a593Smuzhiyun		vdd-s3-supply = <&vph_pwr>;
64*4882a593Smuzhiyun		vdd-s4-supply = <&vph_pwr>;
65*4882a593Smuzhiyun		vdd-s5-supply = <&vph_pwr>;
66*4882a593Smuzhiyun		vdd-s6-supply = <&vph_pwr>;
67*4882a593Smuzhiyun		vdd-s7-supply = <&vph_pwr>;
68*4882a593Smuzhiyun		vdd-s8-supply = <&vph_pwr>;
69*4882a593Smuzhiyun		vdd-s9-supply = <&vph_pwr>;
70*4882a593Smuzhiyun		vdd-s10-supply = <&vph_pwr>;
71*4882a593Smuzhiyun		vdd-s11-supply = <&vph_pwr>;
72*4882a593Smuzhiyun		vdd-s12-supply = <&vph_pwr>;
73*4882a593Smuzhiyun		vdd-s13-supply = <&vph_pwr>;
74*4882a593Smuzhiyun		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
75*4882a593Smuzhiyun		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
76*4882a593Smuzhiyun		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
77*4882a593Smuzhiyun		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
78*4882a593Smuzhiyun		vdd-l6-supply = <&vph_pwr>;
79*4882a593Smuzhiyun		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
80*4882a593Smuzhiyun		vdd-l9-supply = <&vreg_bob>;
81*4882a593Smuzhiyun		vdd-l10-l23-l25-supply = <&vreg_bob>;
82*4882a593Smuzhiyun		vdd-l13-l19-l21-supply = <&vreg_bob>;
83*4882a593Smuzhiyun		vdd-l16-l28-supply = <&vreg_bob>;
84*4882a593Smuzhiyun		vdd-l18-l22-supply = <&vreg_bob>;
85*4882a593Smuzhiyun		vdd-l20-l24-supply = <&vreg_bob>;
86*4882a593Smuzhiyun		vdd-l26-supply = <&vreg_s3a_1p35>;
87*4882a593Smuzhiyun		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		vreg_s2a_1p125: smps2 {
90*4882a593Smuzhiyun			regulator-min-microvolt = <1100000>;
91*4882a593Smuzhiyun			regulator-max-microvolt = <1100000>;
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		vreg_s3a_1p35: smps3 {
95*4882a593Smuzhiyun			regulator-min-microvolt = <1352000>;
96*4882a593Smuzhiyun			regulator-max-microvolt = <1352000>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		vreg_s5a_2p04: smps5 {
100*4882a593Smuzhiyun			regulator-min-microvolt = <1904000>;
101*4882a593Smuzhiyun			regulator-max-microvolt = <2040000>;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		vreg_s7a_1p025: smps7 {
105*4882a593Smuzhiyun			regulator-min-microvolt = <900000>;
106*4882a593Smuzhiyun			regulator-max-microvolt = <1028000>;
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		vdd_qusb_hs0:
110*4882a593Smuzhiyun		vdda_hp_pcie_core:
111*4882a593Smuzhiyun		vdda_mipi_csi0_0p9:
112*4882a593Smuzhiyun		vdda_mipi_csi1_0p9:
113*4882a593Smuzhiyun		vdda_mipi_csi2_0p9:
114*4882a593Smuzhiyun		vdda_mipi_dsi0_pll:
115*4882a593Smuzhiyun		vdda_mipi_dsi1_pll:
116*4882a593Smuzhiyun		vdda_qlink_lv:
117*4882a593Smuzhiyun		vdda_qlink_lv_ck:
118*4882a593Smuzhiyun		vdda_qrefs_0p875:
119*4882a593Smuzhiyun		vdda_pcie_core:
120*4882a593Smuzhiyun		vdda_pll_cc_ebi01:
121*4882a593Smuzhiyun		vdda_pll_cc_ebi23:
122*4882a593Smuzhiyun		vdda_sp_sensor:
123*4882a593Smuzhiyun		vdda_ufs1_core:
124*4882a593Smuzhiyun		vdda_ufs2_core:
125*4882a593Smuzhiyun		vdda_usb1_ss_core:
126*4882a593Smuzhiyun		vdda_usb2_ss_core:
127*4882a593Smuzhiyun		vreg_l1a_0p875: ldo1 {
128*4882a593Smuzhiyun			regulator-min-microvolt = <880000>;
129*4882a593Smuzhiyun			regulator-max-microvolt = <880000>;
130*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131*4882a593Smuzhiyun		};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		vddpx_10:
134*4882a593Smuzhiyun		vreg_l2a_1p2: ldo2 {
135*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
136*4882a593Smuzhiyun			regulator-max-microvolt = <1200000>;
137*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
138*4882a593Smuzhiyun			regulator-always-on;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun		vreg_l3a_1p0: ldo3 {
142*4882a593Smuzhiyun			regulator-min-microvolt = <1000000>;
143*4882a593Smuzhiyun			regulator-max-microvolt = <1000000>;
144*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun		vdd_wcss_cx:
148*4882a593Smuzhiyun		vdd_wcss_mx:
149*4882a593Smuzhiyun		vdda_wcss_pll:
150*4882a593Smuzhiyun		vreg_l5a_0p8: ldo5 {
151*4882a593Smuzhiyun			regulator-min-microvolt = <800000>;
152*4882a593Smuzhiyun			regulator-max-microvolt = <800000>;
153*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		vddpx_13:
157*4882a593Smuzhiyun		vreg_l6a_1p8: ldo6 {
158*4882a593Smuzhiyun			regulator-min-microvolt = <1856000>;
159*4882a593Smuzhiyun			regulator-max-microvolt = <1856000>;
160*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		vreg_l7a_1p8: ldo7 {
164*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
165*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
166*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun		vreg_l8a_1p2: ldo8 {
170*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
171*4882a593Smuzhiyun			regulator-max-microvolt = <1248000>;
172*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173*4882a593Smuzhiyun		};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun		vreg_l9a_1p8: ldo9 {
176*4882a593Smuzhiyun			regulator-min-microvolt = <1704000>;
177*4882a593Smuzhiyun			regulator-max-microvolt = <2928000>;
178*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		vreg_l10a_1p8: ldo10 {
182*4882a593Smuzhiyun			regulator-min-microvolt = <1704000>;
183*4882a593Smuzhiyun			regulator-max-microvolt = <2928000>;
184*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185*4882a593Smuzhiyun		};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		vreg_l11a_1p0: ldo11 {
188*4882a593Smuzhiyun			regulator-min-microvolt = <1000000>;
189*4882a593Smuzhiyun			regulator-max-microvolt = <1048000>;
190*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun		vdd_qfprom:
194*4882a593Smuzhiyun		vdd_qfprom_sp:
195*4882a593Smuzhiyun		vdda_apc1_cs_1p8:
196*4882a593Smuzhiyun		vdda_gfx_cs_1p8:
197*4882a593Smuzhiyun		vdda_qrefs_1p8:
198*4882a593Smuzhiyun		vdda_qusb_hs0_1p8:
199*4882a593Smuzhiyun		vddpx_11:
200*4882a593Smuzhiyun		vreg_l12a_1p8: ldo12 {
201*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
202*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
203*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		vddpx_2:
207*4882a593Smuzhiyun		vreg_l13a_2p95: ldo13 {
208*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
209*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
210*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211*4882a593Smuzhiyun		};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun		vreg_l14a_1p88: ldo14 {
214*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
215*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
216*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
217*4882a593Smuzhiyun		};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun		vreg_l15a_1p8: ldo15 {
220*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
221*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
222*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223*4882a593Smuzhiyun		};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun		vreg_l16a_2p7: ldo16 {
226*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
227*4882a593Smuzhiyun			regulator-max-microvolt = <2704000>;
228*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun		vreg_l17a_1p3: ldo17 {
232*4882a593Smuzhiyun			regulator-min-microvolt = <1304000>;
233*4882a593Smuzhiyun			regulator-max-microvolt = <1304000>;
234*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun		vreg_l18a_2p7: ldo18 {
238*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
239*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
240*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
241*4882a593Smuzhiyun		};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun		vreg_l19a_3p0: ldo19 {
244*4882a593Smuzhiyun			regulator-min-microvolt = <2856000>;
245*4882a593Smuzhiyun			regulator-max-microvolt = <3104000>;
246*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun		vreg_l20a_2p95: ldo20 {
250*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
251*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
252*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
253*4882a593Smuzhiyun		};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun		vreg_l21a_2p95: ldo21 {
256*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
257*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
258*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259*4882a593Smuzhiyun		};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun		vreg_l22a_2p85: ldo22 {
262*4882a593Smuzhiyun			regulator-min-microvolt = <2864000>;
263*4882a593Smuzhiyun			regulator-max-microvolt = <3312000>;
264*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
265*4882a593Smuzhiyun		};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun		vreg_l23a_3p3: ldo23 {
268*4882a593Smuzhiyun			regulator-min-microvolt = <3000000>;
269*4882a593Smuzhiyun			regulator-max-microvolt = <3312000>;
270*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
271*4882a593Smuzhiyun		};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun		vdda_qusb_hs0_3p1:
274*4882a593Smuzhiyun		vreg_l24a_3p075: ldo24 {
275*4882a593Smuzhiyun			regulator-min-microvolt = <3088000>;
276*4882a593Smuzhiyun			regulator-max-microvolt = <3088000>;
277*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun		vreg_l25a_3p3: ldo25 {
281*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
282*4882a593Smuzhiyun			regulator-max-microvolt = <3312000>;
283*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284*4882a593Smuzhiyun		};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun		vdda_hp_pcie_1p2:
287*4882a593Smuzhiyun		vdda_hv_ebi0:
288*4882a593Smuzhiyun		vdda_hv_ebi1:
289*4882a593Smuzhiyun		vdda_hv_ebi2:
290*4882a593Smuzhiyun		vdda_hv_ebi3:
291*4882a593Smuzhiyun		vdda_mipi_csi_1p25:
292*4882a593Smuzhiyun		vdda_mipi_dsi0_1p2:
293*4882a593Smuzhiyun		vdda_mipi_dsi1_1p2:
294*4882a593Smuzhiyun		vdda_pcie_1p2:
295*4882a593Smuzhiyun		vdda_ufs1_1p2:
296*4882a593Smuzhiyun		vdda_ufs2_1p2:
297*4882a593Smuzhiyun		vdda_usb1_ss_1p2:
298*4882a593Smuzhiyun		vdda_usb2_ss_1p2:
299*4882a593Smuzhiyun		vreg_l26a_1p2: ldo26 {
300*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
301*4882a593Smuzhiyun			regulator-max-microvolt = <1200000>;
302*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303*4882a593Smuzhiyun		};
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun		vreg_l28a_3p0: ldo28 {
306*4882a593Smuzhiyun			regulator-min-microvolt = <2856000>;
307*4882a593Smuzhiyun			regulator-max-microvolt = <3008000>;
308*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309*4882a593Smuzhiyun		};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun		vreg_lvs1a_1p8: lvs1 {
312*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
313*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun		vreg_lvs2a_1p8: lvs2 {
317*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
318*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
319*4882a593Smuzhiyun		};
320*4882a593Smuzhiyun	};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun	pmi8998-rpmh-regulators {
323*4882a593Smuzhiyun		compatible = "qcom,pmi8998-rpmh-regulators";
324*4882a593Smuzhiyun		qcom,pmic-id = "b";
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun		vdd-bob-supply = <&vph_pwr>;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun		vreg_bob: bob {
329*4882a593Smuzhiyun			regulator-min-microvolt = <3312000>;
330*4882a593Smuzhiyun			regulator-max-microvolt = <3600000>;
331*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
332*4882a593Smuzhiyun			regulator-allow-bypass;
333*4882a593Smuzhiyun		};
334*4882a593Smuzhiyun	};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun	pm8005-rpmh-regulators {
337*4882a593Smuzhiyun		compatible = "qcom,pm8005-rpmh-regulators";
338*4882a593Smuzhiyun		qcom,pmic-id = "c";
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun		vdd-s1-supply = <&vph_pwr>;
341*4882a593Smuzhiyun		vdd-s2-supply = <&vph_pwr>;
342*4882a593Smuzhiyun		vdd-s3-supply = <&vph_pwr>;
343*4882a593Smuzhiyun		vdd-s4-supply = <&vph_pwr>;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun		vreg_s3c_0p6: smps3 {
346*4882a593Smuzhiyun			regulator-min-microvolt = <600000>;
347*4882a593Smuzhiyun			regulator-max-microvolt = <600000>;
348*4882a593Smuzhiyun		};
349*4882a593Smuzhiyun	};
350*4882a593Smuzhiyun};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun&cdsp_pas {
353*4882a593Smuzhiyun	status = "okay";
354*4882a593Smuzhiyun	firmware-name = "qcom/sdm845/cdsp.mdt";
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&dsi0 {
358*4882a593Smuzhiyun	status = "okay";
359*4882a593Smuzhiyun	vdda-supply = <&vdda_mipi_dsi0_1p2>;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun	qcom,dual-dsi-mode;
362*4882a593Smuzhiyun	qcom,master-dsi;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun	#address-cells = <1>;
365*4882a593Smuzhiyun	#size-cells = <0>;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun	ports {
368*4882a593Smuzhiyun		port@1 {
369*4882a593Smuzhiyun			endpoint {
370*4882a593Smuzhiyun				remote-endpoint = <&truly_in_0>;
371*4882a593Smuzhiyun				data-lanes = <0 1 2 3>;
372*4882a593Smuzhiyun			};
373*4882a593Smuzhiyun		};
374*4882a593Smuzhiyun	};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun	panel@0 {
377*4882a593Smuzhiyun		compatible = "truly,nt35597-2K-display";
378*4882a593Smuzhiyun		reg = <0>;
379*4882a593Smuzhiyun		vdda-supply = <&vreg_l14a_1p88>;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
382*4882a593Smuzhiyun		mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun		ports {
385*4882a593Smuzhiyun			#address-cells = <1>;
386*4882a593Smuzhiyun			#size-cells = <0>;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun			port@0 {
389*4882a593Smuzhiyun				reg = <0>;
390*4882a593Smuzhiyun				truly_in_0: endpoint {
391*4882a593Smuzhiyun					remote-endpoint = <&dsi0_out>;
392*4882a593Smuzhiyun				};
393*4882a593Smuzhiyun			};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun			port@1 {
396*4882a593Smuzhiyun				reg = <1>;
397*4882a593Smuzhiyun				truly_in_1: endpoint {
398*4882a593Smuzhiyun					remote-endpoint = <&dsi1_out>;
399*4882a593Smuzhiyun				};
400*4882a593Smuzhiyun			};
401*4882a593Smuzhiyun		};
402*4882a593Smuzhiyun	};
403*4882a593Smuzhiyun};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun&dsi0_phy {
406*4882a593Smuzhiyun	status = "okay";
407*4882a593Smuzhiyun	vdds-supply = <&vdda_mipi_dsi0_pll>;
408*4882a593Smuzhiyun};
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun&dsi1 {
411*4882a593Smuzhiyun	status = "okay";
412*4882a593Smuzhiyun	vdda-supply = <&vdda_mipi_dsi1_1p2>;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun	qcom,dual-dsi-mode;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun	ports {
417*4882a593Smuzhiyun		port@1 {
418*4882a593Smuzhiyun			endpoint {
419*4882a593Smuzhiyun				remote-endpoint = <&truly_in_1>;
420*4882a593Smuzhiyun				data-lanes = <0 1 2 3>;
421*4882a593Smuzhiyun			};
422*4882a593Smuzhiyun		};
423*4882a593Smuzhiyun	};
424*4882a593Smuzhiyun};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun&dsi1_phy {
427*4882a593Smuzhiyun	status = "okay";
428*4882a593Smuzhiyun	vdds-supply = <&vdda_mipi_dsi1_pll>;
429*4882a593Smuzhiyun};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun&gcc {
432*4882a593Smuzhiyun	protected-clocks = <GCC_QSPI_CORE_CLK>,
433*4882a593Smuzhiyun			   <GCC_QSPI_CORE_CLK_SRC>,
434*4882a593Smuzhiyun			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
435*4882a593Smuzhiyun			   <GCC_LPASS_Q6_AXI_CLK>,
436*4882a593Smuzhiyun			   <GCC_LPASS_SWAY_CLK>;
437*4882a593Smuzhiyun};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun&gpu {
440*4882a593Smuzhiyun	zap-shader {
441*4882a593Smuzhiyun		memory-region = <&gpu_mem>;
442*4882a593Smuzhiyun		firmware-name = "qcom/sdm845/a630_zap.mbn";
443*4882a593Smuzhiyun	};
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&i2c10 {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun	clock-frequency = <400000>;
449*4882a593Smuzhiyun};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun&mdss {
452*4882a593Smuzhiyun	status = "okay";
453*4882a593Smuzhiyun};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun&mdss_mdp {
456*4882a593Smuzhiyun	status = "okay";
457*4882a593Smuzhiyun};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun&mss_pil {
460*4882a593Smuzhiyun	status = "okay";
461*4882a593Smuzhiyun	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
462*4882a593Smuzhiyun};
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun&qupv3_id_1 {
465*4882a593Smuzhiyun	status = "okay";
466*4882a593Smuzhiyun};
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun&sdhc_2 {
469*4882a593Smuzhiyun	status = "okay";
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	pinctrl-names = "default";
472*4882a593Smuzhiyun	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun	vmmc-supply = <&vreg_l21a_2p95>;
475*4882a593Smuzhiyun	vqmmc-supply = <&vddpx_2>;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
478*4882a593Smuzhiyun};
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun&uart9 {
481*4882a593Smuzhiyun	status = "okay";
482*4882a593Smuzhiyun};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun&ufs_mem_hc {
485*4882a593Smuzhiyun	status = "okay";
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun	vcc-supply = <&vreg_l20a_2p95>;
490*4882a593Smuzhiyun	vcc-max-microamp = <600000>;
491*4882a593Smuzhiyun};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun&ufs_mem_phy {
494*4882a593Smuzhiyun	status = "okay";
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun	vdda-phy-supply = <&vdda_ufs1_core>;
497*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_ufs1_1p2>;
498*4882a593Smuzhiyun};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun&usb_1 {
501*4882a593Smuzhiyun	status = "okay";
502*4882a593Smuzhiyun};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun&usb_1_dwc3 {
505*4882a593Smuzhiyun	/* Until we have Type C hooked up we'll force this as peripheral. */
506*4882a593Smuzhiyun	dr_mode = "peripheral";
507*4882a593Smuzhiyun};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun&usb_1_hsphy {
510*4882a593Smuzhiyun	status = "okay";
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun	vdd-supply = <&vdda_usb1_ss_core>;
513*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
514*4882a593Smuzhiyun	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun	qcom,imp-res-offset-value = <8>;
517*4882a593Smuzhiyun	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
518*4882a593Smuzhiyun	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
519*4882a593Smuzhiyun	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
520*4882a593Smuzhiyun};
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun&usb_1_qmpphy {
523*4882a593Smuzhiyun	status = "okay";
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
526*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_usb1_ss_core>;
527*4882a593Smuzhiyun};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun&usb_2 {
530*4882a593Smuzhiyun	status = "okay";
531*4882a593Smuzhiyun};
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun&usb_2_dwc3 {
534*4882a593Smuzhiyun	/*
535*4882a593Smuzhiyun	 * Though the USB block on SDM845 can support host, there's no vbus
536*4882a593Smuzhiyun	 * signal for this port on MTP.  Thus (unless you have a non-compliant
537*4882a593Smuzhiyun	 * hub that works without vbus) the only sensible thing is to force
538*4882a593Smuzhiyun	 * peripheral mode.
539*4882a593Smuzhiyun	 */
540*4882a593Smuzhiyun	dr_mode = "peripheral";
541*4882a593Smuzhiyun};
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun&usb_2_hsphy {
544*4882a593Smuzhiyun	status = "okay";
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun	vdd-supply = <&vdda_usb2_ss_core>;
547*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
548*4882a593Smuzhiyun	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun	qcom,imp-res-offset-value = <8>;
551*4882a593Smuzhiyun	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
552*4882a593Smuzhiyun};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun&usb_2_qmpphy {
555*4882a593Smuzhiyun	status = "okay";
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
558*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_usb2_ss_core>;
559*4882a593Smuzhiyun};
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun&wifi {
562*4882a593Smuzhiyun	status = "okay";
563*4882a593Smuzhiyun	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
564*4882a593Smuzhiyun	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
565*4882a593Smuzhiyun	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
566*4882a593Smuzhiyun	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
567*4882a593Smuzhiyun};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun/* PINCTRL - additions to nodes defined in sdm845.dtsi */
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun&qup_i2c10_default {
572*4882a593Smuzhiyun	pinconf {
573*4882a593Smuzhiyun		pins = "gpio55", "gpio56";
574*4882a593Smuzhiyun		drive-strength = <2>;
575*4882a593Smuzhiyun		bias-disable;
576*4882a593Smuzhiyun	};
577*4882a593Smuzhiyun};
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun&qup_uart9_default {
580*4882a593Smuzhiyun	pinconf-tx {
581*4882a593Smuzhiyun		pins = "gpio4";
582*4882a593Smuzhiyun		drive-strength = <2>;
583*4882a593Smuzhiyun		bias-disable;
584*4882a593Smuzhiyun	};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun	pinconf-rx {
587*4882a593Smuzhiyun		pins = "gpio5";
588*4882a593Smuzhiyun		drive-strength = <2>;
589*4882a593Smuzhiyun		bias-pull-up;
590*4882a593Smuzhiyun	};
591*4882a593Smuzhiyun};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun&tlmm {
594*4882a593Smuzhiyun	gpio-reserved-ranges = <0 4>, <81 4>;
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun	sdc2_clk: sdc2-clk {
597*4882a593Smuzhiyun		pinconf {
598*4882a593Smuzhiyun			pins = "sdc2_clk";
599*4882a593Smuzhiyun			bias-disable;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun			/*
602*4882a593Smuzhiyun			 * It seems that mmc_test reports errors if drive
603*4882a593Smuzhiyun			 * strength is not 16 on clk, cmd, and data pins.
604*4882a593Smuzhiyun			 */
605*4882a593Smuzhiyun			drive-strength = <16>;
606*4882a593Smuzhiyun		};
607*4882a593Smuzhiyun	};
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun	sdc2_cmd: sdc2-cmd {
610*4882a593Smuzhiyun		pinconf {
611*4882a593Smuzhiyun			pins = "sdc2_cmd";
612*4882a593Smuzhiyun			bias-pull-up;
613*4882a593Smuzhiyun			drive-strength = <16>;
614*4882a593Smuzhiyun		};
615*4882a593Smuzhiyun	};
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun	sdc2_data: sdc2-data {
618*4882a593Smuzhiyun		pinconf {
619*4882a593Smuzhiyun			pins = "sdc2_data";
620*4882a593Smuzhiyun			bias-pull-up;
621*4882a593Smuzhiyun			drive-strength = <16>;
622*4882a593Smuzhiyun		};
623*4882a593Smuzhiyun	};
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun	sd_card_det_n: sd-card-det-n {
626*4882a593Smuzhiyun		pinmux {
627*4882a593Smuzhiyun			pins = "gpio126";
628*4882a593Smuzhiyun			function = "gpio";
629*4882a593Smuzhiyun		};
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun		pinconf {
632*4882a593Smuzhiyun			pins = "gpio126";
633*4882a593Smuzhiyun			bias-pull-up;
634*4882a593Smuzhiyun		};
635*4882a593Smuzhiyun	};
636*4882a593Smuzhiyun};
637