xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Google Cheza device tree source (common between revisions)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2018 Google LLC.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11*4882a593Smuzhiyun#include "sdm845.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/* PMICs depend on spmi_bus label and so must come after SoC */
14*4882a593Smuzhiyun#include "pm8005.dtsi"
15*4882a593Smuzhiyun#include "pm8998.dtsi"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	aliases {
19*4882a593Smuzhiyun		bluetooth0 = &bluetooth;
20*4882a593Smuzhiyun		hsuart0 = &uart6;
21*4882a593Smuzhiyun		serial0 = &uart9;
22*4882a593Smuzhiyun		wifi0 = &wifi;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	backlight: backlight {
30*4882a593Smuzhiyun		compatible = "pwm-backlight";
31*4882a593Smuzhiyun		pwms = <&cros_ec_pwm 0>;
32*4882a593Smuzhiyun		enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33*4882a593Smuzhiyun		power-supply = <&ppvar_sys>;
34*4882a593Smuzhiyun		pinctrl-names = "default";
35*4882a593Smuzhiyun		pinctrl-0 = <&ap_edp_bklten>;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	/* FIXED REGULATORS - parents above children */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	/* This is the top level supply and variable voltage */
41*4882a593Smuzhiyun	ppvar_sys: ppvar-sys-regulator {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun		regulator-name = "ppvar_sys";
44*4882a593Smuzhiyun		regulator-always-on;
45*4882a593Smuzhiyun		regulator-boot-on;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	/* This divides ppvar_sys by 2, so voltage is variable */
49*4882a593Smuzhiyun	src_vph_pwr: src-vph-pwr-regulator {
50*4882a593Smuzhiyun		compatible = "regulator-fixed";
51*4882a593Smuzhiyun		regulator-name = "src_vph_pwr";
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		/* EC turns on with switchcap_on_l; always on for AP */
54*4882a593Smuzhiyun		regulator-always-on;
55*4882a593Smuzhiyun		regulator-boot-on;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		vin-supply = <&ppvar_sys>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	pp5000_a: pp5000-a-regulator {
61*4882a593Smuzhiyun		compatible = "regulator-fixed";
62*4882a593Smuzhiyun		regulator-name = "pp5000_a";
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		/* EC turns on with en_pp5000_a; always on for AP */
65*4882a593Smuzhiyun		regulator-always-on;
66*4882a593Smuzhiyun		regulator-boot-on;
67*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
68*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		vin-supply = <&ppvar_sys>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	src_vreg_bob: src-vreg-bob-regulator {
74*4882a593Smuzhiyun		compatible = "regulator-fixed";
75*4882a593Smuzhiyun		regulator-name = "src_vreg_bob";
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		/* EC turns on with vbob_en; always on for AP */
78*4882a593Smuzhiyun		regulator-always-on;
79*4882a593Smuzhiyun		regulator-boot-on;
80*4882a593Smuzhiyun		regulator-min-microvolt = <3600000>;
81*4882a593Smuzhiyun		regulator-max-microvolt = <3600000>;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		vin-supply = <&ppvar_sys>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	pp3300_dx_edp: pp3300-dx-edp-regulator {
87*4882a593Smuzhiyun		compatible = "regulator-fixed";
88*4882a593Smuzhiyun		regulator-name = "pp3300_dx_edp";
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
91*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun		gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
94*4882a593Smuzhiyun		enable-active-high;
95*4882a593Smuzhiyun		pinctrl-names = "default";
96*4882a593Smuzhiyun		pinctrl-0 = <&en_pp3300_dx_edp>;
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	/*
100*4882a593Smuzhiyun	 * Apparently RPMh does not provide support for PM8998 S4 because it
101*4882a593Smuzhiyun	 * is always-on; model it as a fixed regulator.
102*4882a593Smuzhiyun	 */
103*4882a593Smuzhiyun	src_pp1800_s4a: pm8998-smps4 {
104*4882a593Smuzhiyun		compatible = "regulator-fixed";
105*4882a593Smuzhiyun		regulator-name = "src_pp1800_s4a";
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
108*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		regulator-always-on;
111*4882a593Smuzhiyun		regulator-boot-on;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		vin-supply = <&src_vph_pwr>;
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	/* BOARD-SPECIFIC TOP LEVEL NODES */
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	gpio-keys {
119*4882a593Smuzhiyun		compatible = "gpio-keys";
120*4882a593Smuzhiyun		pinctrl-names = "default";
121*4882a593Smuzhiyun		pinctrl-0 = <&pen_eject_odl>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		pen-insert {
124*4882a593Smuzhiyun			label = "Pen Insert";
125*4882a593Smuzhiyun			/* Insert = low, eject = high */
126*4882a593Smuzhiyun			gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
127*4882a593Smuzhiyun			linux,code = <SW_PEN_INSERTED>;
128*4882a593Smuzhiyun			linux,input-type = <EV_SW>;
129*4882a593Smuzhiyun			wakeup-source;
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	panel: panel {
134*4882a593Smuzhiyun		compatible ="innolux,p120zdg-bf1";
135*4882a593Smuzhiyun		power-supply = <&pp3300_dx_edp>;
136*4882a593Smuzhiyun		backlight = <&backlight>;
137*4882a593Smuzhiyun		no-hpd;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		ports {
140*4882a593Smuzhiyun			panel_in: port {
141*4882a593Smuzhiyun				panel_in_edp: endpoint {
142*4882a593Smuzhiyun					remote-endpoint = <&sn65dsi86_out>;
143*4882a593Smuzhiyun				};
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun/*
150*4882a593Smuzhiyun * Reserved memory changes
151*4882a593Smuzhiyun *
152*4882a593Smuzhiyun * Putting this all together (out of order with the rest of the file) to keep
153*4882a593Smuzhiyun * all modifications to the memory map (from sdm845.dtsi) in one place.
154*4882a593Smuzhiyun */
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun/*
157*4882a593Smuzhiyun * Our mpss_region is 8MB bigger than the default one and that conflicts
158*4882a593Smuzhiyun * with venus_mem and cdsp_mem.
159*4882a593Smuzhiyun *
160*4882a593Smuzhiyun * For venus_mem we'll delete and re-create at a different address.
161*4882a593Smuzhiyun *
162*4882a593Smuzhiyun * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
163*4882a593Smuzhiyun * that also means we need to delete cdsp_pas.
164*4882a593Smuzhiyun */
165*4882a593Smuzhiyun/delete-node/ &venus_mem;
166*4882a593Smuzhiyun/delete-node/ &cdsp_mem;
167*4882a593Smuzhiyun/delete-node/ &cdsp_pas;
168*4882a593Smuzhiyun/delete-node/ &gpu_mem;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun/* Increase the size from 120 MB to 128 MB */
171*4882a593Smuzhiyun&mpss_region {
172*4882a593Smuzhiyun	reg = <0 0x8e000000 0 0x8000000>;
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun/* Increase the size from 2MB to 8MB */
176*4882a593Smuzhiyun&rmtfs_mem {
177*4882a593Smuzhiyun	reg = <0 0x88f00000 0 0x800000>;
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun/ {
181*4882a593Smuzhiyun	reserved-memory {
182*4882a593Smuzhiyun		venus_mem: memory@96000000 {
183*4882a593Smuzhiyun			reg = <0 0x96000000 0 0x500000>;
184*4882a593Smuzhiyun			no-map;
185*4882a593Smuzhiyun		};
186*4882a593Smuzhiyun	};
187*4882a593Smuzhiyun};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun&qspi {
190*4882a593Smuzhiyun	status = "okay";
191*4882a593Smuzhiyun	pinctrl-names = "default";
192*4882a593Smuzhiyun	pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun	flash@0 {
195*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
196*4882a593Smuzhiyun		reg = <0>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		/*
199*4882a593Smuzhiyun		 * In theory chip supports up to 104 MHz and controller up
200*4882a593Smuzhiyun		 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
201*4882a593Smuzhiyun		 * that for now.  b:117440651
202*4882a593Smuzhiyun		 */
203*4882a593Smuzhiyun		spi-max-frequency = <25000000>;
204*4882a593Smuzhiyun		spi-tx-bus-width = <2>;
205*4882a593Smuzhiyun		spi-rx-bus-width = <2>;
206*4882a593Smuzhiyun	};
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun&apps_rsc {
211*4882a593Smuzhiyun	pm8998-rpmh-regulators {
212*4882a593Smuzhiyun		compatible = "qcom,pm8998-rpmh-regulators";
213*4882a593Smuzhiyun		qcom,pmic-id = "a";
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun		vdd-s1-supply = <&src_vph_pwr>;
216*4882a593Smuzhiyun		vdd-s2-supply = <&src_vph_pwr>;
217*4882a593Smuzhiyun		vdd-s3-supply = <&src_vph_pwr>;
218*4882a593Smuzhiyun		vdd-s4-supply = <&src_vph_pwr>;
219*4882a593Smuzhiyun		vdd-s5-supply = <&src_vph_pwr>;
220*4882a593Smuzhiyun		vdd-s6-supply = <&src_vph_pwr>;
221*4882a593Smuzhiyun		vdd-s7-supply = <&src_vph_pwr>;
222*4882a593Smuzhiyun		vdd-s8-supply = <&src_vph_pwr>;
223*4882a593Smuzhiyun		vdd-s9-supply = <&src_vph_pwr>;
224*4882a593Smuzhiyun		vdd-s10-supply = <&src_vph_pwr>;
225*4882a593Smuzhiyun		vdd-s11-supply = <&src_vph_pwr>;
226*4882a593Smuzhiyun		vdd-s12-supply = <&src_vph_pwr>;
227*4882a593Smuzhiyun		vdd-s13-supply = <&src_vph_pwr>;
228*4882a593Smuzhiyun		vdd-l1-l27-supply = <&src_pp1025_s7a>;
229*4882a593Smuzhiyun		vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
230*4882a593Smuzhiyun		vdd-l3-l11-supply = <&src_pp1025_s7a>;
231*4882a593Smuzhiyun		vdd-l4-l5-supply = <&src_pp1025_s7a>;
232*4882a593Smuzhiyun		vdd-l6-supply = <&src_vph_pwr>;
233*4882a593Smuzhiyun		vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
234*4882a593Smuzhiyun		vdd-l9-supply = <&src_pp2040_s5a>;
235*4882a593Smuzhiyun		vdd-l10-l23-l25-supply = <&src_vreg_bob>;
236*4882a593Smuzhiyun		vdd-l13-l19-l21-supply = <&src_vreg_bob>;
237*4882a593Smuzhiyun		vdd-l16-l28-supply = <&src_vreg_bob>;
238*4882a593Smuzhiyun		vdd-l18-l22-supply = <&src_vreg_bob>;
239*4882a593Smuzhiyun		vdd-l20-l24-supply = <&src_vreg_bob>;
240*4882a593Smuzhiyun		vdd-l26-supply = <&src_pp1350_s3a>;
241*4882a593Smuzhiyun		vin-lvs-1-2-supply = <&src_pp1800_s4a>;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun		src_pp1125_s2a: smps2 {
244*4882a593Smuzhiyun			regulator-min-microvolt = <1100000>;
245*4882a593Smuzhiyun			regulator-max-microvolt = <1100000>;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun		src_pp1350_s3a: smps3 {
249*4882a593Smuzhiyun			regulator-min-microvolt = <1352000>;
250*4882a593Smuzhiyun			regulator-max-microvolt = <1352000>;
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun		src_pp2040_s5a: smps5 {
254*4882a593Smuzhiyun			regulator-min-microvolt = <1904000>;
255*4882a593Smuzhiyun			regulator-max-microvolt = <2040000>;
256*4882a593Smuzhiyun		};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun		src_pp1025_s7a: smps7 {
259*4882a593Smuzhiyun			regulator-min-microvolt = <900000>;
260*4882a593Smuzhiyun			regulator-max-microvolt = <1028000>;
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun		vdd_qusb_hs0:
264*4882a593Smuzhiyun		vdda_hp_pcie_core:
265*4882a593Smuzhiyun		vdda_mipi_csi0_0p9:
266*4882a593Smuzhiyun		vdda_mipi_csi1_0p9:
267*4882a593Smuzhiyun		vdda_mipi_csi2_0p9:
268*4882a593Smuzhiyun		vdda_mipi_dsi0_pll:
269*4882a593Smuzhiyun		vdda_mipi_dsi1_pll:
270*4882a593Smuzhiyun		vdda_qlink_lv:
271*4882a593Smuzhiyun		vdda_qlink_lv_ck:
272*4882a593Smuzhiyun		vdda_qrefs_0p875:
273*4882a593Smuzhiyun		vdda_pcie_core:
274*4882a593Smuzhiyun		vdda_pll_cc_ebi01:
275*4882a593Smuzhiyun		vdda_pll_cc_ebi23:
276*4882a593Smuzhiyun		vdda_sp_sensor:
277*4882a593Smuzhiyun		vdda_ufs1_core:
278*4882a593Smuzhiyun		vdda_ufs2_core:
279*4882a593Smuzhiyun		vdda_usb1_ss_core:
280*4882a593Smuzhiyun		vdda_usb2_ss_core:
281*4882a593Smuzhiyun		src_pp875_l1a: ldo1 {
282*4882a593Smuzhiyun			regulator-min-microvolt = <880000>;
283*4882a593Smuzhiyun			regulator-max-microvolt = <880000>;
284*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
285*4882a593Smuzhiyun		};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun		vddpx_10:
288*4882a593Smuzhiyun		src_pp1200_l2a: ldo2 {
289*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
290*4882a593Smuzhiyun			regulator-max-microvolt = <1200000>;
291*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun			/* TODO: why??? */
294*4882a593Smuzhiyun			regulator-always-on;
295*4882a593Smuzhiyun		};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun		pp1000_l3a_sdr845: ldo3 {
298*4882a593Smuzhiyun			regulator-min-microvolt = <1000000>;
299*4882a593Smuzhiyun			regulator-max-microvolt = <1000000>;
300*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301*4882a593Smuzhiyun		};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun		vdd_wcss_cx:
304*4882a593Smuzhiyun		vdd_wcss_mx:
305*4882a593Smuzhiyun		vdda_wcss_pll:
306*4882a593Smuzhiyun		src_pp800_l5a: ldo5 {
307*4882a593Smuzhiyun			regulator-min-microvolt = <800000>;
308*4882a593Smuzhiyun			regulator-max-microvolt = <800000>;
309*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310*4882a593Smuzhiyun		};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun		vddpx_13:
313*4882a593Smuzhiyun		src_pp1800_l6a: ldo6 {
314*4882a593Smuzhiyun			regulator-min-microvolt = <1856000>;
315*4882a593Smuzhiyun			regulator-max-microvolt = <1856000>;
316*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317*4882a593Smuzhiyun		};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun		pp1800_l7a_wcn3990: ldo7 {
320*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
321*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
322*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323*4882a593Smuzhiyun		};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun		src_pp1200_l8a: ldo8 {
326*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
327*4882a593Smuzhiyun			regulator-max-microvolt = <1248000>;
328*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
329*4882a593Smuzhiyun		};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun		pp1800_dx_pen:
332*4882a593Smuzhiyun		src_pp1800_l9a: ldo9 {
333*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
334*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
335*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336*4882a593Smuzhiyun		};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun		src_pp1800_l10a: ldo10 {
339*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
340*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
341*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
342*4882a593Smuzhiyun		};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun		pp1000_l11a_sdr845: ldo11 {
345*4882a593Smuzhiyun			regulator-min-microvolt = <1000000>;
346*4882a593Smuzhiyun			regulator-max-microvolt = <1048000>;
347*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
348*4882a593Smuzhiyun		};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun		vdd_qfprom:
351*4882a593Smuzhiyun		vdd_qfprom_sp:
352*4882a593Smuzhiyun		vdda_apc1_cs_1p8:
353*4882a593Smuzhiyun		vdda_gfx_cs_1p8:
354*4882a593Smuzhiyun		vdda_qrefs_1p8:
355*4882a593Smuzhiyun		vdda_qusb_hs0_1p8:
356*4882a593Smuzhiyun		vddpx_11:
357*4882a593Smuzhiyun		src_pp1800_l12a: ldo12 {
358*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
359*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
360*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361*4882a593Smuzhiyun		};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun		vddpx_2:
364*4882a593Smuzhiyun		src_pp2950_l13a: ldo13 {
365*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
366*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
367*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
368*4882a593Smuzhiyun		};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun		src_pp1800_l14a: ldo14 {
371*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
372*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
373*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
374*4882a593Smuzhiyun		};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun		src_pp1800_l15a: ldo15 {
377*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
378*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
379*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380*4882a593Smuzhiyun		};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun		pp2700_l16a: ldo16 {
383*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
384*4882a593Smuzhiyun			regulator-max-microvolt = <2704000>;
385*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
386*4882a593Smuzhiyun		};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun		src_pp1300_l17a: ldo17 {
389*4882a593Smuzhiyun			regulator-min-microvolt = <1304000>;
390*4882a593Smuzhiyun			regulator-max-microvolt = <1304000>;
391*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
392*4882a593Smuzhiyun		};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun		pp2700_l18a: ldo18 {
395*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
396*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
397*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
398*4882a593Smuzhiyun		};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun		/*
401*4882a593Smuzhiyun		 * NOTE: this rail should have been called
402*4882a593Smuzhiyun		 * src_pp3300_l19a in the schematic
403*4882a593Smuzhiyun		 */
404*4882a593Smuzhiyun		src_pp3000_l19a: ldo19 {
405*4882a593Smuzhiyun			regulator-min-microvolt = <3304000>;
406*4882a593Smuzhiyun			regulator-max-microvolt = <3304000>;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
409*4882a593Smuzhiyun		};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun		src_pp2950_l20a: ldo20 {
412*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
413*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
414*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
415*4882a593Smuzhiyun		};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun		src_pp2950_l21a: ldo21 {
418*4882a593Smuzhiyun			regulator-min-microvolt = <2704000>;
419*4882a593Smuzhiyun			regulator-max-microvolt = <2960000>;
420*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
421*4882a593Smuzhiyun		};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun		pp3300_hub:
424*4882a593Smuzhiyun		src_pp3300_l22a: ldo22 {
425*4882a593Smuzhiyun			regulator-min-microvolt = <3304000>;
426*4882a593Smuzhiyun			regulator-max-microvolt = <3304000>;
427*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
428*4882a593Smuzhiyun			/*
429*4882a593Smuzhiyun			 * HACK: Should add a usb hub node and driver
430*4882a593Smuzhiyun			 * to turn this on and off at suspend/resume time
431*4882a593Smuzhiyun			 */
432*4882a593Smuzhiyun			regulator-boot-on;
433*4882a593Smuzhiyun			regulator-always-on;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		pp3300_l23a_ch1_wcn3990: ldo23 {
437*4882a593Smuzhiyun			regulator-min-microvolt = <3000000>;
438*4882a593Smuzhiyun			regulator-max-microvolt = <3312000>;
439*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
440*4882a593Smuzhiyun		};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun		vdda_qusb_hs0_3p1:
443*4882a593Smuzhiyun		src_pp3075_l24a: ldo24 {
444*4882a593Smuzhiyun			regulator-min-microvolt = <3088000>;
445*4882a593Smuzhiyun			regulator-max-microvolt = <3088000>;
446*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
447*4882a593Smuzhiyun		};
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun		pp3300_l25a_ch0_wcn3990: ldo25 {
450*4882a593Smuzhiyun			regulator-min-microvolt = <3304000>;
451*4882a593Smuzhiyun			regulator-max-microvolt = <3304000>;
452*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
453*4882a593Smuzhiyun		};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun		pp1200_hub:
456*4882a593Smuzhiyun		vdda_hp_pcie_1p2:
457*4882a593Smuzhiyun		vdda_hv_ebi0:
458*4882a593Smuzhiyun		vdda_hv_ebi1:
459*4882a593Smuzhiyun		vdda_hv_ebi2:
460*4882a593Smuzhiyun		vdda_hv_ebi3:
461*4882a593Smuzhiyun		vdda_mipi_csi_1p25:
462*4882a593Smuzhiyun		vdda_mipi_dsi0_1p2:
463*4882a593Smuzhiyun		vdda_mipi_dsi1_1p2:
464*4882a593Smuzhiyun		vdda_pcie_1p2:
465*4882a593Smuzhiyun		vdda_ufs1_1p2:
466*4882a593Smuzhiyun		vdda_ufs2_1p2:
467*4882a593Smuzhiyun		vdda_usb1_ss_1p2:
468*4882a593Smuzhiyun		vdda_usb2_ss_1p2:
469*4882a593Smuzhiyun		src_pp1200_l26a: ldo26 {
470*4882a593Smuzhiyun			regulator-min-microvolt = <1200000>;
471*4882a593Smuzhiyun			regulator-max-microvolt = <1200000>;
472*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
473*4882a593Smuzhiyun		};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun		pp3300_dx_pen:
476*4882a593Smuzhiyun		src_pp3300_l28a: ldo28 {
477*4882a593Smuzhiyun			regulator-min-microvolt = <3304000>;
478*4882a593Smuzhiyun			regulator-max-microvolt = <3304000>;
479*4882a593Smuzhiyun			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
480*4882a593Smuzhiyun		};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun		src_pp1800_lvs1: lvs1 {
483*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
484*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
485*4882a593Smuzhiyun		};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun		src_pp1800_lvs2: lvs2 {
488*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
489*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
490*4882a593Smuzhiyun		};
491*4882a593Smuzhiyun	};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun	pm8005-rpmh-regulators {
494*4882a593Smuzhiyun		compatible = "qcom,pm8005-rpmh-regulators";
495*4882a593Smuzhiyun		qcom,pmic-id = "c";
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun		vdd-s1-supply = <&src_vph_pwr>;
498*4882a593Smuzhiyun		vdd-s2-supply = <&src_vph_pwr>;
499*4882a593Smuzhiyun		vdd-s3-supply = <&src_vph_pwr>;
500*4882a593Smuzhiyun		vdd-s4-supply = <&src_vph_pwr>;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun		src_pp600_s3c: smps3 {
503*4882a593Smuzhiyun			regulator-min-microvolt = <600000>;
504*4882a593Smuzhiyun			regulator-max-microvolt = <600000>;
505*4882a593Smuzhiyun		};
506*4882a593Smuzhiyun	};
507*4882a593Smuzhiyun};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun&dsi0 {
510*4882a593Smuzhiyun	status = "okay";
511*4882a593Smuzhiyun	vdda-supply = <&vdda_mipi_dsi0_1p2>;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun	ports {
514*4882a593Smuzhiyun		port@1 {
515*4882a593Smuzhiyun			endpoint {
516*4882a593Smuzhiyun				remote-endpoint = <&sn65dsi86_in>;
517*4882a593Smuzhiyun				data-lanes = <0 1 2 3>;
518*4882a593Smuzhiyun			};
519*4882a593Smuzhiyun		};
520*4882a593Smuzhiyun	};
521*4882a593Smuzhiyun};
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun&dsi0_phy {
524*4882a593Smuzhiyun	status = "okay";
525*4882a593Smuzhiyun	vdds-supply = <&vdda_mipi_dsi0_pll>;
526*4882a593Smuzhiyun};
527*4882a593Smuzhiyun
528*4882a593Smuzhiyunedp_brij_i2c: &i2c3 {
529*4882a593Smuzhiyun	status = "okay";
530*4882a593Smuzhiyun	clock-frequency = <400000>;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun	sn65dsi86_bridge: bridge@2d {
533*4882a593Smuzhiyun		compatible = "ti,sn65dsi86";
534*4882a593Smuzhiyun		reg = <0x2d>;
535*4882a593Smuzhiyun		pinctrl-names = "default";
536*4882a593Smuzhiyun		pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
539*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun		enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun		vpll-supply = <&src_pp1800_s4a>;
544*4882a593Smuzhiyun		vccio-supply = <&src_pp1800_s4a>;
545*4882a593Smuzhiyun		vcca-supply = <&src_pp1200_l2a>;
546*4882a593Smuzhiyun		vcc-supply = <&src_pp1200_l2a>;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun		clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
549*4882a593Smuzhiyun		clock-names = "refclk";
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun		no-hpd;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun		ports {
554*4882a593Smuzhiyun			#address-cells = <1>;
555*4882a593Smuzhiyun			#size-cells = <0>;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun			port@0 {
558*4882a593Smuzhiyun				reg = <0>;
559*4882a593Smuzhiyun				sn65dsi86_in: endpoint {
560*4882a593Smuzhiyun					remote-endpoint = <&dsi0_out>;
561*4882a593Smuzhiyun				};
562*4882a593Smuzhiyun			};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun			port@1 {
565*4882a593Smuzhiyun				reg = <1>;
566*4882a593Smuzhiyun				sn65dsi86_out: endpoint {
567*4882a593Smuzhiyun					remote-endpoint = <&panel_in_edp>;
568*4882a593Smuzhiyun				};
569*4882a593Smuzhiyun			};
570*4882a593Smuzhiyun		};
571*4882a593Smuzhiyun	};
572*4882a593Smuzhiyun};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyunap_pen_1v8: &i2c11 {
575*4882a593Smuzhiyun	status = "okay";
576*4882a593Smuzhiyun	clock-frequency = <400000>;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun	digitizer@9 {
579*4882a593Smuzhiyun		compatible = "wacom,w9013", "hid-over-i2c";
580*4882a593Smuzhiyun		reg = <0x9>;
581*4882a593Smuzhiyun		pinctrl-names = "default";
582*4882a593Smuzhiyun		pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun		vdd-supply = <&pp3300_dx_pen>;
585*4882a593Smuzhiyun		vddl-supply = <&pp1800_dx_pen>;
586*4882a593Smuzhiyun		post-power-on-delay-ms = <100>;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
589*4882a593Smuzhiyun		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun		hid-descr-addr = <0x1>;
592*4882a593Smuzhiyun	};
593*4882a593Smuzhiyun};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyunamp_i2c: &i2c12 {
596*4882a593Smuzhiyun	status = "okay";
597*4882a593Smuzhiyun	clock-frequency = <400000>;
598*4882a593Smuzhiyun};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyunap_ts_i2c: &i2c14 {
601*4882a593Smuzhiyun	status = "okay";
602*4882a593Smuzhiyun	clock-frequency = <400000>;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun	touchscreen@10 {
605*4882a593Smuzhiyun		compatible = "elan,ekth3500";
606*4882a593Smuzhiyun		reg = <0x10>;
607*4882a593Smuzhiyun		pinctrl-names = "default";
608*4882a593Smuzhiyun		pinctrl-0 = <&ts_int_l &ts_reset_l>;
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
611*4882a593Smuzhiyun		interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun		vcc33-supply = <&src_pp3300_l28a>;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun		reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
616*4882a593Smuzhiyun	};
617*4882a593Smuzhiyun};
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun&ipa {
620*4882a593Smuzhiyun	status = "okay";
621*4882a593Smuzhiyun	modem-init;
622*4882a593Smuzhiyun};
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun&lpasscc {
625*4882a593Smuzhiyun	status = "okay";
626*4882a593Smuzhiyun};
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun&mdss {
629*4882a593Smuzhiyun	status = "okay";
630*4882a593Smuzhiyun};
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun&mdss_mdp {
633*4882a593Smuzhiyun	status = "okay";
634*4882a593Smuzhiyun};
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun&mss_pil {
637*4882a593Smuzhiyun	iommus = <&apps_smmu 0x781 0x0>,
638*4882a593Smuzhiyun		 <&apps_smmu 0x724 0x3>;
639*4882a593Smuzhiyun};
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun&pm8998_pwrkey {
642*4882a593Smuzhiyun	status = "disabled";
643*4882a593Smuzhiyun};
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun&qupv3_id_0 {
646*4882a593Smuzhiyun	status = "okay";
647*4882a593Smuzhiyun};
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun&qupv3_id_1 {
650*4882a593Smuzhiyun	status = "okay";
651*4882a593Smuzhiyun};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun&sdhc_2 {
654*4882a593Smuzhiyun	status = "okay";
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun	pinctrl-names = "default";
657*4882a593Smuzhiyun	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun	vmmc-supply = <&src_pp2950_l21a>;
660*4882a593Smuzhiyun	vqmmc-supply = <&vddpx_2>;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun	cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
663*4882a593Smuzhiyun};
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun&spi0 {
666*4882a593Smuzhiyun	status = "okay";
667*4882a593Smuzhiyun};
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun&spi5 {
670*4882a593Smuzhiyun	status = "okay";
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun	tpm@0 {
673*4882a593Smuzhiyun		compatible = "google,cr50";
674*4882a593Smuzhiyun		reg = <0>;
675*4882a593Smuzhiyun		pinctrl-names = "default";
676*4882a593Smuzhiyun		pinctrl-0 = <&h1_ap_int_odl>;
677*4882a593Smuzhiyun		spi-max-frequency = <800000>;
678*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
679*4882a593Smuzhiyun		interrupts = <129 IRQ_TYPE_EDGE_RISING>;
680*4882a593Smuzhiyun	};
681*4882a593Smuzhiyun};
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun&spi10 {
684*4882a593Smuzhiyun	status = "okay";
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun	cros_ec: ec@0 {
687*4882a593Smuzhiyun		compatible = "google,cros-ec-spi";
688*4882a593Smuzhiyun		reg = <0>;
689*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
690*4882a593Smuzhiyun		interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
691*4882a593Smuzhiyun		pinctrl-names = "default";
692*4882a593Smuzhiyun		pinctrl-0 = <&ec_ap_int_l>;
693*4882a593Smuzhiyun		spi-max-frequency = <3000000>;
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun		cros_ec_pwm: ec-pwm {
696*4882a593Smuzhiyun			compatible = "google,cros-ec-pwm";
697*4882a593Smuzhiyun			#pwm-cells = <1>;
698*4882a593Smuzhiyun		};
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun		i2c_tunnel: i2c-tunnel {
701*4882a593Smuzhiyun			compatible = "google,cros-ec-i2c-tunnel";
702*4882a593Smuzhiyun			google,remote-bus = <0>;
703*4882a593Smuzhiyun			#address-cells = <1>;
704*4882a593Smuzhiyun			#size-cells = <0>;
705*4882a593Smuzhiyun		};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun		pdupdate {
708*4882a593Smuzhiyun			compatible = "google,cros-ec-pd-update";
709*4882a593Smuzhiyun		};
710*4882a593Smuzhiyun	};
711*4882a593Smuzhiyun};
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun#include <arm/cros-ec-keyboard.dtsi>
714*4882a593Smuzhiyun#include <arm/cros-ec-sbs.dtsi>
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun&uart6 {
717*4882a593Smuzhiyun	status = "okay";
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun	bluetooth: wcn3990-bt {
720*4882a593Smuzhiyun		compatible = "qcom,wcn3990-bt";
721*4882a593Smuzhiyun		vddio-supply = <&src_pp1800_s4a>;
722*4882a593Smuzhiyun		vddxo-supply = <&pp1800_l7a_wcn3990>;
723*4882a593Smuzhiyun		vddrf-supply = <&src_pp1300_l17a>;
724*4882a593Smuzhiyun		vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
725*4882a593Smuzhiyun		max-speed = <3200000>;
726*4882a593Smuzhiyun	};
727*4882a593Smuzhiyun};
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun&uart9 {
730*4882a593Smuzhiyun	status = "okay";
731*4882a593Smuzhiyun};
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun&ufs_mem_hc {
734*4882a593Smuzhiyun	status = "okay";
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun	vcc-supply = <&src_pp2950_l20a>;
739*4882a593Smuzhiyun	vcc-max-microamp = <600000>;
740*4882a593Smuzhiyun};
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun&ufs_mem_phy {
743*4882a593Smuzhiyun	status = "okay";
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun	vdda-phy-supply = <&vdda_ufs1_core>;
746*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_ufs1_1p2>;
747*4882a593Smuzhiyun};
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun&usb_1 {
750*4882a593Smuzhiyun	status = "okay";
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun	/* We'll use this as USB 2.0 only */
753*4882a593Smuzhiyun	qcom,select-utmi-as-pipe-clk;
754*4882a593Smuzhiyun};
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun&usb_1_dwc3 {
757*4882a593Smuzhiyun	/*
758*4882a593Smuzhiyun	 * The hardware design intends this port to be hooked up in peripheral
759*4882a593Smuzhiyun	 * mode, so we'll hardcode it here.  Some details:
760*4882a593Smuzhiyun	 * - SDM845 expects only a single Type C connector so it has only one
761*4882a593Smuzhiyun	 *   native Type C port but cheza has two Type C connectors.
762*4882a593Smuzhiyun	 * - The only source of DP is the single native Type C port.
763*4882a593Smuzhiyun	 * - On cheza we want to be able to hook DP up to _either_ of the
764*4882a593Smuzhiyun	 *   two Type C connectors and want to be able to achieve 4 lanes of DP.
765*4882a593Smuzhiyun	 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
766*4882a593Smuzhiyun	 * - In order to make everything work, the native Type C port is always
767*4882a593Smuzhiyun	 *   configured as 4-lanes DP so it's always available.
768*4882a593Smuzhiyun	 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
769*4882a593Smuzhiyun	 *   sent to the two Type C connectors.
770*4882a593Smuzhiyun	 * - The extra USB2 lines from the native Type C port are always
771*4882a593Smuzhiyun	 *   setup as "peripheral" so that we can mux them over to one connector
772*4882a593Smuzhiyun	 *   or the other if someone needs the connector configured as a gadget
773*4882a593Smuzhiyun	 *   (but they only get USB2 speeds).
774*4882a593Smuzhiyun	 *
775*4882a593Smuzhiyun	 * All the hardware muxes would allow us to hook things up in different
776*4882a593Smuzhiyun	 * ways to some potential benefit for static configurations (you could
777*4882a593Smuzhiyun	 * achieve extra USB2 bandwidth by using two different ports for the
778*4882a593Smuzhiyun	 * two connectors or possibly even get USB3 peripheral mode), but in
779*4882a593Smuzhiyun	 * each case you end up forcing to disconnect/reconnect an in-use
780*4882a593Smuzhiyun	 * USB session in some cases depending on what you hotplug into the
781*4882a593Smuzhiyun	 * other connector.  Thus hardcoding this as peripheral makes sense.
782*4882a593Smuzhiyun	 */
783*4882a593Smuzhiyun	dr_mode = "peripheral";
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun	/*
786*4882a593Smuzhiyun	 * We always need the high speed pins as 4-lanes DP in case someone
787*4882a593Smuzhiyun	 * hotplugs a DP peripheral.  Thus limit this port to a max of high
788*4882a593Smuzhiyun	 * speed.
789*4882a593Smuzhiyun	 */
790*4882a593Smuzhiyun	maximum-speed = "high-speed";
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun	/*
793*4882a593Smuzhiyun	 * We don't need the usb3-phy since we run in highspeed mode always, so
794*4882a593Smuzhiyun	 * re-define these properties removing the superspeed USB PHY reference.
795*4882a593Smuzhiyun	 */
796*4882a593Smuzhiyun	phys = <&usb_1_hsphy>;
797*4882a593Smuzhiyun	phy-names = "usb2-phy";
798*4882a593Smuzhiyun};
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun&usb_1_hsphy {
801*4882a593Smuzhiyun	status = "okay";
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun	vdd-supply = <&vdda_usb1_ss_core>;
804*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
805*4882a593Smuzhiyun	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun	qcom,imp-res-offset-value = <8>;
808*4882a593Smuzhiyun	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
809*4882a593Smuzhiyun	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
810*4882a593Smuzhiyun	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
811*4882a593Smuzhiyun};
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun&usb_2 {
814*4882a593Smuzhiyun	status = "okay";
815*4882a593Smuzhiyun};
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun&usb_2_dwc3 {
818*4882a593Smuzhiyun	/* We have this hooked up to a hub and we always use in host mode */
819*4882a593Smuzhiyun	dr_mode = "host";
820*4882a593Smuzhiyun};
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun&usb_2_hsphy {
823*4882a593Smuzhiyun	status = "okay";
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun	vdd-supply = <&vdda_usb2_ss_core>;
826*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
827*4882a593Smuzhiyun	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun	qcom,imp-res-offset-value = <8>;
830*4882a593Smuzhiyun	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
831*4882a593Smuzhiyun};
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun&usb_2_qmpphy {
834*4882a593Smuzhiyun	status = "okay";
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
837*4882a593Smuzhiyun	vdda-pll-supply = <&vdda_usb2_ss_core>;
838*4882a593Smuzhiyun};
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun&wifi {
841*4882a593Smuzhiyun	status = "okay";
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun	vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
844*4882a593Smuzhiyun	vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
845*4882a593Smuzhiyun	vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
846*4882a593Smuzhiyun	vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
847*4882a593Smuzhiyun};
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun/* PINCTRL - additions to nodes defined in sdm845.dtsi */
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun&qspi_cs0 {
852*4882a593Smuzhiyun	pinconf {
853*4882a593Smuzhiyun		pins = "gpio90";
854*4882a593Smuzhiyun		bias-disable;
855*4882a593Smuzhiyun	};
856*4882a593Smuzhiyun};
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun&qspi_clk {
859*4882a593Smuzhiyun	pinconf {
860*4882a593Smuzhiyun		pins = "gpio95";
861*4882a593Smuzhiyun		bias-disable;
862*4882a593Smuzhiyun	};
863*4882a593Smuzhiyun};
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun&qspi_data01 {
866*4882a593Smuzhiyun	pinconf {
867*4882a593Smuzhiyun		pins = "gpio91", "gpio92";
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun		/* High-Z when no transfers; nice to park the lines */
870*4882a593Smuzhiyun		bias-pull-up;
871*4882a593Smuzhiyun	};
872*4882a593Smuzhiyun};
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun&qup_i2c3_default {
875*4882a593Smuzhiyun	pinconf {
876*4882a593Smuzhiyun		pins = "gpio41", "gpio42";
877*4882a593Smuzhiyun		drive-strength = <2>;
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun		/* Has external pullup */
880*4882a593Smuzhiyun		bias-disable;
881*4882a593Smuzhiyun	};
882*4882a593Smuzhiyun};
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun&qup_i2c11_default {
885*4882a593Smuzhiyun	pinconf {
886*4882a593Smuzhiyun		pins = "gpio31", "gpio32";
887*4882a593Smuzhiyun		drive-strength = <2>;
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun		/* Has external pullup */
890*4882a593Smuzhiyun		bias-disable;
891*4882a593Smuzhiyun	};
892*4882a593Smuzhiyun};
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun&qup_i2c12_default {
895*4882a593Smuzhiyun	pinconf {
896*4882a593Smuzhiyun		pins = "gpio49", "gpio50";
897*4882a593Smuzhiyun		drive-strength = <2>;
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun		/* Has external pullup */
900*4882a593Smuzhiyun		bias-disable;
901*4882a593Smuzhiyun	};
902*4882a593Smuzhiyun};
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun&qup_i2c14_default {
905*4882a593Smuzhiyun	pinconf {
906*4882a593Smuzhiyun		pins = "gpio33", "gpio34";
907*4882a593Smuzhiyun		drive-strength = <2>;
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun		/* Has external pullup */
910*4882a593Smuzhiyun		bias-disable;
911*4882a593Smuzhiyun	};
912*4882a593Smuzhiyun};
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun&qup_spi0_default {
915*4882a593Smuzhiyun	pinconf {
916*4882a593Smuzhiyun		pins = "gpio0", "gpio1", "gpio2", "gpio3";
917*4882a593Smuzhiyun		drive-strength = <2>;
918*4882a593Smuzhiyun		bias-disable;
919*4882a593Smuzhiyun	};
920*4882a593Smuzhiyun};
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun&qup_spi5_default {
923*4882a593Smuzhiyun	pinconf {
924*4882a593Smuzhiyun		pins = "gpio85", "gpio86", "gpio87", "gpio88";
925*4882a593Smuzhiyun		drive-strength = <2>;
926*4882a593Smuzhiyun		bias-disable;
927*4882a593Smuzhiyun	};
928*4882a593Smuzhiyun};
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun&qup_spi10_default {
931*4882a593Smuzhiyun	pinconf {
932*4882a593Smuzhiyun		pins = "gpio53", "gpio54", "gpio55", "gpio56";
933*4882a593Smuzhiyun		drive-strength = <2>;
934*4882a593Smuzhiyun		bias-disable;
935*4882a593Smuzhiyun	};
936*4882a593Smuzhiyun};
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun&qup_uart6_default {
939*4882a593Smuzhiyun	/* Change pinmux to all 4 pins since CTS and RTS are connected */
940*4882a593Smuzhiyun	pinmux {
941*4882a593Smuzhiyun		pins = "gpio45", "gpio46",
942*4882a593Smuzhiyun		       "gpio47", "gpio48";
943*4882a593Smuzhiyun	};
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun	pinconf-cts {
946*4882a593Smuzhiyun		/*
947*4882a593Smuzhiyun		 * Configure a pull-down on 45 (CTS) to match the pull of
948*4882a593Smuzhiyun		 * the Bluetooth module.
949*4882a593Smuzhiyun		 */
950*4882a593Smuzhiyun		pins = "gpio45";
951*4882a593Smuzhiyun		bias-pull-down;
952*4882a593Smuzhiyun	};
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun	pinconf-rts-tx {
955*4882a593Smuzhiyun		/* We'll drive 46 (RTS) and 47 (TX), so no pull */
956*4882a593Smuzhiyun		pins = "gpio46", "gpio47";
957*4882a593Smuzhiyun		drive-strength = <2>;
958*4882a593Smuzhiyun		bias-disable;
959*4882a593Smuzhiyun	};
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun	pinconf-rx {
962*4882a593Smuzhiyun		/*
963*4882a593Smuzhiyun		 * Configure a pull-up on 48 (RX). This is needed to avoid
964*4882a593Smuzhiyun		 * garbage data when the TX pin of the Bluetooth module is
965*4882a593Smuzhiyun		 * in tri-state (module powered off or not driving the
966*4882a593Smuzhiyun		 * signal yet).
967*4882a593Smuzhiyun		 */
968*4882a593Smuzhiyun		pins = "gpio48";
969*4882a593Smuzhiyun		bias-pull-up;
970*4882a593Smuzhiyun	};
971*4882a593Smuzhiyun};
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun&qup_uart9_default {
974*4882a593Smuzhiyun	pinconf-tx {
975*4882a593Smuzhiyun		pins = "gpio4";
976*4882a593Smuzhiyun		drive-strength = <2>;
977*4882a593Smuzhiyun		bias-disable;
978*4882a593Smuzhiyun	};
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun	pinconf-rx {
981*4882a593Smuzhiyun		pins = "gpio5";
982*4882a593Smuzhiyun		drive-strength = <2>;
983*4882a593Smuzhiyun		bias-pull-up;
984*4882a593Smuzhiyun	};
985*4882a593Smuzhiyun};
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun/* PINCTRL - board-specific pinctrl */
988*4882a593Smuzhiyun&pm8005_gpio {
989*4882a593Smuzhiyun	gpio-line-names = "",
990*4882a593Smuzhiyun			  "",
991*4882a593Smuzhiyun			  "SLB",
992*4882a593Smuzhiyun			  "";
993*4882a593Smuzhiyun};
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun&pm8998_adc {
996*4882a593Smuzhiyun	adc-chan@4d {
997*4882a593Smuzhiyun		reg = <ADC5_AMUX_THM1_100K_PU>;
998*4882a593Smuzhiyun		label = "sdm_temp";
999*4882a593Smuzhiyun	};
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun	adc-chan@4e {
1002*4882a593Smuzhiyun		reg = <ADC5_AMUX_THM2_100K_PU>;
1003*4882a593Smuzhiyun		label = "quiet_temp";
1004*4882a593Smuzhiyun	};
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun	adc-chan@4f {
1007*4882a593Smuzhiyun		reg = <ADC5_AMUX_THM3_100K_PU>;
1008*4882a593Smuzhiyun		label = "lte_temp_1";
1009*4882a593Smuzhiyun	};
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun	adc-chan@50 {
1012*4882a593Smuzhiyun		reg = <ADC5_AMUX_THM4_100K_PU>;
1013*4882a593Smuzhiyun		label = "lte_temp_2";
1014*4882a593Smuzhiyun	};
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun	adc-chan@51 {
1017*4882a593Smuzhiyun		reg = <ADC5_AMUX_THM5_100K_PU>;
1018*4882a593Smuzhiyun		label = "charger_temp";
1019*4882a593Smuzhiyun	};
1020*4882a593Smuzhiyun};
1021*4882a593Smuzhiyun
1022*4882a593Smuzhiyun&pm8998_gpio {
1023*4882a593Smuzhiyun	gpio-line-names = "",
1024*4882a593Smuzhiyun			  "",
1025*4882a593Smuzhiyun			  "SW_CTRL",
1026*4882a593Smuzhiyun			  "",
1027*4882a593Smuzhiyun			  "",
1028*4882a593Smuzhiyun			  "",
1029*4882a593Smuzhiyun			  "",
1030*4882a593Smuzhiyun			  "",
1031*4882a593Smuzhiyun			  "",
1032*4882a593Smuzhiyun			  "",
1033*4882a593Smuzhiyun			  "",
1034*4882a593Smuzhiyun			  "",
1035*4882a593Smuzhiyun			  "",
1036*4882a593Smuzhiyun			  "",
1037*4882a593Smuzhiyun			  "",
1038*4882a593Smuzhiyun			  "",
1039*4882a593Smuzhiyun			  "",
1040*4882a593Smuzhiyun			  "",
1041*4882a593Smuzhiyun			  "",
1042*4882a593Smuzhiyun			  "",
1043*4882a593Smuzhiyun			  "",
1044*4882a593Smuzhiyun			  "CFG_OPT1",
1045*4882a593Smuzhiyun			  "WCSS_PWR_REQ",
1046*4882a593Smuzhiyun			  "",
1047*4882a593Smuzhiyun			  "CFG_OPT2",
1048*4882a593Smuzhiyun			  "SLB";
1049*4882a593Smuzhiyun};
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun&tlmm {
1052*4882a593Smuzhiyun	/*
1053*4882a593Smuzhiyun	 * pinctrl settings for pins that have no real owners.
1054*4882a593Smuzhiyun	 */
1055*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
1056*4882a593Smuzhiyun	pinctrl-0 = <&bios_flash_wp_r_l>,
1057*4882a593Smuzhiyun		    <&ap_suspend_l_deassert>;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun	pinctrl-1 = <&bios_flash_wp_r_l>,
1060*4882a593Smuzhiyun		    <&ap_suspend_l_assert>;
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun	/*
1063*4882a593Smuzhiyun	 * Hogs prevent usermode from changing the value. A GPIO can be both
1064*4882a593Smuzhiyun	 * here and in the pinctrl section.
1065*4882a593Smuzhiyun	 */
1066*4882a593Smuzhiyun	ap-suspend-l-hog {
1067*4882a593Smuzhiyun		gpio-hog;
1068*4882a593Smuzhiyun		gpios = <126 GPIO_ACTIVE_LOW>;
1069*4882a593Smuzhiyun		output-low;
1070*4882a593Smuzhiyun	};
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun	ap_edp_bklten: ap-edp-bklten {
1073*4882a593Smuzhiyun		pinmux {
1074*4882a593Smuzhiyun			pins = "gpio37";
1075*4882a593Smuzhiyun			function = "gpio";
1076*4882a593Smuzhiyun		};
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun		pinconf {
1079*4882a593Smuzhiyun			pins = "gpio37";
1080*4882a593Smuzhiyun			drive-strength = <2>;
1081*4882a593Smuzhiyun			bias-disable;
1082*4882a593Smuzhiyun		};
1083*4882a593Smuzhiyun	};
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun	bios_flash_wp_r_l: bios-flash-wp-r-l {
1086*4882a593Smuzhiyun		pinmux {
1087*4882a593Smuzhiyun			pins = "gpio128";
1088*4882a593Smuzhiyun			function = "gpio";
1089*4882a593Smuzhiyun			input-enable;
1090*4882a593Smuzhiyun		};
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun		pinconf {
1093*4882a593Smuzhiyun			pins = "gpio128";
1094*4882a593Smuzhiyun			bias-disable;
1095*4882a593Smuzhiyun		};
1096*4882a593Smuzhiyun	};
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun	ec_ap_int_l: ec-ap-int-l {
1099*4882a593Smuzhiyun		pinmux {
1100*4882a593Smuzhiyun		       pins = "gpio122";
1101*4882a593Smuzhiyun		       function = "gpio";
1102*4882a593Smuzhiyun		       input-enable;
1103*4882a593Smuzhiyun		};
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun		pinconf {
1106*4882a593Smuzhiyun		       pins = "gpio122";
1107*4882a593Smuzhiyun		       bias-pull-up;
1108*4882a593Smuzhiyun		};
1109*4882a593Smuzhiyun	};
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun	edp_brij_en: edp-brij-en {
1112*4882a593Smuzhiyun		pinmux {
1113*4882a593Smuzhiyun			pins = "gpio102";
1114*4882a593Smuzhiyun			function = "gpio";
1115*4882a593Smuzhiyun		};
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun		pinconf {
1118*4882a593Smuzhiyun			pins = "gpio102";
1119*4882a593Smuzhiyun			drive-strength = <2>;
1120*4882a593Smuzhiyun			bias-disable;
1121*4882a593Smuzhiyun		};
1122*4882a593Smuzhiyun	};
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun	edp_brij_irq: edp-brij-irq {
1125*4882a593Smuzhiyun		pinmux {
1126*4882a593Smuzhiyun			pins = "gpio10";
1127*4882a593Smuzhiyun			function = "gpio";
1128*4882a593Smuzhiyun		};
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun		pinconf {
1131*4882a593Smuzhiyun			pins = "gpio10";
1132*4882a593Smuzhiyun			drive-strength = <2>;
1133*4882a593Smuzhiyun			bias-pull-down;
1134*4882a593Smuzhiyun		};
1135*4882a593Smuzhiyun	};
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun	en_pp3300_dx_edp: en-pp3300-dx-edp {
1138*4882a593Smuzhiyun		pinmux {
1139*4882a593Smuzhiyun			pins = "gpio43";
1140*4882a593Smuzhiyun			function = "gpio";
1141*4882a593Smuzhiyun		};
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun		pinconf {
1144*4882a593Smuzhiyun			pins = "gpio43";
1145*4882a593Smuzhiyun			drive-strength = <2>;
1146*4882a593Smuzhiyun			bias-disable;
1147*4882a593Smuzhiyun		};
1148*4882a593Smuzhiyun	};
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun	h1_ap_int_odl: h1-ap-int-odl {
1151*4882a593Smuzhiyun		pinmux {
1152*4882a593Smuzhiyun			pins = "gpio129";
1153*4882a593Smuzhiyun			function = "gpio";
1154*4882a593Smuzhiyun			input-enable;
1155*4882a593Smuzhiyun		};
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun		pinconf {
1158*4882a593Smuzhiyun			pins = "gpio129";
1159*4882a593Smuzhiyun			bias-pull-up;
1160*4882a593Smuzhiyun		};
1161*4882a593Smuzhiyun	};
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun	pen_eject_odl: pen-eject-odl {
1164*4882a593Smuzhiyun		pinmux {
1165*4882a593Smuzhiyun			pins = "gpio119";
1166*4882a593Smuzhiyun			function = "gpio";
1167*4882a593Smuzhiyun			bias-pull-up;
1168*4882a593Smuzhiyun		};
1169*4882a593Smuzhiyun	};
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun	pen_irq_l: pen-irq-l {
1172*4882a593Smuzhiyun		pinmux {
1173*4882a593Smuzhiyun			pins = "gpio24";
1174*4882a593Smuzhiyun			function = "gpio";
1175*4882a593Smuzhiyun		};
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun		pinconf {
1178*4882a593Smuzhiyun			pins = "gpio24";
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun			/* Has external pullup */
1181*4882a593Smuzhiyun			bias-disable;
1182*4882a593Smuzhiyun		};
1183*4882a593Smuzhiyun	};
1184*4882a593Smuzhiyun
1185*4882a593Smuzhiyun	pen_pdct_l: pen-pdct-l {
1186*4882a593Smuzhiyun		pinmux {
1187*4882a593Smuzhiyun			pins = "gpio63";
1188*4882a593Smuzhiyun			function = "gpio";
1189*4882a593Smuzhiyun		};
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun		pinconf {
1192*4882a593Smuzhiyun			pins = "gpio63";
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun			/* Has external pullup */
1195*4882a593Smuzhiyun			bias-disable;
1196*4882a593Smuzhiyun		};
1197*4882a593Smuzhiyun	};
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun	pen_rst_l: pen-rst-l {
1200*4882a593Smuzhiyun		pinmux  {
1201*4882a593Smuzhiyun			pins = "gpio23";
1202*4882a593Smuzhiyun			function = "gpio";
1203*4882a593Smuzhiyun		};
1204*4882a593Smuzhiyun
1205*4882a593Smuzhiyun		pinconf {
1206*4882a593Smuzhiyun			pins = "gpio23";
1207*4882a593Smuzhiyun			bias-disable;
1208*4882a593Smuzhiyun			drive-strength = <2>;
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun			/*
1211*4882a593Smuzhiyun			 * The pen driver doesn't currently support
1212*4882a593Smuzhiyun			 * driving this reset line.  By specifying
1213*4882a593Smuzhiyun			 * output-high here we're relying on the fact
1214*4882a593Smuzhiyun			 * that this pin has a default pulldown at boot
1215*4882a593Smuzhiyun			 * (which makes sure the pen was in reset if it
1216*4882a593Smuzhiyun			 * was powered) and then we set it high here to
1217*4882a593Smuzhiyun			 * take it out of reset.  Better would be if the
1218*4882a593Smuzhiyun			 * pen driver could control this and we could
1219*4882a593Smuzhiyun			 * remove "output-high" here.
1220*4882a593Smuzhiyun			 */
1221*4882a593Smuzhiyun			output-high;
1222*4882a593Smuzhiyun		};
1223*4882a593Smuzhiyun	};
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun	sdc2_clk: sdc2-clk {
1226*4882a593Smuzhiyun		pinconf {
1227*4882a593Smuzhiyun			pins = "sdc2_clk";
1228*4882a593Smuzhiyun			bias-disable;
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun			/*
1231*4882a593Smuzhiyun			 * It seems that mmc_test reports errors if drive
1232*4882a593Smuzhiyun			 * strength is not 16.
1233*4882a593Smuzhiyun			 */
1234*4882a593Smuzhiyun			drive-strength = <16>;
1235*4882a593Smuzhiyun		};
1236*4882a593Smuzhiyun	};
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun	sdc2_cmd: sdc2-cmd {
1239*4882a593Smuzhiyun		pinconf {
1240*4882a593Smuzhiyun			pins = "sdc2_cmd";
1241*4882a593Smuzhiyun			bias-pull-up;
1242*4882a593Smuzhiyun			drive-strength = <16>;
1243*4882a593Smuzhiyun		};
1244*4882a593Smuzhiyun	};
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun	sdc2_data: sdc2-data {
1247*4882a593Smuzhiyun		pinconf {
1248*4882a593Smuzhiyun			pins = "sdc2_data";
1249*4882a593Smuzhiyun			bias-pull-up;
1250*4882a593Smuzhiyun			drive-strength = <16>;
1251*4882a593Smuzhiyun		};
1252*4882a593Smuzhiyun	};
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun	sd_cd_odl: sd-cd-odl {
1255*4882a593Smuzhiyun		pinmux {
1256*4882a593Smuzhiyun			pins = "gpio44";
1257*4882a593Smuzhiyun			function = "gpio";
1258*4882a593Smuzhiyun		};
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun		pinconf {
1261*4882a593Smuzhiyun			pins = "gpio44";
1262*4882a593Smuzhiyun			bias-pull-up;
1263*4882a593Smuzhiyun		};
1264*4882a593Smuzhiyun	};
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun	ts_int_l: ts-int-l {
1267*4882a593Smuzhiyun		pinmux  {
1268*4882a593Smuzhiyun			pins = "gpio125";
1269*4882a593Smuzhiyun			function = "gpio";
1270*4882a593Smuzhiyun		};
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun		pinconf {
1273*4882a593Smuzhiyun			pins = "gpio125";
1274*4882a593Smuzhiyun			bias-pull-up;
1275*4882a593Smuzhiyun		};
1276*4882a593Smuzhiyun	};
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun	ts_reset_l: ts-reset-l {
1279*4882a593Smuzhiyun		pinmux  {
1280*4882a593Smuzhiyun			pins = "gpio118";
1281*4882a593Smuzhiyun			function = "gpio";
1282*4882a593Smuzhiyun		};
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun		pinconf {
1285*4882a593Smuzhiyun			pins = "gpio118";
1286*4882a593Smuzhiyun			bias-disable;
1287*4882a593Smuzhiyun			drive-strength = <2>;
1288*4882a593Smuzhiyun		};
1289*4882a593Smuzhiyun	};
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun	ap_suspend_l_assert: ap_suspend_l_assert {
1292*4882a593Smuzhiyun		config {
1293*4882a593Smuzhiyun			pins = "gpio126";
1294*4882a593Smuzhiyun			function = "gpio";
1295*4882a593Smuzhiyun			bias-no-pull;
1296*4882a593Smuzhiyun			drive-strength = <2>;
1297*4882a593Smuzhiyun			output-low;
1298*4882a593Smuzhiyun		};
1299*4882a593Smuzhiyun	};
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun	ap_suspend_l_deassert: ap_suspend_l_deassert {
1302*4882a593Smuzhiyun		config {
1303*4882a593Smuzhiyun			pins = "gpio126";
1304*4882a593Smuzhiyun			function = "gpio";
1305*4882a593Smuzhiyun			bias-no-pull;
1306*4882a593Smuzhiyun			drive-strength = <2>;
1307*4882a593Smuzhiyun			output-high;
1308*4882a593Smuzhiyun		};
1309*4882a593Smuzhiyun	};
1310*4882a593Smuzhiyun};
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun&venus {
1313*4882a593Smuzhiyun	video-firmware {
1314*4882a593Smuzhiyun		iommus = <&apps_smmu 0x10b2 0x0>;
1315*4882a593Smuzhiyun	};
1316*4882a593Smuzhiyun};
1317