xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Google Trogdor board device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2020 Google LLC.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include "sc7180.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunap_ec_spi: &spi6 {};
13*4882a593Smuzhiyunap_h1_spi: &spi0 {};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun#include "sc7180-trogdor.dtsi"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	model = "Google Trogdor (rev1+)";
19*4882a593Smuzhiyun	compatible = "google,trogdor", "qcom,sc7180";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	panel: panel {
22*4882a593Smuzhiyun		compatible = "auo,b116xa01";
23*4882a593Smuzhiyun		power-supply = <&pp3300_dx_edp>;
24*4882a593Smuzhiyun		backlight = <&backlight>;
25*4882a593Smuzhiyun		hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		ports {
28*4882a593Smuzhiyun			port {
29*4882a593Smuzhiyun				panel_in_edp: endpoint {
30*4882a593Smuzhiyun					remote-endpoint = <&sn65dsi86_out>;
31*4882a593Smuzhiyun				};
32*4882a593Smuzhiyun			};
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&ap_sar_sensor_i2c {
38*4882a593Smuzhiyun	/* Not hooked up */
39*4882a593Smuzhiyun	status = "disabled";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyunap_ts_pen_1v8: &i2c4 {
43*4882a593Smuzhiyun	status = "okay";
44*4882a593Smuzhiyun	clock-frequency = <400000>;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	ap_ts: touchscreen@10 {
47*4882a593Smuzhiyun		compatible = "elan,ekth3500";
48*4882a593Smuzhiyun		reg = <0x10>;
49*4882a593Smuzhiyun		pinctrl-names = "default";
50*4882a593Smuzhiyun		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		interrupt-parent = <&tlmm>;
53*4882a593Smuzhiyun		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		vcc33-supply = <&pp3300_ts>;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun&sdhc_2 {
62*4882a593Smuzhiyun	status = "okay";
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun/* PINCTRL - board-specific pinctrl */
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun&tlmm {
68*4882a593Smuzhiyun	gpio-line-names = "ESIM_MISO",
69*4882a593Smuzhiyun			  "ESIM_MOSI",
70*4882a593Smuzhiyun			  "ESIM_CLK",
71*4882a593Smuzhiyun			  "ESIM_CS_L",
72*4882a593Smuzhiyun			  "FP_TO_AP_IRQ_L",
73*4882a593Smuzhiyun			  "FP_RST_L",
74*4882a593Smuzhiyun			  "AP_TP_I2C_SDA",
75*4882a593Smuzhiyun			  "AP_TP_I2C_SCL",
76*4882a593Smuzhiyun			  "TS_RESET_L",
77*4882a593Smuzhiyun			  "TS_INT_L",
78*4882a593Smuzhiyun			  "FPMCU_BOOT0",
79*4882a593Smuzhiyun			  "EDP_BRIJ_IRQ",
80*4882a593Smuzhiyun			  "AP_EDP_BKLTEN",
81*4882a593Smuzhiyun			  "",
82*4882a593Smuzhiyun			  "",
83*4882a593Smuzhiyun			  "EDP_BRIJ_I2C_SDA",
84*4882a593Smuzhiyun			  "EDP_BRIJ_I2C_SCL",
85*4882a593Smuzhiyun			  "HUB_RST_L",
86*4882a593Smuzhiyun			  "PEN_RST_ODL",
87*4882a593Smuzhiyun			  "AP_RAM_ID1",
88*4882a593Smuzhiyun			  "AP_RAM_ID2",
89*4882a593Smuzhiyun			  "PEN_IRQ_L",
90*4882a593Smuzhiyun			  "FPMCU_SEL",
91*4882a593Smuzhiyun			  "AMP_EN",
92*4882a593Smuzhiyun			  "P_SENSOR_INT_L",
93*4882a593Smuzhiyun			  "AP_SAR_SENSOR_SDA",
94*4882a593Smuzhiyun			  "AP_SAR_SENSOR_SCL",
95*4882a593Smuzhiyun			  "",
96*4882a593Smuzhiyun			  "HP_IRQ",
97*4882a593Smuzhiyun			  "AP_RAM_ID0",
98*4882a593Smuzhiyun			  "EN_PP3300_DX_EDP",
99*4882a593Smuzhiyun			  "AP_BRD_ID2",
100*4882a593Smuzhiyun			  "BRIJ_SUSPEND",
101*4882a593Smuzhiyun			  "AP_BRD_ID0",
102*4882a593Smuzhiyun			  "AP_H1_SPI_MISO",
103*4882a593Smuzhiyun			  "AP_H1_SPI_MOSI",
104*4882a593Smuzhiyun			  "AP_H1_SPI_CLK",
105*4882a593Smuzhiyun			  "AP_H1_SPI_CS_L",
106*4882a593Smuzhiyun			  "",
107*4882a593Smuzhiyun			  "",
108*4882a593Smuzhiyun			  "",
109*4882a593Smuzhiyun			  "",
110*4882a593Smuzhiyun			  "H1_AP_INT_ODL",
111*4882a593Smuzhiyun			  "",
112*4882a593Smuzhiyun			  "UART_AP_TX_DBG_RX",
113*4882a593Smuzhiyun			  "UART_DBG_TX_AP_RX",
114*4882a593Smuzhiyun			  "HP_I2C_SDA",
115*4882a593Smuzhiyun			  "HP_I2C_SCL",
116*4882a593Smuzhiyun			  "FORCED_USB_BOOT",
117*4882a593Smuzhiyun			  "",
118*4882a593Smuzhiyun			  "",
119*4882a593Smuzhiyun			  "AMP_DIN",
120*4882a593Smuzhiyun			  "PEN_PDCT_L",
121*4882a593Smuzhiyun			  "HP_BCLK",
122*4882a593Smuzhiyun			  "HP_LRCLK",
123*4882a593Smuzhiyun			  "HP_DOUT",
124*4882a593Smuzhiyun			  "HP_DIN",
125*4882a593Smuzhiyun			  "HP_MCLK",
126*4882a593Smuzhiyun			  "TRACKPAD_INT_1V8_ODL",
127*4882a593Smuzhiyun			  "AP_EC_SPI_MISO",
128*4882a593Smuzhiyun			  "AP_EC_SPI_MOSI",
129*4882a593Smuzhiyun			  "AP_EC_SPI_CLK",
130*4882a593Smuzhiyun			  "AP_EC_SPI_CS_L",
131*4882a593Smuzhiyun			  "AP_SPI_CLK",
132*4882a593Smuzhiyun			  "AP_SPI_MOSI",
133*4882a593Smuzhiyun			  "AP_SPI_MISO",
134*4882a593Smuzhiyun			  /*
135*4882a593Smuzhiyun			   * AP_FLASH_WP_L is crossystem ABI. Schematics
136*4882a593Smuzhiyun			   * call it BIOS_FLASH_WP_L.
137*4882a593Smuzhiyun			   */
138*4882a593Smuzhiyun			  "AP_FLASH_WP_L",
139*4882a593Smuzhiyun			  "DBG_SPI_HOLD_L",
140*4882a593Smuzhiyun			  "AP_SPI_CS0_L",
141*4882a593Smuzhiyun			  "SD_CD_ODL",
142*4882a593Smuzhiyun			  "",
143*4882a593Smuzhiyun			  "",
144*4882a593Smuzhiyun			  "",
145*4882a593Smuzhiyun			  "",
146*4882a593Smuzhiyun			  "",
147*4882a593Smuzhiyun			  "UIM2_DATA",
148*4882a593Smuzhiyun			  "UIM2_CLK",
149*4882a593Smuzhiyun			  "UIM2_RST",
150*4882a593Smuzhiyun			  "UIM2_PRESENT",
151*4882a593Smuzhiyun			  "UIM1_DATA",
152*4882a593Smuzhiyun			  "UIM1_CLK",
153*4882a593Smuzhiyun			  "UIM1_RST",
154*4882a593Smuzhiyun			  "",
155*4882a593Smuzhiyun			  "EN_PP3300_CODEC",
156*4882a593Smuzhiyun			  "EN_PP3300_HUB",
157*4882a593Smuzhiyun			  "",
158*4882a593Smuzhiyun			  "AP_SPI_FP_MISO",
159*4882a593Smuzhiyun			  "AP_SPI_FP_MOSI",
160*4882a593Smuzhiyun			  "AP_SPI_FP_CLK",
161*4882a593Smuzhiyun			  "AP_SPI_FP_CS_L",
162*4882a593Smuzhiyun			  "AP_SKU_ID1",
163*4882a593Smuzhiyun			  "AP_RST_REQ",
164*4882a593Smuzhiyun			  "",
165*4882a593Smuzhiyun			  "AP_BRD_ID1",
166*4882a593Smuzhiyun			  "AP_EC_INT_L",
167*4882a593Smuzhiyun			  "",
168*4882a593Smuzhiyun			  "",
169*4882a593Smuzhiyun			  "",
170*4882a593Smuzhiyun			  "",
171*4882a593Smuzhiyun			  "",
172*4882a593Smuzhiyun			  "",
173*4882a593Smuzhiyun			  "",
174*4882a593Smuzhiyun			  "",
175*4882a593Smuzhiyun			  "",
176*4882a593Smuzhiyun			  "EDP_BRIJ_EN",
177*4882a593Smuzhiyun			  "AP_SKU_ID0",
178*4882a593Smuzhiyun			  "",
179*4882a593Smuzhiyun			  "",
180*4882a593Smuzhiyun			  "",
181*4882a593Smuzhiyun			  "",
182*4882a593Smuzhiyun			  "",
183*4882a593Smuzhiyun			  "",
184*4882a593Smuzhiyun			  "",
185*4882a593Smuzhiyun			  "",
186*4882a593Smuzhiyun			  "",
187*4882a593Smuzhiyun			  "AP_TS_PEN_I2C_SDA",
188*4882a593Smuzhiyun			  "AP_TS_PEN_I2C_SCL",
189*4882a593Smuzhiyun			  "DP_HOT_PLUG_DET",
190*4882a593Smuzhiyun			  "EC_IN_RW_ODL";
191*4882a593Smuzhiyun};
192