xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/pms405.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun// Copyright (c) 2018, Linaro Limited
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include <dt-bindings/spmi/spmi.h>
5*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h>
6*4882a593Smuzhiyun#include <dt-bindings/iio/qcom,spmi-vadc.h>
7*4882a593Smuzhiyun#include <dt-bindings/thermal/thermal.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	thermal-zones {
11*4882a593Smuzhiyun		pms405 {
12*4882a593Smuzhiyun			polling-delay-passive = <250>;
13*4882a593Smuzhiyun			polling-delay = <1000>;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun			thermal-sensors = <&pms405_temp>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun			trips {
18*4882a593Smuzhiyun				pms405_alert0: pms405-alert0 {
19*4882a593Smuzhiyun					temperature = <105000>;
20*4882a593Smuzhiyun					hysteresis = <2000>;
21*4882a593Smuzhiyun					type = "passive";
22*4882a593Smuzhiyun				};
23*4882a593Smuzhiyun				pms405_crit: pms405-crit {
24*4882a593Smuzhiyun					temperature = <125000>;
25*4882a593Smuzhiyun					hysteresis = <2000>;
26*4882a593Smuzhiyun					type = "critical";
27*4882a593Smuzhiyun				};
28*4882a593Smuzhiyun			};
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun&spmi_bus {
34*4882a593Smuzhiyun	pms405_0: pms405@0 {
35*4882a593Smuzhiyun		compatible = "qcom,spmi-pmic";
36*4882a593Smuzhiyun		reg = <0x0 SPMI_USID>;
37*4882a593Smuzhiyun		#address-cells = <1>;
38*4882a593Smuzhiyun		#size-cells = <0>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		pms405_gpios: gpio@c000 {
41*4882a593Smuzhiyun			compatible = "qcom,pms405-gpio";
42*4882a593Smuzhiyun			reg = <0xc000>;
43*4882a593Smuzhiyun			gpio-controller;
44*4882a593Smuzhiyun			#gpio-cells = <2>;
45*4882a593Smuzhiyun			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
46*4882a593Smuzhiyun				<0 0xc1 0 IRQ_TYPE_NONE>,
47*4882a593Smuzhiyun				<0 0xc2 0 IRQ_TYPE_NONE>,
48*4882a593Smuzhiyun				<0 0xc3 0 IRQ_TYPE_NONE>,
49*4882a593Smuzhiyun				<0 0xc4 0 IRQ_TYPE_NONE>,
50*4882a593Smuzhiyun				<0 0xc5 0 IRQ_TYPE_NONE>,
51*4882a593Smuzhiyun				<0 0xc6 0 IRQ_TYPE_NONE>,
52*4882a593Smuzhiyun				<0 0xc7 0 IRQ_TYPE_NONE>,
53*4882a593Smuzhiyun				<0 0xc8 0 IRQ_TYPE_NONE>,
54*4882a593Smuzhiyun				<0 0xc9 0 IRQ_TYPE_NONE>,
55*4882a593Smuzhiyun				<0 0xca 0 IRQ_TYPE_NONE>,
56*4882a593Smuzhiyun				<0 0xcb 0 IRQ_TYPE_NONE>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		pon@800 {
60*4882a593Smuzhiyun			compatible = "qcom,pms405-pon";
61*4882a593Smuzhiyun			reg = <0x0800>;
62*4882a593Smuzhiyun			mode-bootloader = <0x2>;
63*4882a593Smuzhiyun			mode-recovery = <0x1>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun			pwrkey {
66*4882a593Smuzhiyun				compatible = "qcom,pm8941-pwrkey";
67*4882a593Smuzhiyun				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
68*4882a593Smuzhiyun				debounce = <15625>;
69*4882a593Smuzhiyun				bias-pull-up;
70*4882a593Smuzhiyun				linux,code = <KEY_POWER>;
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		pms405_temp: temp-alarm@2400 {
75*4882a593Smuzhiyun			compatible = "qcom,spmi-temp-alarm";
76*4882a593Smuzhiyun			reg = <0x2400>;
77*4882a593Smuzhiyun			interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
78*4882a593Smuzhiyun			io-channels = <&pms405_adc ADC5_DIE_TEMP>;
79*4882a593Smuzhiyun			io-channel-names = "thermal";
80*4882a593Smuzhiyun			#thermal-sensor-cells = <0>;
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		pms405_adc: adc@3100 {
84*4882a593Smuzhiyun			compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
85*4882a593Smuzhiyun			reg = <0x3100>;
86*4882a593Smuzhiyun			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
87*4882a593Smuzhiyun			#address-cells = <1>;
88*4882a593Smuzhiyun			#size-cells = <0>;
89*4882a593Smuzhiyun			#io-channel-cells = <1>;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun			ref_gnd@0 {
92*4882a593Smuzhiyun				reg = <ADC5_REF_GND>;
93*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun			vref_1p25@1 {
97*4882a593Smuzhiyun				reg = <ADC5_1P25VREF>;
98*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
99*4882a593Smuzhiyun			};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun			pon_1: vph_pwr@131 {
102*4882a593Smuzhiyun				reg = <ADC5_VPH_PWR>;
103*4882a593Smuzhiyun				qcom,pre-scaling = <1 3>;
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun			die_temp@6 {
107*4882a593Smuzhiyun				reg = <ADC5_DIE_TEMP>;
108*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun			pa_therm1: thermistor1@77 {
112*4882a593Smuzhiyun				reg = <ADC5_AMUX_THM1_100K_PU>;
113*4882a593Smuzhiyun				qcom,ratiometric;
114*4882a593Smuzhiyun				qcom,hw-settle-time = <200>;
115*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			pa_therm3: thermistor3@79 {
119*4882a593Smuzhiyun				reg = <ADC5_AMUX_THM3_100K_PU>;
120*4882a593Smuzhiyun				qcom,ratiometric;
121*4882a593Smuzhiyun				qcom,hw-settle-time = <200>;
122*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			xo_therm: xo_temp@76 {
126*4882a593Smuzhiyun				reg = <ADC5_XO_THERM_100K_PU>;
127*4882a593Smuzhiyun				qcom,ratiometric;
128*4882a593Smuzhiyun				qcom,hw-settle-time = <200>;
129*4882a593Smuzhiyun				qcom,pre-scaling = <1 1>;
130*4882a593Smuzhiyun			};
131*4882a593Smuzhiyun		};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		rtc@6000 {
134*4882a593Smuzhiyun			compatible = "qcom,pm8941-rtc";
135*4882a593Smuzhiyun			reg = <0x6000>;
136*4882a593Smuzhiyun			reg-names = "rtc", "alarm";
137*4882a593Smuzhiyun			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun	pms405_1: pms405@1 {
142*4882a593Smuzhiyun		compatible = "qcom,spmi-pmic";
143*4882a593Smuzhiyun		reg = <0x1 SPMI_USID>;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun		pms405_spmi_regulators: regulators {
146*4882a593Smuzhiyun			compatible = "qcom,pms405-regulators";
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun};
150