1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 3*4882a593Smuzhiyun#include <dt-bindings/spmi/spmi.h> 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun&spmi_bus { 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun pmic@2 { 8*4882a593Smuzhiyun compatible = "qcom,pmi8994", "qcom,spmi-pmic"; 9*4882a593Smuzhiyun reg = <0x2 SPMI_USID>; 10*4882a593Smuzhiyun #address-cells = <1>; 11*4882a593Smuzhiyun #size-cells = <0>; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun pmi8994_gpios: gpios@c000 { 14*4882a593Smuzhiyun compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio"; 15*4882a593Smuzhiyun reg = <0xc000>; 16*4882a593Smuzhiyun gpio-controller; 17*4882a593Smuzhiyun gpio-ranges = <&pmi8994_gpios 0 0 10>; 18*4882a593Smuzhiyun #gpio-cells = <2>; 19*4882a593Smuzhiyun interrupt-controller; 20*4882a593Smuzhiyun #interrupt-cells = <2>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun pmic@3 { 25*4882a593Smuzhiyun compatible = "qcom,pmi8994", "qcom,spmi-pmic"; 26*4882a593Smuzhiyun reg = <0x3 SPMI_USID>; 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun pmi8994_spmi_regulators: regulators { 31*4882a593Smuzhiyun compatible = "qcom,pmi8994-regulators"; 32*4882a593Smuzhiyun #address-cells = <1>; 33*4882a593Smuzhiyun #size-cells = <1>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun}; 37