1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* Copyright 2018 Google LLC. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/spmi/spmi.h> 5*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun&spmi_bus { 8*4882a593Smuzhiyun pm8005_lsid0: pmic@4 { 9*4882a593Smuzhiyun compatible = "qcom,pm8005", "qcom,spmi-pmic"; 10*4882a593Smuzhiyun reg = <0x4 SPMI_USID>; 11*4882a593Smuzhiyun #address-cells = <1>; 12*4882a593Smuzhiyun #size-cells = <0>; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun pm8005_gpio: gpios@c000 { 15*4882a593Smuzhiyun compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio"; 16*4882a593Smuzhiyun reg = <0xc000>; 17*4882a593Smuzhiyun gpio-controller; 18*4882a593Smuzhiyun gpio-ranges = <&pm8005_gpio 0 0 4>; 19*4882a593Smuzhiyun #gpio-cells = <2>; 20*4882a593Smuzhiyun interrupt-controller; 21*4882a593Smuzhiyun #interrupt-cells = <2>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun pm8005_lsid1: pmic@5 { 27*4882a593Smuzhiyun compatible = "qcom,pm8005", "qcom,spmi-pmic"; 28*4882a593Smuzhiyun reg = <0x5 SPMI_USID>; 29*4882a593Smuzhiyun #address-cells = <1>; 30*4882a593Smuzhiyun #size-cells = <0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33