1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include "tegra210-p2180.dtsi" 5*4882a593Smuzhiyun#include "tegra210-p2597.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "NVIDIA Jetson TX1 Developer Kit"; 9*4882a593Smuzhiyun compatible = "nvidia,p2371-2180", "nvidia,tegra210"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun pcie@1003000 { 12*4882a593Smuzhiyun status = "okay"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun avdd-pll-uerefe-supply = <&avdd_1v05_pll>; 15*4882a593Smuzhiyun hvddio-pex-supply = <&vdd_1v8>; 16*4882a593Smuzhiyun dvddio-pex-supply = <&vdd_pex_1v05>; 17*4882a593Smuzhiyun dvdd-pex-pll-supply = <&vdd_pex_1v05>; 18*4882a593Smuzhiyun hvdd-pex-pll-e-supply = <&vdd_1v8>; 19*4882a593Smuzhiyun vddio-pex-ctl-supply = <&vdd_1v8>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun pci@1,0 { 22*4882a593Smuzhiyun phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, 23*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 24*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 25*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>; 26*4882a593Smuzhiyun phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 27*4882a593Smuzhiyun status = "okay"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun pci@2,0 { 31*4882a593Smuzhiyun phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 32*4882a593Smuzhiyun phy-names = "pcie-0"; 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun host1x@50000000 { 38*4882a593Smuzhiyun dsi@54300000 { 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun avdd-dsi-csi-supply = <&vdd_dsi_csi>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun panel@0 { 44*4882a593Smuzhiyun compatible = "auo,b080uan01"; 45*4882a593Smuzhiyun reg = <0>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun enable-gpios = <&gpio TEGRA_GPIO(V, 2) 48*4882a593Smuzhiyun GPIO_ACTIVE_HIGH>; 49*4882a593Smuzhiyun power-supply = <&vdd_5v0_io>; 50*4882a593Smuzhiyun backlight = <&backlight>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun i2c@7000c400 { 56*4882a593Smuzhiyun backlight: backlight@2c { 57*4882a593Smuzhiyun compatible = "ti,lp8557"; 58*4882a593Smuzhiyun reg = <0x2c>; 59*4882a593Smuzhiyun power-supply = <&vdd_3v3_sys>; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun dev-ctrl = /bits/ 8 <0x80>; 62*4882a593Smuzhiyun init-brt = /bits/ 8 <0xff>; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun pwm-period = <29334>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun pwms = <&pwm 0 29334>; 67*4882a593Smuzhiyun pwm-names = "lp8557"; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* 3 LED string */ 70*4882a593Smuzhiyun rom_14h { 71*4882a593Smuzhiyun rom-addr = /bits/ 8 <0x14>; 72*4882a593Smuzhiyun rom-val = /bits/ 8 <0x87>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* boost frequency 1 MHz */ 76*4882a593Smuzhiyun rom_13h { 77*4882a593Smuzhiyun rom-addr = /bits/ 8 <0x13>; 78*4882a593Smuzhiyun rom-val = /bits/ 8 <0x01>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun i2c@7000c500 { 84*4882a593Smuzhiyun /* carrier board ID EEPROM */ 85*4882a593Smuzhiyun eeprom@57 { 86*4882a593Smuzhiyun compatible = "atmel,24c02"; 87*4882a593Smuzhiyun reg = <0x57>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun label = "system"; 90*4882a593Smuzhiyun vcc-supply = <&vdd_1v8>; 91*4882a593Smuzhiyun address-width = <8>; 92*4882a593Smuzhiyun pagesize = <8>; 93*4882a593Smuzhiyun size = <256>; 94*4882a593Smuzhiyun read-only; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun clock@70110000 { 99*4882a593Smuzhiyun status = "okay"; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun nvidia,cf = <6>; 102*4882a593Smuzhiyun nvidia,ci = <0>; 103*4882a593Smuzhiyun nvidia,cg = <2>; 104*4882a593Smuzhiyun nvidia,droop-ctrl = <0x00000f00>; 105*4882a593Smuzhiyun nvidia,force-mode = <1>; 106*4882a593Smuzhiyun nvidia,sample-rate = <25000>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun nvidia,pwm-min-microvolts = <708000>; 109*4882a593Smuzhiyun nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */ 110*4882a593Smuzhiyun nvidia,pwm-to-pmic; 111*4882a593Smuzhiyun nvidia,pwm-tristate-microvolts = <1000000>; 112*4882a593Smuzhiyun nvidia,pwm-voltage-step-microvolts = <19200>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable"; 115*4882a593Smuzhiyun pinctrl-0 = <&dvfs_pwm_active_state>; 116*4882a593Smuzhiyun pinctrl-1 = <&dvfs_pwm_inactive_state>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun aconnect@702c0000 { 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun dma@702e2000 { 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun interrupt-controller@702f9000 { 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun}; 131