1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2019 BayLibre, SAS. 4*4882a593Smuzhiyun * Author: Fabien Parent <fparent@baylibre.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun aliases { 11*4882a593Smuzhiyun serial0 = &uart0; 12*4882a593Smuzhiyun ethernet0 = ðernet; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun chosen { 16*4882a593Smuzhiyun stdout-path = "serial0:921600n8"; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun firmware { 20*4882a593Smuzhiyun optee: optee@4fd00000 { 21*4882a593Smuzhiyun compatible = "linaro,optee-tz"; 22*4882a593Smuzhiyun method = "smc"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun gpio-keys { 27*4882a593Smuzhiyun compatible = "gpio-keys"; 28*4882a593Smuzhiyun input-name = "gpio-keys"; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun pinctrl-0 = <&gpio_keys_default>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun volume-up { 33*4882a593Smuzhiyun gpios = <&pio 42 GPIO_ACTIVE_LOW>; 34*4882a593Smuzhiyun label = "volume_up"; 35*4882a593Smuzhiyun linux,code = <115>; 36*4882a593Smuzhiyun wakeup-source; 37*4882a593Smuzhiyun debounce-interval = <15>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun volume-down { 41*4882a593Smuzhiyun gpios = <&pio 43 GPIO_ACTIVE_LOW>; 42*4882a593Smuzhiyun label = "volume_down"; 43*4882a593Smuzhiyun linux,code = <114>; 44*4882a593Smuzhiyun wakeup-source; 45*4882a593Smuzhiyun debounce-interval = <15>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&i2c0 { 51*4882a593Smuzhiyun clock-div = <2>; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins_a>; 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun tca6416: gpio@20 { 57*4882a593Smuzhiyun compatible = "ti,tca6416"; 58*4882a593Smuzhiyun reg = <0x20>; 59*4882a593Smuzhiyun reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>; 60*4882a593Smuzhiyun pinctrl-names = "default"; 61*4882a593Smuzhiyun pinctrl-0 = <&tca6416_pins>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun gpio-controller; 64*4882a593Smuzhiyun #gpio-cells = <2>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun eint20_mux_sel0 { 67*4882a593Smuzhiyun gpio-hog; 68*4882a593Smuzhiyun gpios = <0 0>; 69*4882a593Smuzhiyun input; 70*4882a593Smuzhiyun line-name = "eint20_mux_sel0"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun expcon_mux_sel1 { 74*4882a593Smuzhiyun gpio-hog; 75*4882a593Smuzhiyun gpios = <1 0>; 76*4882a593Smuzhiyun input; 77*4882a593Smuzhiyun line-name = "expcon_mux_sel1"; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun mrg_di_mux_sel2 { 81*4882a593Smuzhiyun gpio-hog; 82*4882a593Smuzhiyun gpios = <2 0>; 83*4882a593Smuzhiyun input; 84*4882a593Smuzhiyun line-name = "mrg_di_mux_sel2"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun sd_sdio_mux_sel3 { 88*4882a593Smuzhiyun gpio-hog; 89*4882a593Smuzhiyun gpios = <3 0>; 90*4882a593Smuzhiyun input; 91*4882a593Smuzhiyun line-name = "sd_sdio_mux_sel3"; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun sd_sdio_mux_ctrl7 { 95*4882a593Smuzhiyun gpio-hog; 96*4882a593Smuzhiyun gpios = <7 0>; 97*4882a593Smuzhiyun output-low; 98*4882a593Smuzhiyun line-name = "sd_sdio_mux_ctrl7"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun hw_id0 { 102*4882a593Smuzhiyun gpio-hog; 103*4882a593Smuzhiyun gpios = <8 0>; 104*4882a593Smuzhiyun input; 105*4882a593Smuzhiyun line-name = "hw_id0"; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun hw_id1 { 109*4882a593Smuzhiyun gpio-hog; 110*4882a593Smuzhiyun gpios = <9 0>; 111*4882a593Smuzhiyun input; 112*4882a593Smuzhiyun line-name = "hw_id1"; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun hw_id2 { 116*4882a593Smuzhiyun gpio-hog; 117*4882a593Smuzhiyun gpios = <10 0>; 118*4882a593Smuzhiyun input; 119*4882a593Smuzhiyun line-name = "hw_id2"; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun fg_int_n { 123*4882a593Smuzhiyun gpio-hog; 124*4882a593Smuzhiyun gpios = <11 0>; 125*4882a593Smuzhiyun input; 126*4882a593Smuzhiyun line-name = "fg_int_n"; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun usba_pwr_en { 130*4882a593Smuzhiyun gpio-hog; 131*4882a593Smuzhiyun gpios = <12 0>; 132*4882a593Smuzhiyun output-high; 133*4882a593Smuzhiyun line-name = "usba_pwr_en"; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun wifi_3v3_pg { 137*4882a593Smuzhiyun gpio-hog; 138*4882a593Smuzhiyun gpios = <13 0>; 139*4882a593Smuzhiyun input; 140*4882a593Smuzhiyun line-name = "wifi_3v3_pg"; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun cam_rst { 144*4882a593Smuzhiyun gpio-hog; 145*4882a593Smuzhiyun gpios = <14 0>; 146*4882a593Smuzhiyun output-low; 147*4882a593Smuzhiyun line-name = "cam_rst"; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun cam_pwdn { 151*4882a593Smuzhiyun gpio-hog; 152*4882a593Smuzhiyun gpios = <15 0>; 153*4882a593Smuzhiyun output-low; 154*4882a593Smuzhiyun line-name = "cam_pwdn"; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&i2c2 { 160*4882a593Smuzhiyun clock-div = <2>; 161*4882a593Smuzhiyun pinctrl-names = "default"; 162*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins_a>; 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&uart0 { 167*4882a593Smuzhiyun status = "okay"; 168*4882a593Smuzhiyun}; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyunðernet { 171*4882a593Smuzhiyun pinctrl-names = "default"; 172*4882a593Smuzhiyun pinctrl-0 = <ðernet_pins_default>; 173*4882a593Smuzhiyun phy-handle = <ð_phy>; 174*4882a593Smuzhiyun phy-mode = "rmii"; 175*4882a593Smuzhiyun mac-address = [00 00 00 00 00 00]; 176*4882a593Smuzhiyun status = "okay"; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun mdio { 179*4882a593Smuzhiyun #address-cells = <1>; 180*4882a593Smuzhiyun #size-cells = <0>; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun eth_phy: ethernet-phy@0 { 183*4882a593Smuzhiyun reg = <0>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&usb0 { 189*4882a593Smuzhiyun status = "okay"; 190*4882a593Smuzhiyun dr_mode = "peripheral"; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun usb_con: connector { 193*4882a593Smuzhiyun compatible = "usb-c-connector"; 194*4882a593Smuzhiyun label = "USB-C"; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&usb0_phy { 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&pio { 203*4882a593Smuzhiyun gpio_keys_default: gpiodefault { 204*4882a593Smuzhiyun pins_cmd_dat { 205*4882a593Smuzhiyun pinmux = <MT8516_PIN_42_KPCOL0__FUNC_GPIO42>, 206*4882a593Smuzhiyun <MT8516_PIN_43_KPCOL1__FUNC_GPIO43>; 207*4882a593Smuzhiyun bias-pull-up; 208*4882a593Smuzhiyun input-enable; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun i2c0_pins_a: i2c0@0 { 213*4882a593Smuzhiyun pins1 { 214*4882a593Smuzhiyun pinmux = <MT8516_PIN_58_SDA0__FUNC_SDA0_0>, 215*4882a593Smuzhiyun <MT8516_PIN_59_SCL0__FUNC_SCL0_0>; 216*4882a593Smuzhiyun bias-disable; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun i2c2_pins_a: i2c2@0 { 221*4882a593Smuzhiyun pins1 { 222*4882a593Smuzhiyun pinmux = <MT8516_PIN_60_SDA2__FUNC_SDA2_0>, 223*4882a593Smuzhiyun <MT8516_PIN_61_SCL2__FUNC_SCL2_0>; 224*4882a593Smuzhiyun bias-disable; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun tca6416_pins: pinmux_tca6416_pins { 229*4882a593Smuzhiyun gpio_mux_rst_n_pin { 230*4882a593Smuzhiyun pinmux = <MT8516_PIN_65_UTXD1__FUNC_GPIO65>; 231*4882a593Smuzhiyun output-high; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun gpio_mux_int_n_pin { 235*4882a593Smuzhiyun pinmux = <MT8516_PIN_64_URXD1__FUNC_GPIO64>; 236*4882a593Smuzhiyun input-enable; 237*4882a593Smuzhiyun bias-pull-up; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun ethernet_pins_default: ethernet { 242*4882a593Smuzhiyun pins_ethernet { 243*4882a593Smuzhiyun pinmux = <MT8516_PIN_0_EINT0__FUNC_EXT_TXD0>, 244*4882a593Smuzhiyun <MT8516_PIN_1_EINT1__FUNC_EXT_TXD1>, 245*4882a593Smuzhiyun <MT8516_PIN_5_EINT5__FUNC_EXT_RXER>, 246*4882a593Smuzhiyun <MT8516_PIN_6_EINT6__FUNC_EXT_RXC>, 247*4882a593Smuzhiyun <MT8516_PIN_7_EINT7__FUNC_EXT_RXDV>, 248*4882a593Smuzhiyun <MT8516_PIN_8_EINT8__FUNC_EXT_RXD0>, 249*4882a593Smuzhiyun <MT8516_PIN_9_EINT9__FUNC_EXT_RXD1>, 250*4882a593Smuzhiyun <MT8516_PIN_12_EINT12__FUNC_EXT_TXEN>, 251*4882a593Smuzhiyun <MT8516_PIN_38_MRG_DI__FUNC_EXT_MDIO>, 252*4882a593Smuzhiyun <MT8516_PIN_39_MRG_DO__FUNC_EXT_MDC>; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun}; 256