xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2019 Google LLC
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "mt8183-kukui.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	ppvarn_lcd: ppvarn-lcd {
10*4882a593Smuzhiyun		compatible = "regulator-fixed";
11*4882a593Smuzhiyun		regulator-name = "ppvarn_lcd";
12*4882a593Smuzhiyun		pinctrl-names = "default";
13*4882a593Smuzhiyun		pinctrl-0 = <&ppvarn_lcd_en>;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun		enable-active-high;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun		gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	ppvarp_lcd: ppvarp-lcd {
21*4882a593Smuzhiyun		compatible = "regulator-fixed";
22*4882a593Smuzhiyun		regulator-name = "ppvarp_lcd";
23*4882a593Smuzhiyun		pinctrl-names = "default";
24*4882a593Smuzhiyun		pinctrl-0 = <&ppvarp_lcd_en>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		enable-active-high;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	pp1800_lcd: pp1800-lcd {
32*4882a593Smuzhiyun		compatible = "regulator-fixed";
33*4882a593Smuzhiyun		regulator-name = "pp1800_lcd";
34*4882a593Smuzhiyun		pinctrl-names = "default";
35*4882a593Smuzhiyun		pinctrl-0 = <&pp1800_lcd_en>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun		enable-active-high;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun&bluetooth {
44*4882a593Smuzhiyun	firmware-name = "nvm_00440302_i2s_eu.bin";
45*4882a593Smuzhiyun};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun&i2c0 {
48*4882a593Smuzhiyun	status = "okay";
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	touchscreen4: touchscreen@5d {
51*4882a593Smuzhiyun		compatible = "hid-over-i2c";
52*4882a593Smuzhiyun		reg = <0x5d>;
53*4882a593Smuzhiyun		pinctrl-names = "default";
54*4882a593Smuzhiyun		pinctrl-0 = <&open_touch>;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		interrupt-parent = <&pio>;
57*4882a593Smuzhiyun		interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		post-power-on-delay-ms = <10>;
60*4882a593Smuzhiyun		hid-descr-addr = <0x0001>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&mt6358_vcama2_reg {
65*4882a593Smuzhiyun	regulator-min-microvolt = <2800000>;
66*4882a593Smuzhiyun	regulator-max-microvolt = <2800000>;
67*4882a593Smuzhiyun};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun&i2c2 {
70*4882a593Smuzhiyun	pinctrl-names = "default";
71*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
72*4882a593Smuzhiyun	status = "okay";
73*4882a593Smuzhiyun	clock-frequency = <400000>;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	eeprom@58 {
76*4882a593Smuzhiyun		compatible = "atmel,24c32";
77*4882a593Smuzhiyun		reg = <0x58>;
78*4882a593Smuzhiyun		pagesize = <32>;
79*4882a593Smuzhiyun	};
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&i2c4 {
83*4882a593Smuzhiyun	pinctrl-names = "default";
84*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_pins>;
85*4882a593Smuzhiyun	status = "okay";
86*4882a593Smuzhiyun	clock-frequency = <400000>;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	eeprom@54 {
89*4882a593Smuzhiyun		compatible = "atmel,24c32";
90*4882a593Smuzhiyun		reg = <0x54>;
91*4882a593Smuzhiyun		pagesize = <32>;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&pio {
96*4882a593Smuzhiyun	/* 192 lines */
97*4882a593Smuzhiyun	gpio-line-names =
98*4882a593Smuzhiyun		"SPI_AP_EC_CS_L",
99*4882a593Smuzhiyun		"SPI_AP_EC_MOSI",
100*4882a593Smuzhiyun		"SPI_AP_EC_CLK",
101*4882a593Smuzhiyun		"I2S3_DO",
102*4882a593Smuzhiyun		"USB_PD_INT_ODL",
103*4882a593Smuzhiyun		"",
104*4882a593Smuzhiyun		"",
105*4882a593Smuzhiyun		"",
106*4882a593Smuzhiyun		"",
107*4882a593Smuzhiyun		"IT6505_HPD_L",
108*4882a593Smuzhiyun		"I2S3_TDM_D3",
109*4882a593Smuzhiyun		"SOC_I2C6_1V8_SCL",
110*4882a593Smuzhiyun		"SOC_I2C6_1V8_SDA",
111*4882a593Smuzhiyun		"DPI_D0",
112*4882a593Smuzhiyun		"DPI_D1",
113*4882a593Smuzhiyun		"DPI_D2",
114*4882a593Smuzhiyun		"DPI_D3",
115*4882a593Smuzhiyun		"DPI_D4",
116*4882a593Smuzhiyun		"DPI_D5",
117*4882a593Smuzhiyun		"DPI_D6",
118*4882a593Smuzhiyun		"DPI_D7",
119*4882a593Smuzhiyun		"DPI_D8",
120*4882a593Smuzhiyun		"DPI_D9",
121*4882a593Smuzhiyun		"DPI_D10",
122*4882a593Smuzhiyun		"DPI_D11",
123*4882a593Smuzhiyun		"DPI_HSYNC",
124*4882a593Smuzhiyun		"DPI_VSYNC",
125*4882a593Smuzhiyun		"DPI_DE",
126*4882a593Smuzhiyun		"DPI_CK",
127*4882a593Smuzhiyun		"AP_MSDC1_CLK",
128*4882a593Smuzhiyun		"AP_MSDC1_DAT3",
129*4882a593Smuzhiyun		"AP_MSDC1_CMD",
130*4882a593Smuzhiyun		"AP_MSDC1_DAT0",
131*4882a593Smuzhiyun		"AP_MSDC1_DAT2",
132*4882a593Smuzhiyun		"AP_MSDC1_DAT1",
133*4882a593Smuzhiyun		"",
134*4882a593Smuzhiyun		"",
135*4882a593Smuzhiyun		"",
136*4882a593Smuzhiyun		"",
137*4882a593Smuzhiyun		"",
138*4882a593Smuzhiyun		"",
139*4882a593Smuzhiyun		"OTG_EN",
140*4882a593Smuzhiyun		"DRVBUS",
141*4882a593Smuzhiyun		"DISP_PWM",
142*4882a593Smuzhiyun		"DSI_TE",
143*4882a593Smuzhiyun		"LCM_RST_1V8",
144*4882a593Smuzhiyun		"AP_CTS_WIFI_RTS",
145*4882a593Smuzhiyun		"AP_RTS_WIFI_CTS",
146*4882a593Smuzhiyun		"SOC_I2C5_1V8_SCL",
147*4882a593Smuzhiyun		"SOC_I2C5_1V8_SDA",
148*4882a593Smuzhiyun		"SOC_I2C3_1V8_SCL",
149*4882a593Smuzhiyun		"SOC_I2C3_1V8_SDA",
150*4882a593Smuzhiyun		"",
151*4882a593Smuzhiyun		"",
152*4882a593Smuzhiyun		"",
153*4882a593Smuzhiyun		"",
154*4882a593Smuzhiyun		"",
155*4882a593Smuzhiyun		"",
156*4882a593Smuzhiyun		"",
157*4882a593Smuzhiyun		"",
158*4882a593Smuzhiyun		"",
159*4882a593Smuzhiyun		"",
160*4882a593Smuzhiyun		"",
161*4882a593Smuzhiyun		"",
162*4882a593Smuzhiyun		"",
163*4882a593Smuzhiyun		"",
164*4882a593Smuzhiyun		"",
165*4882a593Smuzhiyun		"",
166*4882a593Smuzhiyun		"",
167*4882a593Smuzhiyun		"",
168*4882a593Smuzhiyun		"",
169*4882a593Smuzhiyun		"",
170*4882a593Smuzhiyun		"",
171*4882a593Smuzhiyun		"",
172*4882a593Smuzhiyun		"",
173*4882a593Smuzhiyun		"",
174*4882a593Smuzhiyun		"",
175*4882a593Smuzhiyun		"",
176*4882a593Smuzhiyun		"",
177*4882a593Smuzhiyun		"",
178*4882a593Smuzhiyun		"",
179*4882a593Smuzhiyun		"SOC_I2C1_1V8_SDA",
180*4882a593Smuzhiyun		"SOC_I2C0_1V8_SDA",
181*4882a593Smuzhiyun		"SOC_I2C0_1V8_SCL",
182*4882a593Smuzhiyun		"SOC_I2C1_1V8_SCL",
183*4882a593Smuzhiyun		"AP_SPI_H1_MISO",
184*4882a593Smuzhiyun		"AP_SPI_H1_CS_L",
185*4882a593Smuzhiyun		"AP_SPI_H1_MOSI",
186*4882a593Smuzhiyun		"AP_SPI_H1_CLK",
187*4882a593Smuzhiyun		"I2S5_BCK",
188*4882a593Smuzhiyun		"I2S5_LRCK",
189*4882a593Smuzhiyun		"I2S5_DO",
190*4882a593Smuzhiyun		"BOOTBLOCK_EN_L",
191*4882a593Smuzhiyun		"MT8183_KPCOL0",
192*4882a593Smuzhiyun		"SPI_AP_EC_MISO",
193*4882a593Smuzhiyun		"UART_DBG_TX_AP_RX",
194*4882a593Smuzhiyun		"UART_AP_TX_DBG_RX",
195*4882a593Smuzhiyun		"I2S2_MCK",
196*4882a593Smuzhiyun		"I2S2_BCK",
197*4882a593Smuzhiyun		"CLK_5M_WCAM",
198*4882a593Smuzhiyun		"CLK_2M_UCAM",
199*4882a593Smuzhiyun		"I2S2_LRCK",
200*4882a593Smuzhiyun		"I2S2_DI",
201*4882a593Smuzhiyun		"SOC_I2C2_1V8_SCL",
202*4882a593Smuzhiyun		"SOC_I2C2_1V8_SDA",
203*4882a593Smuzhiyun		"SOC_I2C4_1V8_SCL",
204*4882a593Smuzhiyun		"SOC_I2C4_1V8_SDA",
205*4882a593Smuzhiyun		"",
206*4882a593Smuzhiyun		"SCL8",
207*4882a593Smuzhiyun		"SDA8",
208*4882a593Smuzhiyun		"FCAM_PWDN_L",
209*4882a593Smuzhiyun		"",
210*4882a593Smuzhiyun		"",
211*4882a593Smuzhiyun		"",
212*4882a593Smuzhiyun		"",
213*4882a593Smuzhiyun		"",
214*4882a593Smuzhiyun		"",
215*4882a593Smuzhiyun		"",
216*4882a593Smuzhiyun		"",
217*4882a593Smuzhiyun		"",
218*4882a593Smuzhiyun		"",
219*4882a593Smuzhiyun		"",
220*4882a593Smuzhiyun		"",
221*4882a593Smuzhiyun		"",
222*4882a593Smuzhiyun		"",
223*4882a593Smuzhiyun		"",
224*4882a593Smuzhiyun		"",
225*4882a593Smuzhiyun		"",
226*4882a593Smuzhiyun		"",
227*4882a593Smuzhiyun		"",
228*4882a593Smuzhiyun		"",
229*4882a593Smuzhiyun		"",
230*4882a593Smuzhiyun		"",
231*4882a593Smuzhiyun		"",
232*4882a593Smuzhiyun		"",
233*4882a593Smuzhiyun		"",
234*4882a593Smuzhiyun		"I2S_PMIC",
235*4882a593Smuzhiyun		"I2S_PMIC",
236*4882a593Smuzhiyun		"I2S_PMIC",
237*4882a593Smuzhiyun		"I2S_PMIC",
238*4882a593Smuzhiyun		"I2S_PMIC",
239*4882a593Smuzhiyun		"I2S_PMIC",
240*4882a593Smuzhiyun		"I2S_PMIC",
241*4882a593Smuzhiyun		"I2S_PMIC",
242*4882a593Smuzhiyun		"",
243*4882a593Smuzhiyun		"",
244*4882a593Smuzhiyun		"",
245*4882a593Smuzhiyun		"",
246*4882a593Smuzhiyun		"",
247*4882a593Smuzhiyun		"",
248*4882a593Smuzhiyun		/*
249*4882a593Smuzhiyun		 * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
250*4882a593Smuzhiyun		 * call it BIOS_FLASH_WP_R_L.
251*4882a593Smuzhiyun		 */
252*4882a593Smuzhiyun		"AP_FLASH_WP_L",
253*4882a593Smuzhiyun		"EC_AP_INT_ODL",
254*4882a593Smuzhiyun		"IT6505_INT_ODL",
255*4882a593Smuzhiyun		"H1_INT_OD_L",
256*4882a593Smuzhiyun		"",
257*4882a593Smuzhiyun		"",
258*4882a593Smuzhiyun		"",
259*4882a593Smuzhiyun		"",
260*4882a593Smuzhiyun		"",
261*4882a593Smuzhiyun		"",
262*4882a593Smuzhiyun		"",
263*4882a593Smuzhiyun		"AP_SPI_FLASH_MISO",
264*4882a593Smuzhiyun		"AP_SPI_FLASH_CS_L",
265*4882a593Smuzhiyun		"AP_SPI_FLASH_MOSI",
266*4882a593Smuzhiyun		"AP_SPI_FLASH_CLK",
267*4882a593Smuzhiyun		"DA7219_IRQ",
268*4882a593Smuzhiyun		"",
269*4882a593Smuzhiyun		"",
270*4882a593Smuzhiyun		"",
271*4882a593Smuzhiyun		"",
272*4882a593Smuzhiyun		"",
273*4882a593Smuzhiyun		"",
274*4882a593Smuzhiyun		"",
275*4882a593Smuzhiyun		"",
276*4882a593Smuzhiyun		"",
277*4882a593Smuzhiyun		"",
278*4882a593Smuzhiyun		"",
279*4882a593Smuzhiyun		"",
280*4882a593Smuzhiyun		"",
281*4882a593Smuzhiyun		"",
282*4882a593Smuzhiyun		"",
283*4882a593Smuzhiyun		"",
284*4882a593Smuzhiyun		"",
285*4882a593Smuzhiyun		"",
286*4882a593Smuzhiyun		"",
287*4882a593Smuzhiyun		"",
288*4882a593Smuzhiyun		"",
289*4882a593Smuzhiyun		"",
290*4882a593Smuzhiyun		"",
291*4882a593Smuzhiyun		"",
292*4882a593Smuzhiyun		"",
293*4882a593Smuzhiyun		"";
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun	ppvarp_lcd_en: ppvarp-lcd-en {
296*4882a593Smuzhiyun		pins1 {
297*4882a593Smuzhiyun			pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
298*4882a593Smuzhiyun			output-low;
299*4882a593Smuzhiyun		};
300*4882a593Smuzhiyun	};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun	ppvarn_lcd_en: ppvarn-lcd-en {
303*4882a593Smuzhiyun		pins1 {
304*4882a593Smuzhiyun			pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
305*4882a593Smuzhiyun			output-low;
306*4882a593Smuzhiyun		};
307*4882a593Smuzhiyun	};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun	pp1800_lcd_en: pp1800-lcd-en {
310*4882a593Smuzhiyun		pins1 {
311*4882a593Smuzhiyun			pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
312*4882a593Smuzhiyun			output-low;
313*4882a593Smuzhiyun		};
314*4882a593Smuzhiyun	};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun	open_touch: open_touch {
317*4882a593Smuzhiyun		irq_pin {
318*4882a593Smuzhiyun			pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
319*4882a593Smuzhiyun			input-enable;
320*4882a593Smuzhiyun			bias-pull-up;
321*4882a593Smuzhiyun		};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun		rst_pin {
324*4882a593Smuzhiyun			pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun			/*
327*4882a593Smuzhiyun			 * The pen driver doesn't currently support  driving
328*4882a593Smuzhiyun			 * this reset line.  By specifying output-high here
329*4882a593Smuzhiyun			 * we're relying on the fact that this pin has a default
330*4882a593Smuzhiyun			 * pulldown at boot (which makes sure the pen was in
331*4882a593Smuzhiyun			 * reset if it was powered) and then we set it high here
332*4882a593Smuzhiyun			 * to take it out of reset.  Better would be if the pen
333*4882a593Smuzhiyun			 * driver could control this and we could remove
334*4882a593Smuzhiyun			 * "output-high" here.
335*4882a593Smuzhiyun			 */
336*4882a593Smuzhiyun			output-high;
337*4882a593Smuzhiyun		};
338*4882a593Smuzhiyun	};
339*4882a593Smuzhiyun};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun&qca_wifi {
342*4882a593Smuzhiyun	qcom,ath10k-calibration-variant = "LE_Krane";
343*4882a593Smuzhiyun};
344